gmane.linux.ports.arm.msm

[PATCH 0/3] Cleanup MSM_GPIOMUX and add device-tree support for

Rohit Vaswani — 2013-05-21T18:32:40

Hi Linus,
Could this series go through David's tree or is there a better way to do this?
It would be great if I can have you ack for the gpio patch.

Thanks,
Rohit

Rohit Vaswani (3):
  ARM: msm: Remove gpiomux-v2 and re-organize MSM_GPIOMUX configs
  ARM: msm: Remove unused and unmapped MSM_TLMM_BASE for 8x60
  gpio: msm: Add device tree and irqdomain support for gpio-msm-v2

 .../devicetree/bindings/gpio/gpio-msm.txt          |   26 ++++
 arch/arm/boot/dts/msm8660-surf.dts                 |   11 ++
 arch/arm/boot/dts/msm8960-cdp.dts                  |   11 ++
 arch/arm/mach-msm/Kconfig                          |   13 +-
 arch/arm/mach-msm/Makefile                         |    6 +-
 arch/arm/mach-msm/gpiomux-8x60.c                   |   19 ---
 arch/arm/mach-msm/gpiomux-v2.c                     |   25 ---
 arch/arm/mach-msm/gpiomux-v2.h                     |   61 --------
 arch/arm/mach-msm/gpiomux.c                        |   15 ++
 arch/arm/mach-msm/gpiomux.h                        |    5 -
 arch/arm/mach

[PATCH] ARM: dts: msm: Fix bad register addresses

Stephen Boyd — 2013-05-21T00:50:37

Some bad copy/paste got in as well as too many zeroes. Fix
everything up so that the registers after the < at > sign are
consistent with the first reg property.

Signed-off-by: Stephen Boyd <sboyd< at >codeaurora.org>
---
 arch/arm/boot/dts/msm8660-surf.dts | 4 ++--
 arch/arm/boot/dts/msm8960-cdp.dts  | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 9bf49b3..d347082 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
< at >< at > -15,7 +15,7 < at >< at >
       < 0x02081000 0x1000 >;
 };
 
-timer< at >2000004 {
+timer< at >2000000 {
 compatible = "qcom,scss-timer", "qcom,msm-timer";
 interrupts = <1 0 0x301>,
      <1 1 0x301>,
< at >< at > -26,7 +26,7 < at >< at >
 cpu-offset = <0x40000>;
 };
 
-serial< at >19c400000 {
+serial< at >19c40000 {
 compatible = "qcom,msm-hsuart", "qcom,msm-uart";
 reg = <0x19c40000 0x1000>,
       <0x19c00000 0x1000>;
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm896

[PATCH 1/1] diag: fix userspace read-write freeze during high logging rates

Kasidit Yusuf — 2013-05-20T08:17:39

At very high diagchar logging rates (a HSPA+ ftp download with many
instantaneous diag log response messages enabled) on quad-core phones,
it was observed that after about 2 to 20 minutes (depends on logging rate)
- the userspace read to /dev/diag would block, causing a freeze effect
to the userspace program - and further attempts to log would randomly
freeze at an earlier stage then a phone restart was required to do any
meaningful logging. You can test this with "diag_mdlog", use a diag.cfg
with high logging rate log_response_messages like 0x4222, 0x4179 and other
fast logs.

The patched kernel was tested on a "Google Nexus 4 with Android 4.2.2"
(mako) phone - and had no more freezes even after 13 Hours of logging diag
for over-night ftp tests, an older sister-kernel (essentially the same -
but with many more pr_debug() to identify the causes) was also tested
sucessfully on two other "Google Nexus 4" phones, one of them logged
successfully through about 10 hours of fast ftp downloads - no freezes too.

Thi

Would like to form a pool of Linux copyright holders for faster GPL enforcement against Anthrax Kernels

Eric Appleman — 2013-05-18T08:21:13

Background on Anthrax Kernels and their GPL violation:
http://pastebin.com/X5Cciy03

Would anyone be interested in forming such a pool? I am willing to wait 
years for this to be resolved through certain organizations, but I 
believe we can do better.

Last I checked, I have 1 long-time poster of the gpl-violations list on 
board. Would anyone else like to join? Ideally I'd like to get the LKML 
(which I have CC'd among others) involved so that authors of critical 
Linux components be a part of this. I'm not sure if my defconfig commits 
to Android kernel branches count as contributions, so I'm not going to 
consider myself a Linux contributor unless told otherwise.

This pool would be used in the following manner:

* Formally requesting source for binaries (means to request source is 
actively hidden)
* Formally requesting removal of critical copyrighted code that Linux 
cannot function without
* Informing interested parties with respect to refusals of the above

The CTO of Anthrax's hosting server is very

[PATCHv2] arm: mm: Use phys_addr_t properly for ioremap functions

Laura Abbott — 2013-05-14T19:33:50

Several of the ioremap functions use unsigned long in places
resulting in truncation if physical addresses greater than
4G are passed in. Change the types of the functions and the
callers accordingly.

Cc: Krzysztof Halasa <khc< at >pm.waw.pl>
Cc: Arnd Bergmann <arnd< at >arndb.de>
Cc: Stephen Boyd <sboyd< at >codeaurora.org>
Cc: Russell King <linux< at >arm.linux.org.uk>
Signed-off-by: Laura Abbott <lauraa< at >codeaurora.org>
---
 arch/arm/include/asm/io.h     |    8 ++++----
 arch/arm/mach-ebsa110/core.c  |    2 +-
 arch/arm/mach-imx/mm-imx3.c   |    2 +-
 arch/arm/mach-iop13xx/io.c    |    2 +-
 arch/arm/mach-ixp4xx/common.c |    2 +-
 arch/arm/mach-msm/common.h    |    2 +-
 arch/arm/mach-msm/io.c        |    2 +-
 arch/arm/mm/ioremap.c         |   10 +++++-----
 arch/arm/mm/nommu.c           |    6 +++---
 9 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 652b560..d070741 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
< at >< at > -130,16

[PATCH] timer: Don't reinitialize the cpu base lock during CPU_UP_PREPARE

Tirupathi Reddy — 2013-05-14T08:29:02

An inactive timer's base can refer to a offline cpu's base.

In the current code, cpu_base's lock is blindly reinitialized
each time a CPU is brought up. If a CPU is brought online
during the period that another thread is trying to modify an
inactive timer on that CPU with holding its timer base lock,
then the lock will be reinitialized under its feet. This leads
to following SPIN_BUG().

<0> BUG: spinlock already unlocked on CPU#3, kworker/u:3/1466
<0> lock: 0xe3ebe000, .magic: dead4ead, .owner: kworker/u:3/1466, .owner_cpu: 1
<4> [<c0013dc4>] (unwind_backtrace+0x0/0x11c) from [<c026e794>] (do_raw_spin_unlock+0x40/0xcc)
<4> [<c026e794>] (do_raw_spin_unlock+0x40/0xcc) from [<c076c160>] (_raw_spin_unlock+0x8/0x30)
<4> [<c076c160>] (_raw_spin_unlock+0x8/0x30) from [<c009b858>] (mod_timer+0x294/0x310)
<4> [<c009b858>] (mod_timer+0x294/0x310) from [<c00a5e04>] (queue_delayed_work_on+0x104/0x120)
<4> [<c00a5e04>] (queue_delayed_work_on+0x104/0x120) from [<c04eae00>] (sdhci_msm_bus_voting+0x88/0x9c)
<4> [<c04eae00

[PATCHv3 0/4] Memory mapped architected timers

Stephen Boyd — 2013-05-13T19:56:33

This patchset adds support for memory mapped architected timers. We
don't have any other global broadcast timer in our system, so we use the
mmio timer during low power modes. The first patch is the binding.
The next two patches lay some groundwork so that the last patch is simpler.
The final patch adds support for mmio timers.

Patches are based on a patch from Mark that removes the
physical count reading (clocksource: arch_timer: use virtual counter,
message id <1364404312-4427-4-git-send-email-mark.rutland< at >arm.com>).

Updates since v2:
 * Rebased onto v3.10-rc1

Updates since v1:
 * Assigned counter reading function and commented why for arm64
 * Updated DT binding to replace frame-id with frame-number and use status
   property

Stephen Boyd (4):
  Documentation: Add memory mapped ARM architected timer binding
  clocksource: arch_timer: Pass clock event to set_mode callback
  clocksource: arch_timer: Push the read/write wrappers deeper
  clocksource: arch_timer: Add support for memory mapped timers

 ...

[PATCHv6 00/11] Remove ARM local timer API

Stephen Boyd — 2013-05-13T19:26:04

In light of Mark Rutland's recent work on divorcing the ARM architected
timers from the ARM local timer API and introducing a generic arch hook for
broadcast it seems that we should remove the local timer API entirely.
Doing so will reduce the architecture dependencies of our timer drivers,
reduce code in ARM core, and simplify timer drivers because they no longer
go through an architecture layer that is essentially a hotplug notifier.

Previous attempts have been made[1] unsuccessfully. I'm hoping this can
be accepted now so that we can clean up the timer drivers that are
used in both UP and SMP situations. Right now these drivers have to ignore
the timer setup callback on the boot CPU to avoid registering clockevents
twice. This is not very symmetric and causes convuluted code that does
the same thing in two places.

Patches based on next-20130418

I'm still looking for Acks/Tested-by on EXYNOS and PRIMA2.

[1] http://article.gmane.org/gmane.linux.ports.arm.kernel/145705

Note: A hotplug notifier is used b

[PATCH V1 0/8] ufs patch siries

Dolev Raviv — 2013-05-13T10:02:10

This patch series clusters the latest version of all the UFS patches in the
SCSI mailing list. It gives a stable functional base line for the UFS driver.

It includes the following versions:

But does not include:


Dolev Raviv (8):
  Documentation: devicetree: Add DT bindings for UFS host controller
  scsi: ufs: Fix the response UPIU length setting
  scsi: ufs: wrap the i/o access operations
  scsi: ufs: amend interrupt configuration
  scsi: ufs: fix interrupt status clears
  scsi: ufs: rework link start-up process
  scsi: ufs: Add support for sending NOP OUT UPIU
  scsi: ufs: Set fDeviceInit flag to initiate device initialization

 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |   16 +
 drivers/scsi/ufs/ufs.h                             |   10 +-
 drivers/scsi/ufs/ufshcd.c                          |  839 ++++++++++++++++----
 drivers/scsi/ufs/ufshcd.h                          |   25 +-
 drivers/scsi/ufs/ufshci.h                          |    5 +-
 5 files changed, 721 insertions(+), 174 deletions(-)

[PATCH V1 0/8] ufs patch siries

Dolev Raviv — 2013-05-12T14:23:52

This patch series clusters the latest version of all the UFS patches in the
SCSI mailing list. It gives a stable functional base line for the UFS driver.

It includes the following versions:

But does not include:


Dolev Raviv (8):
  Documentation: devicetree: Add DT bindings for UFS host controller
  scsi: ufs: Fix the response UPIU length setting
  scsi: ufs: wrap the i/o access operations
  scsi: ufs: amend interrupt configuration
  scsi: ufs: fix interrupt status clears
  scsi: ufs: rework link start-up process
  scsi: ufs: Add support for sending NOP OUT UPIU
  scsi: ufs: Set fDeviceInit flag to initiate device initialization

 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |   16 +
 drivers/scsi/ufs/ufs.h                             |   10 +-
 drivers/scsi/ufs/ufshcd.c                          |  839 ++++++++++++++++----
 drivers/scsi/ufs/ufshcd.h                          |   25 +-
 drivers/scsi/ufs/ufshci.h                          |    5 +-
 5 files changed, 721 insertions(+), 174 deletions(-)

[PATCH V1 0/8] ufs patch siries

Dolev Raviv — 2013-05-12T14:22:22

This patch series clusters the latest version of all the UFS patches in the
SCSI mailing list. It gives a stable functional base line for the UFS driver.

It includes the following versions:

But does not include:


Dolev Raviv (8):
  Documentation: devicetree: Add DT bindings for UFS host controller
  scsi: ufs: Fix the response UPIU length setting
  scsi: ufs: wrap the i/o access operations
  scsi: ufs: amend interrupt configuration
  scsi: ufs: fix interrupt status clears
  scsi: ufs: rework link start-up process
  scsi: ufs: Add support for sending NOP OUT UPIU
  scsi: ufs: Set fDeviceInit flag to initiate device initialization

 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |   16 +
 drivers/scsi/ufs/ufs.h                             |   10 +-
 drivers/scsi/ufs/ufshcd.c                          |  839 ++++++++++++++++----
 drivers/scsi/ufs/ufshcd.h                          |   25 +-
 drivers/scsi/ufs/ufshci.h                          |    5 +-
 5 files changed, 721 insertions(+), 174 deletions(-)

[PATCH v6 2/3] block: Add API for urgent request handling

Tanya Brokhman — 2013-05-12T10:34:24

This patch add support in block & elevator layers for handling
urgent requests. The decision if a request is urgent or not is taken
by the scheduler. Request is marked as urgent in cmd_flags (by the
scheduler) with a new flag - REQ_URGENT.
Urgent request notification is passed to the underlying
block device driver (eMMC for example). Block device driver may decide to
interrupt the currently running low priority request to serve the new
urgent request. By doing so READ latency is greatly reduced in read&write
collision scenarios.

Note that if the current scheduler doesn't implement the urgent request
mechanism, this code path is never activated.

Signed-off-by: Tatyana Brokhman <tlinder< at >codeaurora.org>

diff --git a/block/blk-core.c b/block/blk-core.c
index adab72d..ac298a4 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
< at >< at > -296,6 +296,13 < at >< at > EXPORT_SYMBOL(blk_sync_queue);
  *    This variant runs the queue whether or not the queue has been
  *    stopped. Must be called with the queue lock held and inte

[PATCH 1/1] timer: Don't reinitialize the cpu base lock during CPU_UP_PREPARE

Tirupathi Reddy — 2013-05-10T13:38:12

An inactive timer's base can refer to a offline cpu's base.

In the current code, cpu_base's lock is blindly reinitialized
each time a CPU is brought up. If a CPU is brought online
during the period that another thread is trying to modify an
inactive timer on that CPU with holding its timer base lock,
then the lock will be reinitialized under its feet. This leads
to following SPIN_BUG().

<0> BUG: spinlock already unlocked on CPU#3, kworker/u:3/1466
<0> lock: 0xe3ebe000, .magic: dead4ead, .owner: kworker/u:3/1466, .owner_cpu: 1
<4> [<c0013dc4>] (unwind_backtrace+0x0/0x11c) from [<c026e794>] (do_raw_spin_unlock+0x40/0xcc)
<4> [<c026e794>] (do_raw_spin_unlock+0x40/0xcc) from [<c076c160>] (_raw_spin_unlock+0x8/0x30)
<4> [<c076c160>] (_raw_spin_unlock+0x8/0x30) from [<c009b858>] (mod_timer+0x294/0x310)
<4> [<c009b858>] (mod_timer+0x294/0x310) from [<c00a5e04>] (queue_delayed_work_on+0x104/0x120)
<4> [<c00a5e04>] (queue_delayed_work_on+0x104/0x120) from [<c04eae00>] (sdhci_msm_bus_voting+0x88/0x9c)
<4> [<c04eae00

[PATCH 1/2] Documentation: devicetree: Add DT bindings for UFS host controller

Sujit Reddy Thumma — 2013-05-10T04:48:37

Compatible list is used in commit 03b1781 but is not documented.
Add necessary device tree bindings to describe on-chip UFS host
controllers.

Signed-off-by: Sujit Reddy Thumma <sthumma< at >codeaurora.org>
---
 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt

diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
new file mode 100644
index 0000000..20468b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
< at >< at > -0,0 +1,16 < at >< at >
+* Universal Flash Storage (UFS) Host Controller
+
+UFSHC nodes are defined to describe on-chip UFS host controllers.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible        : compatible list, contains "jedec,ufs-1.1"
+- interrupts        : <interrupt mapping for UFS host controller IRQ>
+- reg

[PATCH V4] scsi: ufs: Set fDeviceInit flag to initiate device initialization

Dolev Raviv — 2013-05-09T10:06:30

Allow UFS device to complete its initialization and accept
SCSI commands by setting fDeviceInit flag. The device may take
time for this operation and hence the host should poll until
fDeviceInit flag is toggled to zero. This step is mandated by
UFS device specification for device initialization completion.

Signed-off-by: Dolev Raviv <draviv< at >codeaurora.org>
Signed-off-by: Sujit Reddy Thumma <sthumma< at >codeaurora.org>

--
Changes for V4:
- Add NULL pointer check
- Changed fix from v3 to bug on since hba can't be null
Changes for V3:
- Fix static checker error
Changes for V2:
- Add the query sending api via SCSI from the original query patch

diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
index 086ff03..742363d 100644
--- a/drivers/scsi/ufs/ufs.h
+++ b/drivers/scsi/ufs/ufs.h
< at >< at > -107,8 +107,13 < at >< at > enum {
 UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81,
 };
 
+/* Flag idn for Query Requests*/
+enum flag_idn {
+QUERY_FLAG_IDN_FDEVICEINIT = 0x01,
+};
+
 /* UTP QUERY Transaction Specific Fields OpCode *

[PATCH 0/3] Fix disable of unused clk/regulator with deferred probe

Saravana Kannan — 2013-05-09T05:18:43

Clock and regulator frameworks have support for disabling unused clocks and
regulators at system init to save power when bootloaders leave them in a less
than desirable state. If no driver has requested for a clock/regulator to be
ON by the time kernel init reaches late_initcall level, they were considered
unused.

This worked well/good enough for compiled in drivers before deferred probe
was introduced. But with deferred probe, it's quite likely that devices that
match with compiled in drivers will continue to probe well past late_initcall
(at least as far as I can understand). So, we need to wait for deferred
probing during kernel init to complete before we do the disable of unused
clocks/regulators.

If there's a better or more obvious solution, I'm all ears. Another approach
would have been to add a "probe_done_initcall" level. But that seems overkill
and I don't think adding yet another initcall level is a great idea.

Thanks,
Saravana

Saravana Kannan (3):
  driver core: Add API to wait for deferred pr

[PATCH] ARM: avoid mis-detecting some V7 cores in the decompressor

Stephen Boyd — 2013-05-08T21:47:51

From: Brian Swetland <swetland< at >google.com>

Currently v7 CPUs with an MIDR that has no bits set in the range
[16:12] will be detected as old ARM CPUs with no caches and so
the cache will never be turned on during decompression. ARM's
Cortex chips have an 0xC in the range [16:12] so they never match
this entry, but Qualcomm's Scorpion and Krait processors never
set these bits to anything besides 0 so they always match.

Skip this entry if we've compiled in support for v7 CPUs. This
allows kernel decompression to happen nearly instantly instead of
taking over 20 seconds.

Signed-off-by: Brian Swetland <swetland< at >google.com>
[sboyd: Clarified and extended commit text]
Signed-off-by: Stephen Boyd <sboyd< at >codeaurora.org>
---
 arch/arm/boot/compressed/head.S | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index fe4d9c3..a236190 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
< at >< at > -805,6 +805,8 < at >< at > call_cache_fn:

[PATCH V2] scsi: ufs: Add fDeviceInit set flag during initialization

Dolev Raviv — 2013-05-08T14:19:41

Send fDeviceInit flag during device initialization. Than poll until the
device clears the flag. This step is required during the device
initialization process.
The flag set is used to communicate to the UFS device that it can complete
its initialization. The UFS device will then move from Boot W-LU READY
state to Device Initialization IN PROGRESS state. When the initialization
is complete the device will reset the fDeviceInit flag.

Signed-off-by: Dolev Raviv <draviv< at >codeaurora.org>
Signed-off-by: Sujit Reddy Thumma <sthumma< at >codeaurora.org>

--- 
Changes for V2:
- Add the query sending api via SCSI from the original query patch

diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
index 086ff03..742363d 100644
--- a/drivers/scsi/ufs/ufs.h
+++ b/drivers/scsi/ufs/ufs.h
< at >< at > -107,8 +107,13 < at >< at > enum {
 UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81,
 };
 
+/* Flag idn for Query Requests*/
+enum flag_idn {
+QUERY_FLAG_IDN_FDEVICEINIT = 0x01,
+};
+
 /* UTP QUERY Transaction Specific Fields OpCode */
-enum {

[PATCH V4 1/1] scsi: ufs: Add support for sending NOP OUT UPIU

Sujit Reddy Thumma — 2013-05-08T09:50:12

As part of device initialization sequence, sending NOP OUT UPIU and
waiting for NOP IN UPIU response is mandatory. This confirms that the
device UFS Transport (UTP) layer is functional and the host can configure
the device with further commands. Add support for sending NOP OUT UPIU to
check the device connection path and test whether the UTP layer on the
device side is functional during initialization.

Signed-off-by: Sujit Reddy Thumma <sthumma< at >codeaurora.org>

---
v4:
   - Removed readl_poll_timeout and replaced with wait logic
   - additional checks for completion
v3:
   - minor bug fix in error path
v2:
   - fixed INTERNAL_CMD_TAG check in readl_poll_timeout
   - minor cleanup from v1
   - rebased on Seungwon Jeon's UFS V3 patchset
---
 drivers/scsi/ufs/ufshcd.c |  197 ++++++++++++++++++++++++++++++++++++++++++--
 drivers/scsi/ufs/ufshcd.h |    4 +
 2 files changed, 192 insertions(+), 9 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 3607ffb..ded770d 100644
--- a/dr

dringender Vorschlag

John P. Goldman — 2013-05-08T08:46:28


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Bitte senden Sie mir eine vertrauliche Antwort, wenn Sie denken, Sie
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[PATCH] proc: Use PDE attribute setting accessor functions

Geert Uytterhoeven — 2013-05-07T09:20:26

arch/arm/mach-msm/last_radio_log.c: In function 'msm_init_last_radio_log':
arch/arm/mach-msm/last_radio_log.c:69:7: error: dereferencing pointer to incomplete type

arch/cris/kernel/profile.c: In function 'init_cris_profile':
arch/cris/kernel/profile.c:79:8: error: dereferencing pointer to incomplete type

Use proc_set_size(), cfr. commit 271a15eabe094538d958dc68ccfc9c36b699247a
("proc: Supply PDE attribute setting accessor functions")

Signed-off-by: Geert Uytterhoeven <geert< at >linux-m68k.org>
---
 arch/arm/mach-msm/last_radio_log.c |    2 +-
 arch/cris/kernel/profile.c         |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-msm/last_radio_log.c b/arch/arm/mach-msm/last_radio_log.c
index 7777767..9c392a2 100644
--- a/arch/arm/mach-msm/last_radio_log.c
+++ b/arch/arm/mach-msm/last_radio_log.c
< at >< at > -66,6 +66,6 < at >< at > void msm_init_last_radio_log(struct module *owner)
 pr_err("%s: last radio log is %d bytes long\n", __func__,
 radio_log_size);
 last_radio_log_fops.owner = ow