http://blog.gmane.org/gmane.linux.kernel.pci hourly 1 1901-01-01T00:00+00:00 http://gmane.org/img/gmane-25t.png http://gmane.org http://comments.gmane.org/gmane.linux.kernel.pci/15555 <pre>This patchset enhance pci_root driver to update MMCFG information when hot-plugging PCI root bridges. It applies to git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git pci/next-3.5 -v2: split into smaller patches and skip updating MMCFG information when MMCFG is disabled -v3: add mmconf_added to simply free path, also make pci_mmconfig_insert() to process extra exist case --- By Yinghai -v4: tune arch_acpi_pci_root_add() to handle a corner case raised by Kenji -v5: address review comments from Bjorn and Taku, also better handle corner cases in arch_acpi_pci_root_add() -v6: get rid of arch_acpi_pci_root_xxx() by using existing hooks add MCFG information for host bridges on demand more corner cases clear up correctly handle condition compilation fix section mismatch issues fix a issue reported by Taku about a BIOS bug -v7: unify log messages remove redundant host bridge resource related log messages fix a issue reported by Taku which breaks pnp reso</pre> Jiang Liu 2012-05-26T09:53:53 http://comments.gmane.org/gmane.linux.kernel.pci/15544 <pre>Hello, I'm getting this warning with linux-3.4.0. My laptop is a DELL E5420. Please tell me if you need further testing/debug. Cheers, [ 1.054279] WARNING: at drivers/pci/search.c:44 pci_find_upstream_pcie_bridge+0x5e/0x70() [ 1.054385] Hardware name: Latitude E5420 [ 1.054457] Modules linked in: [ 1.054568] Pid: 1, comm: swapper/0 Not tainted 3.4.0ordex+ #3 [ 1.054643] Call Trace: [ 1.054716] [&lt;ffffffff81033d4a&gt;] warn_slowpath_common+0x7a/0xb0 [ 1.054793] [&lt;ffffffff81033d95&gt;] warn_slowpath_null+0x15/0x20 [ 1.054869] [&lt;ffffffff8123899e&gt;] pci_find_upstream_pcie_bridge+0x5e/0x70 [ 1.054949] [&lt;ffffffff813babe7&gt;] intel_iommu_device_group+0x77/0x100 [ 1.055027] [&lt;ffffffff813b52d5&gt;] add_iommu_group+0x35/0x60 [ 1.055113] [&lt;ffffffff813b52a0&gt;] ? bus_set_iommu+0x50/0x50 [ 1.055191] [&lt;ffffffff8132c586&gt;] bus_for_each_dev+0x56/0x90 [ 1.055267] [&lt;ffffffff813b528b&gt;] bus_set_iommu+0x3b/0x50 [ 1.055344] [&lt;ffffffff818c4920&gt;] intel_iommu_init+0xab0/0xb3f [ 1.055421] [&lt;f</pre> Antonio Quartulli 2012-05-26T08:25:52 http://comments.gmane.org/gmane.linux.kernel.pci/15543 <pre> i am robothroli, Purchase manager from roli Merchant Ltd. We are Import/export Company based in taiwan. We are interested in purchasing your product and I would like to make an inquiry. Please inform me on: Sample availability and price Minimum order quantity FOB Prices Sincerely Purchase Manager robothroli </pre> robothroli company 2012-05-25T13:45:54 http://comments.gmane.org/gmane.linux.kernel.pci/15493 <pre>HI, guys Does anyone let me know what cardbus bridge is used for? What is the difference between it and comon pci bridge? By the way, someone usually mentioned pci host bridge, pci root bridge. What the differences among them are? Any comments are appreciated, thanks </pre> Zhi Yong Wu 2012-05-24T08:26:14 http://comments.gmane.org/gmane.linux.kernel.pci/15489 <pre>Here's what I put in my "for-3.6" branch for now. We can still change it, so let me know if you see any problems. I reworked the changelogs, changed the notification function name per Jesse, folded the one-line pcibios_setup_bus_notifier() into the only caller (on microblaze), and changed it from __devinit to __init (on powerpc) since it now has nothing to do with hotplug. Thank you very much for doing this work, Matsumoto-san. I hope to eventually get rid of pcibios_fixup_bus() altogether, and this is a significant step in that direction. Bjorn --- Hiroo Matsumoto (2): powerpc/PCI: move DMA &amp; IRQ init to device_add() notification path microblaze/PCI: move DMA &amp; IRQ init to device_add() notification path arch/microblaze/include/asm/pci.h | 1 arch/microblaze/pci/pci-common.c | 62 +++++++++++--------- arch/powerpc/include/asm/pci.h | 2 - arch/powerpc/kernel/pci-common.c | 87 ++++++++++++++-------------- arch/powerpc/kernel/pci_32.c </pre> Bjorn Helgaas 2012-05-23T22:36:55 http://comments.gmane.org/gmane.linux.kernel.pci/15468 <pre>When providers get blocked unregister_dca_providers() is called ending up with dca_providers and dca_domain lists emptied. Dca should be prevented from trying to unregister any provider if dca_domain list is found empty. Reported-by: Jiang Liu &lt;jiang.liu&lt; at &gt;huawei.com&gt; Tested-by: Gaohuai Han &lt;hangaohuai&lt; at &gt;huawei.com&gt; Signed-off-by: Maciej Sosnowski &lt;maciej.sosnowski&lt; at &gt;intel.com&gt; --- drivers/dca/dca-core.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/dca/dca-core.c b/drivers/dca/dca-core.c index bc6f5fa..819dfda 100644 --- a/drivers/dca/dca-core.c +++ b/drivers/dca/dca-core.c &lt; at &gt;&lt; at &gt; -420,6 +420,11 &lt; at &gt;&lt; at &gt; void unregister_dca_provider(struct dca_ raw_spin_lock_irqsave(&amp;dca_lock, flags); +if (list_empty(&amp;dca_domains)) { +raw_spin_unlock_irqrestore(&amp;dca_lock, flags); +return; +} + list_del(&amp;dca-&gt;node); pci_rc = dca_pci_rc_from_dev(dev); </pre> Maciej Sosnowski 2012-05-23T15:27:07 http://comments.gmane.org/gmane.linux.kernel.pci/15453 <pre>From: Yinghai Lu &lt;ying6hai&lt; at &gt;kernel.org&gt; This patchset will try to make allocation to find suitable assignement. 1. will try to assign 64 bit resource above 4g at first. 2. will find space that is matched with needed size 3. will put resource in right location to leave more big alignment with left blank resource 4. will try option rom BAR as optional resources. Could be found: git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git for-pci-res-alloc and it is based on pci for-3.6 branch. Thanks Yinghai Lu Yinghai Lu (11): PCI: Should add children device res to fail list PCI: Try to allocate mem64 above 4G at first intel-gtt: Read 64bit for gmar_bus_addr PCI: Make sure assign same align with large size resource at first resources: Split out __allocate_resource() resource: make find_resource could return just fit resource PCI: Don't allocate small resource in big empty space. resource: only return range with needed align PCI: Add is_pci_iov_resource_idx() PCI: Sort unas</pre> Yinghai Lu 2012-05-23T06:34:26 http://comments.gmane.org/gmane.linux.kernel.pci/15447 <pre>Here's my proposal for fixing this problem. I split out the pci_dev_put() for function 0 because it looks to me like that is actually a separate issue -- it looks like we leaked that reference even for single-function devices. I restructured the iteration over bus-&gt;devices to make it read a bit more naturally, and also to remove it from inside the slot-&gt;funcs loop. It didn't make sense to me to have a nested loop there. The cleanup_p2p_bridge() stuff is mostly just fiddling with notify handlers and other ACPI-specific stuff. I don't think there's actually a dependency there on the PCI device removal, so I think it's safe to do that separately. Does this make sense to you? If so, can you test it and make sure it actually works? Thanks, Bjorn --- Amos Kong (2): PCI: acpiphp: fix function 0 leak when disabling a slot PCI: acpiphp: remove all functions in slot, even without ACPI _EJx drivers/pci/hotplug/acpiphp_glue.c | 40 +++++++++++++++++++++++++++--------- 1 files changed, 30 ins</pre> Bjorn Helgaas 2012-05-23T04:35:01 http://comments.gmane.org/gmane.linux.kernel.pci/15437 <pre>From: Jiang Liu &lt;liuj97&lt; at &gt;gmail.com&gt; From: Jiang Liu &lt;jiang.liu&lt; at &gt;huawei.com&gt; This patchset enhance pci_root driver to update MMCFG information when hot-plugging PCI root bridges. It applies to git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git pci/next-3.5 -v2: split into smaller patches and skip updating MMCFG information when MMCFG is disabled -v3: add mmconf_added to simply free path, also make pci_mmconfig_insert() to process extra exist case --- By Yinghai -v4: tune arch_acpi_pci_root_add() to handle a corner case raised by Kenji -v5: address review comments from Bjorn and Taku, also better handle corner cases in arch_acpi_pci_root_add() -v6: get rid of arch_acpi_pci_root_xxx() by using existing hooks add MCFG information for host bridges on demand more corner cases clear up correctly handle condition compilation fix section mismatch issues fix a issue reported by Taku about a BIOS bug The first 4 patches in series is the same with v5. On a test plat</pre> Jiang Liu 2012-05-23T03:50:17 http://comments.gmane.org/gmane.linux.kernel.pci/15433 <pre>pcibios_setup_bus_devices which sets DMA and IRQs of PCI device is called only when boot, so DMA and IRQs of PCI device will not set when hotplug. This patch adds pcibios_device_change_notifier which sets DMA and IRQs of PCI device when PCI device adds, so DMA and IRQs of PCI device will be set when boot and hotplug. Signed-off-by: Hiroo MATSUMOTO &lt;matsumoto.hiroo&lt; at &gt;jp.fujitsu.com&gt; --- arch/microblaze/include/asm/pci.h | 2 +- arch/microblaze/pci/pci-common.c | 67 +++++++++++++++++++++--------------- 2 files changed, 40 insertions(+), 29 deletions(-) diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h index 0331376..8d11277 100644 --- a/arch/microblaze/include/asm/pci.h +++ b/arch/microblaze/include/asm/pci.h &lt; at &gt;&lt; at &gt; -149,8 +149,8 &lt; at &gt;&lt; at &gt; extern void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, resource_size_t *start, resource_size_t *end); -extern void pcibios_setup_bus_devices(struct pci_bus *bus); extern void pcibios_setup</pre> Hiroo Matsumoto 2012-05-23T02:34:03 http://comments.gmane.org/gmane.linux.kernel.pci/15432 <pre>pcibios_setup_bus_devices which sets DMA and IRQs of PCI device is called only when boot, so DMA and IRQs of PCI device will not set when hotplug. This patch adds pcibios_device_change_notifier which sets DMA and IRQs of PCI device when PCI device adds, so DMA and IRQs of PCI device will be set when boot and hotplug. * Not patched pciehp message on powerpc platform # echo 1 &gt; /sys/bus/pci/slots/1/power &lt;snip&gt; pcieport 0000:02:01.0: PCI bridge to [bus 03-03] pcieport 0000:02:01.0: bridge window [io 0xff7ee000-0xff7eefff] pcieport 0000:02:01.0: bridge window [mem 0xa0100000-0xa01fffff] pcieport 0000:02:01.0: bridge window [mem 0xa0200000-0xa02fffff 64bit pref] pci 0000:03:00.0: no hotplug settings from platform e1000e 0000:03:00.0: Disabling ASPM L1 e1000e 0000:03:00.0: enabling device (0000 -&gt; 0002) e1000e 0000:03:00.0: No usable DMA configuration, aborting e1000e: probe of 0000:03:00.0 failed with error -5 * Patched pciehp message on powerpc platform # echo 1 &gt; /sys/bus/pci/slots/1/power &lt;snip&gt; pciep</pre> Hiroo Matsumoto 2012-05-23T02:33:54 http://comments.gmane.org/gmane.linux.kernel.pci/15431 <pre>This patchset is for PCI hotplug. pcibios_setup_bus_devices which sets DMA and IRQs of PCI device is called only when boot. DMA setting in probe for PCI driver, like dma_set_mask, does not work on powerpc platform. So it is need to set DMA and IRQs of PCI device when hotplug. 1. Moving pcibios_setup_bus_devices code to pcibios_device_change_notifier which is registered to bus notifier in pcibios_init. 2. Removing caller and callee of pcibios_setup_bus_devices bus notifier works instead of pcibios_setup_bus_devices. 3. Using this bus notifier for microblaze because microblaze/PCI is similer with powerpc/PCI. [PATCH v2 1/2] powerpc/PCI: Add pcibios_device_change_notifier for powerpc [PATCH v2 2/2] microblaze/PCI: Add pcibios_device_change_notifier for microblaze Regards. Hiroo MATSUMOTO </pre> Hiroo Matsumoto 2012-05-23T02:33:42 http://comments.gmane.org/gmane.linux.kernel.pci/15426 <pre>I'm tyring to support bridge hotplug and devices below it in qemu via acpi hotplug. Currently only 1 level or 32 slots are supported. By allowing for a second level, we will be able to support 32^2 devices. If I first hotplug the bridge with no devices intially below it, the hotplug code sets the bridge memory window to 0 and does not increase it when subsequent devices are added below it. Fix this, by calling pci_rescan_bus_bridge_resize(), on the bridge directly below the root to re-size all the birdge windows that may have changed. Signed-off-by: Jason Baron &lt;jbaron&lt; at &gt;redhat.com&gt; --- drivers/pci/hotplug/acpiphp_glue.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index 806c44f..8960c1e 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c &lt; at &gt;&lt; at &gt; -792,6 +792,7 &lt; at &gt;&lt; at &gt; static int __ref enable_device(struct acpiphp_slot *slot) { struct pci_dev *dev; struct pci_bus *bus = </pre> Jason Baron 2012-05-22T20:11:38 http://comments.gmane.org/gmane.linux.kernel.pci/15397 <pre> Hello Sales I went over your contact online and found some items which we have interest in purchasing to our store in Spain for urgent supply. I will like to know the prices per each items plus the shipping cost. I also want to know if Letter of Credit or T/T is acceptable for payment. I await your quick response asap so i can proceed with my needed items and quantity. Thank you mcckoy robertson N.B.M Global Supply Inc Address: Autovía A-5, salidas 22 y 26. Arroyomolinos, 28939 Madrid Spain Tel: +34 902 26 77 26 Email: nbmglobalsupply&lt; at &gt;gmail.com Website : http://www.brplastics.com </pre> Mcckoy Robertson 2012-05-20T14:54:02 http://comments.gmane.org/gmane.linux.kernel.pci/15361 <pre>I am looking for a reliable PCIe hot pluggable system. I am not able to find reliable information on workstations from usual vendors like Dell and HP. Their servers supports this feature but they are kind of pricey for us to verify hotpluggability of our device. I had a system with one slot which supported hot plug but the bios didn't enabled it(and there was no way for user to enable it). So if anyone is using any mother board which has reliable hot plug feature, please recommend it.  Thanks. </pre> LinuxDrvDev 2012-05-18T01:09:57 http://comments.gmane.org/gmane.linux.kernel.pci/15349 <pre>Consider the following case [ RP ] | | +---------+-----------+ | | | [H1] [H2] [X1] where RP is a PCIE Root Port, H1 and H2 are devices with drivers that support PCIE AER driver error handling (ie, they have pci_error_handlers defined in the driver), and X1 is a device with a driver that does not support PCIE AER driver error handling. If the Root Port takes an error what currently happens is that the bus resets and H1 &amp; H2 call their slot_reset functions. X1 does nothing. In some cases a user may not wish the system to continue because X1 is an unhardened driver. In these cases, the system should not do a bus reset, but rather the system should panic to avoid any further possible data corruption. This patch implements an AER_panic sysfs entry for each root port which a user can modify. AER_panic = 1, means the system will panic on a PCIE error which would have normally resulted in a secondary bus reset. Signed-off-by: Prarit Bhargava &lt;prarit&lt; at &gt;redhat.com&gt; Cc: Bj</pre> Prarit Bhargava 2012-05-17T17:04:30 http://comments.gmane.org/gmane.linux.kernel.pci/15347 <pre>https://bugzilla.kernel.org/show_bug.cgi?id=43192 Hi Elmar, can you attach a complete dmesg log and "lspci -vv" output to the bugzilla? Let's start with the system with native ExpressCard interface, with an ExpressCard plugged in before booting the system. </pre> Bjorn Helgaas 2012-05-17T16:16:56 http://comments.gmane.org/gmane.linux.kernel.pci/15344 <pre>On a PCI Express multi-function device associated with an upstream port, all bits of the Link Control 2 register are currently reserved on functions &gt; 0. The Selectable De-emphasis field is reserved on all but downstream ports. Signed-off-by: Ben Hutchings &lt;bhutchings&lt; at &gt;solarflare.com&gt; --- ls-caps.c | 20 +++++++++++++------- 1 files changed, 13 insertions(+), 7 deletions(-) diff --git a/ls-caps.c b/ls-caps.c index 9645e5a..4a75ce7 100644 --- a/ls-caps.c +++ b/ls-caps.c &lt; at &gt;&lt; at &gt; -991,22 +991,28 &lt; at &gt;&lt; at &gt; static const char *cap_express_link2_transmargin(int type) } } -static void cap_express_link2(struct device *d, int where, int type UNUSED) +static void cap_express_link2(struct device *d, int where, int type) { u16 w; - w = get_conf_word(d, where + PCI_EXP_LNKCTL2); - printf("\t\tLnkCtl2: Target Link Speed: %s, EnterCompliance%c SpeedDis%c, Selectable De-emphasis: %s\n" -"\t\t\t Transmit Margin: %s, EnterModifiedCompliance%c ComplianceSOS%c\n" -"\t\t\t Compliance De-emphasis: %s\n", + if (!((type </pre> Ben Hutchings 2012-05-17T14:14:16 http://comments.gmane.org/gmane.linux.kernel.pci/15341 <pre> </pre> WONG HUI 2012-05-16T10:50:44 http://comments.gmane.org/gmane.linux.kernel.pci/15335 <pre>From: Jiang Liu &lt;jiang.liu&lt; at &gt;huawei.com&gt; Commit 0d52f54e2ef64c189dedc332e680b2eb4a34590a (PCI / ACPI: Make acpiphp ignore root bridges using PCIe native hotplug) added code that made the acpiphp driver completely ignore PCIe root complexes for which the kernel had been granted control of the native PCIe hotplug feature by the BIOS through _OSC. Later commit 619a5182d1f38a3d629ee48e04fa182ef9170052 "PCI hotplug: Always allow acpiphp to handle non-PCIe bridges" relaxed the constraints to allow acpiphp driver handle non-PCIe bridges under such a complex. The constraint needs to be relaxed further to allow acpiphp driver to hanlde PCIe ports without native PCIe hotplug capability. Some MR-IOV switch chipsets, such PLX8696, support multiple virtual PCIe switches and may migrate downstream ports among virtual switches. To migrate a downstream port from the source virtual switch to the target, the port needs to be hot-removed from the source and hot-added into the target. pciehp driver can't be used here because th</pre> Jiang Liu 2012-05-17T03:40:12 http://comments.gmane.org/gmane.linux.kernel.pci/15322 <pre>Hi, I have a Gigabyte Motherboard and I am trying to hot remove and hot add a Marvell's PCI SATA controller card, but it doesn't work. I am using 3.2.17 kernel with hotplug configured. Also, I turned the debug messages by using pciehp_debug=1 and am forcibly loading the module by using pciehp_force=1. However I don't see any debug messages from the pciehp driver, besides the following - pciehp: PCI Express Hot Plug Controller Driver version: 0.4 I don't see any other message suggesting that the absence of hotplug controller. I have basic questions - 1. How do I find out, for sure, if the board has hot plug controller? Also, is there a way to find out if a particular slot is hotpluggable? 2. The lspci -vv output of the root port and the device shows that "ASPM  disabled". Is this the indication that it doesn't support hotplug? 3. Also in some of the posts it talks about /sys/bus/pci/slots/&lt;device&gt;/power, however, on my system the slots directory is empty!? Does it mean I don't have the hotpluggable syst</pre> LinuxDrvDev 2012-05-16T02:51:26 Search the mailing list at Gmane query http://search.gmane.org/?group=$group=gmane.linux.kernel.pci