gmane.linux.usb.general
http://blog.gmane.org/gmane.linux.usb.general
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1
1901-01-01T00:00+00:00
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FROM MRS SUSAN SHABANGU(OPEN THE ATTACH FILES)
http://comments.gmane.org/gmane.linux.usb.general/64923
<pre></pre>
FROM MRS SUSAN SHABANGU
2012-05-26T10:56:23
-
[PATCH] USB: ftdi-sio: Add support for RT Systems USB-RTS01 serial adapter
http://comments.gmane.org/gmane.linux.usb.general/64919
<pre>Add support for RT Systems USB-RTS01 USB to Serial adapter:
http://www.rtsystemsinc.com/Photos/USBRTS01.html
Tested by controlling Icom IC-718 amateur radio transceiver via hamlib.
Signed-off-by: Evan McNabb <evan-2BOxfIlzoBpAfugRpC6u6w< at >public.gmane.org>
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 8c084ea..bc912e5 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
< at >< at > -737,6 +737,7 < at >< at > static struct usb_device_id id_table_combined [] = {
{ USB_DEVICE(TELLDUS_VID, TELLDUS_TELLSTICK_PID) },
{ USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_SERIAL_VX7_PID) },
{ USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_CT29B_PID) },
+{ USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_RTS01_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_MAXSTREAM_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_PHI_FISCO_PID) },
{ USB_DEVICE(TML_VID, TML_USB_SERIAL_PID) },
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
index f3c7c78..5661c7e 100644
--- a/drivers/usb/serial/ftdi_sio_ids.h
+++ b/drivers/usb/serial/ftdi_sio_ids.h
< at >< at > -784,6 +784,7 < at >< at >
#define RTSYSTEMS_VID0x2100/* Vendor ID */
#define RTSYSTEMS_SERIAL_VX7_PID0x9e52/* Serial converter for VX-7 Radios using FT232RL */
#define RTSYSTEMS_CT29B_PID0x9e54/* CT29B Radio Cable */
+#define RTSYSTEMS_RTS01_PID0x9e57/* USB-RTS01 Radio Cable */
/*
</pre>
Evan McNabb
2012-05-26T02:46:14
-
looking for kickstart advice for CP2112, usb-i2c bridge
http://comments.gmane.org/gmane.linux.usb.general/64915
<pre>Hi all,
FYI, I'm a participating kernel device driver developer (i2c, w1, uio) but a
complete USB noob.
I want to make a proper in-kernel i2c master driver for the Silabs CP2112 usb
to smbus bridge (actually i2c compliant). The device is presented as HID and
uses reports for operation. (see
http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf )
Silabs expects it's customers to drive the chip from userspace using hiddev in
the kernel. This prevents users from harnessing all of the i2c client drivers
in the kernel, hence this effort. (unless I am missing something?)
I have my CP2112 eval kit with me and I'm ready to get started but I'd like
some pointers to get on the right track ASAP.
- as per device driver customs, which existing driver (patch or already merged)
should be used as template?
- where does such a driver belong? I'm guessing drivers/i2c/busses/i2c-cp2112.c
- would I use the same internal APIs that the IOCTLs of hiddev use for example?
- what else should I read/look-at/consider?
Note that aside from i2c, the chip has GPIOs. I want to properly register those
with the GPIO subsystem and implement an interrupt controller (like
gpio-adp5588.c) with these GPIOs. I know it's going to have latency, but this
would be acceptable for the i2c slaves we would put on it. Problem it, the
CP2112 doesn't have any described feature in it's API which suggests this would
be possible. Being a USB noob, my hardware guy told me something like "the USB
host controller can poll the chip for what you want and report if there's a
change". I still have some generic USB homework to do obviously, but can anyone
push me in the right direction for this?
Thanks for all the help!
Looking forward to submitting a patch!
/jfd--
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</pre>
Jean-François Dagenais
2012-05-26T00:52:33
-
(unknown)
http://comments.gmane.org/gmane.linux.usb.general/64914
<pre>
i am robothroli, Purchase manager from roli Merchant Ltd. We are
Import/export Company based in taiwan. We are interested in purchasing
your product and I would like to make an inquiry. Please inform me on:
Sample availability and price
Minimum order quantity
FOB Prices
Sincerely
Purchase Manager
robothroli
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</pre>
robothroli company
2012-05-25T13:45:54
-
[PATCH] usb: musb_gadget: fix crash caused by dangling pointer
http://comments.gmane.org/gmane.linux.usb.general/64909
<pre>usb_ep_ops.disable must clear external copy of the endpoint descriptor,
otherwise musb crashes after loading/unloading several gadget modules
in a row:
Unable to handle kernel paging request at virtual address bf013730
pgd = c0004000
[bf013730] *pgd=8f26d811, *pte=00000000, *ppte=00000000
Internal error: Oops: 7 [#1]
Modules linked in: g_cdc [last unloaded: g_file_storage]
CPU: 0 Not tainted (3.2.17 #647)
PC is at musb_gadget_enable+0x4c/0x24c
LR is at _raw_spin_lock_irqsave+0x4c/0x58
[<c027c030>] (musb_gadget_enable+0x4c/0x24c) from [<bf01b760>] (gether_connect+0x3c/0x19c [g_cdc])
[<bf01b760>] (gether_connect+0x3c/0x19c [g_cdc]) from [<bf01ba1c>] (ecm_set_alt+0x15c/0x180 [g_cdc])
[<bf01ba1c>] (ecm_set_alt+0x15c/0x180 [g_cdc]) from [<bf01ecd4>] (composite_setup+0x85c/0xac4 [g_cdc])
[<bf01ecd4>] (composite_setup+0x85c/0xac4 [g_cdc]) from [<c027b744>] (musb_g_ep0_irq+0x844/0x924)
[<c027b744>] (musb_g_ep0_irq+0x844/0x924) from [<c027a97c>] (musb_interrupt+0x79c/0x864)
[<c027a97c>] (musb_interrupt+0x79c/0x864) from [<c027aaa8>] (generic_interrupt+0x64/0x7c)
[<c027aaa8>] (generic_interrupt+0x64/0x7c) from [<c00797cc>] (handle_irq_event_percpu+0x28/0x178)
...
Cc: stable-u79uwXL29TY76Z2rM5mHXA< at >public.gmane.org # v3.1+
Signed-off-by: Grazvydas Ignotas <notasas-Re5JQEeQqe8AvxtiuMwx3w< at >public.gmane.org>
---
drivers/usb/musb/musb_gadget.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index f42c29b..95918da 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
< at >< at > -1232,6 +1232,7 < at >< at > static int musb_gadget_disable(struct usb_ep *ep)
}
musb_ep->desc = NULL;
+musb_ep->end_point.desc = NULL;
/* abort all pending DMA and requests */
nuke(musb_ep, -ESHUTDOWN);
</pre>
Grazvydas Ignotas
2012-05-25T21:21:33
-
[PATCH V4] USB: DWC3: Fix missed isoc IN transaction
http://comments.gmane.org/gmane.linux.usb.general/64887
<pre>If an IN transfer is missed on isoc endpoint, then driver must insure
that next ep_queue is properly handled.
This patch fixes this issue by starting a new transfer for next queued
request.
Signed-off-by: Pratyush Anand <pratyush.anand-qxv4g6HH51o< at >public.gmane.org>
Signed-off-by: Felip Balbi <balbi-l0cyMroinI0< at >public.gmane.org>
---
drivers/usb/dwc3/core.h | 3 ++
drivers/usb/dwc3/gadget.c | 73 ++++++++++++++++++++++++++++++---------------
2 files changed, 52 insertions(+), 24 deletions(-)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index c51cece..1210dae 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
< at >< at > -352,6 +352,7 < at >< at > struct dwc3_event_buffer {
* < at >number: endpoint number (1 - 15)
* < at >type: set to bmAttributes & USB_ENDPOINT_XFERTYPE_MASK
* < at >res_trans_idx: Resource transfer index
+ * < at >current_uf: Current uf received through last event parameter
* < at >interval: the intervall on which the ISOC transfer is started
* < at >name: a human readable name e.g. ep1out-bulk
* < at >direction: true for TX, false for RX
< at >< at > -376,6 +377,7 < at >< at > struct dwc3_ep {
#define DWC3_EP_WEDGE(1 << 2)
#define DWC3_EP_BUSY(1 << 4)
#define DWC3_EP_PENDING_REQUEST(1 << 5)
+#define DWC3_EP_MISSED_ISOC(1 << 6)
/* This last one is specific to EP0 */
#define DWC3_EP0_DIR_IN(1 << 31)
< at >< at > -385,6 +387,7 < at >< at > struct dwc3_ep {
u8number;
u8type;
u8res_trans_idx;
+u16current_uf;
u32interval;
charname[20];
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 4388d4f..b3f0750 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
< at >< at > -991,6 +991,34 < at >< at > static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
return 0;
}
+static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,
+struct dwc3_ep *dep, u32 cur_uf)
+{
+u32 uf;
+
+if (list_empty(&dep->request_list)) {
+dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",
+dep->name);
+return;
+}
+
+/* 4 micro frames in the future */
+uf = cur_uf + dep->interval * 4;
+
+__dwc3_gadget_kick_transfer(dep, uf, 1);
+}
+
+static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
+struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
+{
+u32 cur_uf, mask;
+
+mask = ~(dep->interval - 1);
+cur_uf = event->parameters & mask;
+
+__dwc3_gadget_start_isoc(dwc, dep, cur_uf);
+}
+
static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
{
struct dwc3*dwc = dep->dwc;
< at >< at > -1020,8 +1048,14 < at >< at > static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
list_add_tail(&req->list, &dep->request_list);
-if (usb_endpoint_xfer_isoc(dep->desc) && (dep->flags & DWC3_EP_BUSY))
-dep->flags |= DWC3_EP_PENDING_REQUEST;
+if (usb_endpoint_xfer_isoc(dep->desc)) {
+if (dep->flags & DWC3_EP_BUSY) {
+dep->flags |= DWC3_EP_PENDING_REQUEST;
+} else if (dep->flags & DWC3_EP_MISSED_ISOC) {
+__dwc3_gadget_start_isoc(dwc, dep, dep->current_uf);
+dep->flags &= ~DWC3_EP_MISSED_ISOC;
+}
+}
/*
* There are two special cases:
< at >< at > -1586,6 +1620,7 < at >< at > static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
struct dwc3_trb*trb;
unsigned intcount;
unsigned ints_pkt = 0;
+unsigned inttrb_status;
do {
req = next_request(&dep->req_queued);
< at >< at > -1611,9 +1646,18 < at >< at > static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
if (dep->direction) {
if (count) {
-dev_err(dwc->dev, "incomplete IN transfer %s\n",
-dep->name);
-status = -ECONNRESET;
+trb_status = DWC3_TRB_SIZE_TRBSTS(trb->size);
+if (trb_status == DWC3_TRBSTS_MISSED_ISOC) {
+dev_dbg(dwc->dev, "incomplete IN transfer %s\n",
+dep->name);
+dep->current_uf = event->parameters &
+~(dep->interval - 1);
+dep->flags |= DWC3_EP_MISSED_ISOC;
+} else {
+dev_err(dwc->dev, "incomplete IN transfer %s\n",
+dep->name);
+status = -ECONNRESET;
+}
}
} else {
if (count && (event->status & DEPEVT_STATUS_SHORT))
< at >< at > -1685,25 +1729,6 < at >< at > static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
}
}
-static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
-struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
-{
-u32 uf, mask;
-
-if (list_empty(&dep->request_list)) {
-dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",
-dep->name);
-return;
-}
-
-mask = ~(dep->interval - 1);
-uf = event->parameters & mask;
-/* 4 micro frames in the future */
-uf += dep->interval * 4;
-
-__dwc3_gadget_kick_transfer(dep, uf, 1);
-}
</pre>
Pratyush Anand
2012-05-25T13:24:56
-
[PATCH V3] USB: DWC3: Fix missed isoc IN transaction
http://comments.gmane.org/gmane.linux.usb.general/64884
<pre>If an IN transfer is missed on isoc endpoint, then driver must insure
that next ep_queue is properly handled.
This patch fixes this issue by starting a new transfer for next queued
request.
Signed-off-by: Pratyush Anand <pratyush.anand-qxv4g6HH51o< at >public.gmane.org>
Signed-off-by: Felip Balbi <balbi-l0cyMroinI0< at >public.gmane.org>
---
drivers/usb/dwc3/core.h | 3 ++
drivers/usb/dwc3/gadget.c | 72 ++++++++++++++++++++++++++++++---------------
2 files changed, 51 insertions(+), 24 deletions(-)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index c51cece..1210dae 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
< at >< at > -352,6 +352,7 < at >< at > struct dwc3_event_buffer {
* < at >number: endpoint number (1 - 15)
* < at >type: set to bmAttributes & USB_ENDPOINT_XFERTYPE_MASK
* < at >res_trans_idx: Resource transfer index
+ * < at >current_uf: Current uf received through last event parameter
* < at >interval: the intervall on which the ISOC transfer is started
* < at >name: a human readable name e.g. ep1out-bulk
* < at >direction: true for TX, false for RX
< at >< at > -376,6 +377,7 < at >< at > struct dwc3_ep {
#define DWC3_EP_WEDGE(1 << 2)
#define DWC3_EP_BUSY(1 << 4)
#define DWC3_EP_PENDING_REQUEST(1 << 5)
+#define DWC3_EP_MISSED_ISOC(1 << 6)
/* This last one is specific to EP0 */
#define DWC3_EP0_DIR_IN(1 << 31)
< at >< at > -385,6 +387,7 < at >< at > struct dwc3_ep {
u8number;
u8type;
u8res_trans_idx;
+u16current_uf;
u32interval;
charname[20];
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 4388d4f..9751b6b 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
< at >< at > -991,6 +991,34 < at >< at > static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
return 0;
}
+static void dwc3_gadget_start_isoc_uf(struct dwc3 *dwc,
+struct dwc3_ep *dep, u32 cur_uf)
+{
+u32 uf;
+
+if (list_empty(&dep->request_list)) {
+dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",
+dep->name);
+return;
+}
+
+/* 4 micro frames in the future */
+uf = cur_uf + dep->interval * 4;
+
+__dwc3_gadget_kick_transfer(dep, uf, 1);
+}
+
+static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
+struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
+{
+u32 cur_uf, mask;
+
+mask = ~(dep->interval - 1);
+cur_uf = event->parameters & mask;
+
+dwc3_gadget_start_isoc_uf(dwc, dep, cur_uf);
+}
+
static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
{
struct dwc3*dwc = dep->dwc;
< at >< at > -1020,8 +1048,14 < at >< at > static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
list_add_tail(&req->list, &dep->request_list);
-if (usb_endpoint_xfer_isoc(dep->desc) && (dep->flags & DWC3_EP_BUSY))
-dep->flags |= DWC3_EP_PENDING_REQUEST;
+if (usb_endpoint_xfer_isoc(dep->desc)) {
+if (dep->flags & DWC3_EP_BUSY) {
+dep->flags |= DWC3_EP_PENDING_REQUEST;
+} else if (dep->flags & DWC3_EP_MISSED_ISOC) {
+dwc3_gadget_start_isoc_uf(dwc, dep, dep->current_uf);
+dep->flags &= ~DWC3_EP_MISSED_ISOC;
+}
+}
/*
* There are two special cases:
< at >< at > -1611,9 +1645,18 < at >< at > static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
if (dep->direction) {
if (count) {
-dev_err(dwc->dev, "incomplete IN transfer %s\n",
-dep->name);
-status = -ECONNRESET;
+if (DWC3_TRB_SIZE_TRBSTS(trb->size) ==
+DWC3_TRBSTS_MISSED_ISOC) {
+dev_dbg(dwc->dev, "incomplete IN transfer %s\n",
+dep->name);
+dep->current_uf = event->parameters &
+~(dep->interval - 1);
+dep->flags |= DWC3_EP_MISSED_ISOC;
+} else {
+dev_err(dwc->dev, "incomplete IN transfer %s\n",
+dep->name);
+status = -ECONNRESET;
+}
}
} else {
if (count && (event->status & DEPEVT_STATUS_SHORT))
< at >< at > -1685,25 +1728,6 < at >< at > static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
}
}
-static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
-struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
-{
-u32 uf, mask;
-
-if (list_empty(&dep->request_list)) {
-dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",
-dep->name);
-return;
-}
-
-mask = ~(dep->interval - 1);
-uf = event->parameters & mask;
-/* 4 micro frames in the future */
-uf += dep->interval * 4;
-
-__dwc3_gadget_kick_transfer(dep, uf, 1);
-}
</pre>
Pratyush Anand
2012-05-25T12:48:40
-
Code flow from device connection to device node in /dev creation
http://comments.gmane.org/gmane.linux.usb.general/64865
<pre>Hi,
I have been looking into USB code. I have some basic idea of what is
going on but still I have some doubts which I try to explain here.
I have explained how the code flow takes place as per my understanding,
My current understanding:
1. USB Device connected physically.
2. khubd detects the connection of USB device (I hope that khub gets
interrupt from Host Controller).
3. Kernel notifies the user space about the device connection
(probably udev involves in this).
4. Driver for the corresponding device is detected using the device
VID/PID and loaded (modprobe is loading the driver).
5. A device file (nod in /dev - like /dev/ttyUSB0) is created for the
USB device.
Is my understanding correct?
Doubts and Questions:
1. How kernel notifies the user space about the device arrival? What
is the work of udev here?
2. How the device file gets associated with the driver (or device)?
i.e., When a user space code does a open or write call to the device
file (e.g., /dev/ttyUSB0) who determines the correct driver (or
device) and sends the commands to the device? How the device file to
physical device mapping magic works?
Thanks,
Prasanna Kumar T S M
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</pre>
prasannatsmkumar
2012-05-25T06:07:02
-
Why USB LPM is not supported on non-root hub?
http://comments.gmane.org/gmane.linux.usb.general/64859
<pre>Hi,
I have been looking into USB stuff. In the EHCI driver code I could
see the comment that "we only support lpm device connected to root hub
yet" in drivers/usb/host/ehci-pci.c line 466 (3.4 kernel -
http://lxr.free-electrons.com/source/drivers/usb/host/ehci-pci.c#L466).
Is there any reason to not support lpm in devices connected to hub
(other than root hub)? Also inside ehci_lpm_check function in
drivers/usb/host/ehci-lpm.c (3.4 kernel -
http://lxr.free-electrons.com/source/drivers/usb/host/ehci-lpm.c) the
USB device is asked to go to LPM mode and there is a wait for 10ms. I
guess the LPM transition (L0 to L1 state transition) should take place
within some micro seconds then why should we wait for 10ms for ACK?
I will greatly appreciate if I could help in someway in solving
technical difficulties (if any).
Thanks and Regards,
Prasanna Kumar T S M
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</pre>
prasannatsmkumar
2012-05-25T05:54:11
-
[PATCH] usb: chipidea: select USB_EHCI_ROOT_HUB_TT in USB_CHIPIDEA_HOST of Kconfig
http://comments.gmane.org/gmane.linux.usb.general/64857
<pre>ci13xxx host needs Root Hub Transaction Translators.
Reported-by: Shawn Guo <shawn.guo-KZfg59tc24xl57MIdRCFDg< at >public.gmane.org>
Signed-off-by: Richard Zhao <richard.zhao-KZfg59tc24xl57MIdRCFDg< at >public.gmane.org>
---
drivers/usb/chipidea/Kconfig | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index fd36dc8..8337fb5 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
< at >< at > -20,6 +20,7 < at >< at > config USB_CHIPIDEA_UDC
config USB_CHIPIDEA_HOST
bool "ChipIdea host controller"
+select USB_EHCI_ROOT_HUB_TT
help
Say Y here to enable host controller functionality of the
ChipIdea driver.
</pre>
Richard Zhao
2012-05-25T02:44:47
-
[PATCH v3 00/12] add imx usb driver for mx28/6x
http://comments.gmane.org/gmane.linux.usb.general/64844
<pre>The work is based on ci13xxx rework done by Alexander Shishkin.
Status:
- this version only support host
- usbotg controler works at host role
Changes since V2:
- Rebase to Alex's tree
- Use regulator to control vbus power
- Remove ARCH check in Kconfig, but add OF_DEV check.
- Other changes according laster version comments.
Richard Zhao (12):
usb: otg: add notify_connect/notify_disconnect callback
usb: chipidea: permit driver bindings pass phy pointer
usb: ehci-hcd: notify phy when connect change
usb: otg: add basic mxs phy driver support
usb: chipidea: add imx platform driver
ARM: imx6q: correct device name of usbphy and usb controller clock
export
ARM: imx6q: add config-on-boot gpios
ARM: imx6q: add usbphy clocks
ARM: imx6q: disable usb charger detector
ARM: dts: imx6q-sabrelite: add usb devices
ARM: mxs: clk_register_clkdev mx28 usb clocks
ARM: dts: imx28-evk: add usb devices
.../devicetree/bindings/arm/config-on-boot.txt | 12 ++
.../devicetree/bindings/usb/ci13xxx-imx.txt | 20 ++
Documentation/devicetree/bindings/usb/mxs-phy.txt | 13 ++
arch/arm/boot/dts/imx28-evk.dts | 36 ++++
arch/arm/boot/dts/imx28.dtsi | 12 +-
arch/arm/boot/dts/imx6q-sabrelite.dts | 35 ++++
arch/arm/boot/dts/imx6q.dtsi | 36 ++++-
arch/arm/mach-imx/clk-imx6q.c | 12 +-
arch/arm/mach-imx/mach-imx6q.c | 59 ++++++
drivers/clk/mxs/clk-imx28.c | 4 +
drivers/usb/chipidea/Makefile | 3 +
drivers/usb/chipidea/ci.h | 2 +
drivers/usb/chipidea/ci13xxx_imx.c | 189 ++++++++++++++++++
drivers/usb/chipidea/core.c | 4 +
drivers/usb/chipidea/host.c | 1 +
drivers/usb/chipidea/udc.c | 11 +-
drivers/usb/host/ehci-hcd.c | 14 ++
drivers/usb/otg/Kconfig | 8 +
drivers/usb/otg/Makefile | 1 +
drivers/usb/otg/mxs-phy.c | 204 ++++++++++++++++++++
include/linux/usb/chipidea.h | 3 +
include/linux/usb/otg.h | 21 ++
22 files changed, 690 insertions(+), 10 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/config-on-boot.txt
create mode 100644 Documentation/devicetree/bindings/usb/ci13xxx-imx.txt
create mode 100644 Documentation/devicetree/bindings/usb/mxs-phy.txt
create mode 100644 drivers/usb/chipidea/ci13xxx_imx.c
create mode 100644 drivers/usb/otg/mxs-phy.c
</pre>
Richard Zhao
2012-05-25T02:24:13
-
[PATCH v5] usb: gadget: mv: Add USB 3.0 device driver for Marvell PXA2128 chip.
http://comments.gmane.org/gmane.linux.usb.general/64843
<pre>It supports Marvell USB 3.0 device controller for PXA2128 chip.
Signed-off-by: Yu Xu <yuxu-eYqpPyKDWXRBDgjK7y7TUQ< at >public.gmane.org>
---
drivers/usb/gadget/Kconfig | 9 +
drivers/usb/gadget/Makefile | 1 +
drivers/usb/gadget/mv_u3d.h | 320 ++++++
drivers/usb/gadget/mv_u3d_core.c | 2074 ++++++++++++++++++++++++++++++++++++++
4 files changed, 2404 insertions(+)
create mode 100644 drivers/usb/gadget/mv_u3d.h
create mode 100644 drivers/usb/gadget/mv_u3d_core.c
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 1f93861..4eb92d0 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
< at >< at > -316,6 +316,15 < at >< at > config USB_MV_UDC
USB2.0 OTG controller, which can be configured as high speed or
full speed USB peripheral.
+config USB_MV_U3D
+tristate "MARVELL PXA2128 USB 3.0 controller"
+depends on CPU_MMP3
+select USB_GADGET_DUALSPEED
+select USB_GADGET_SUPERSPEED
+help
+ MARVELL PXA2128 Processor series include a super speed USB3.0 device
+ controller, which support super speed USB peripheral.
+
#
# Controllers available in both integrated and discrete versions
#
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index b7f6eef..3e7cdd7 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
< at >< at > -31,6 +31,7 < at >< at > obj-$(CONFIG_USB_MV_UDC)+= mv_udc.o
mv_udc-y:= mv_udc_core.o
obj-$(CONFIG_USB_CI13XXX_MSM)+= ci13xxx_msm.o
obj-$(CONFIG_USB_FUSB300)+= fusb300_udc.o
+obj-$(CONFIG_USB_MV_U3D)+= mv_u3d_core.o
#
# USB gadget drivers
diff --git a/drivers/usb/gadget/mv_u3d.h b/drivers/usb/gadget/mv_u3d.h
new file mode 100644
index 0000000..e32a787
--- /dev/null
+++ b/drivers/usb/gadget/mv_u3d.h
< at >< at > -0,0 +1,320 < at >< at >
+/*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#ifndef __MV_U3D_H
+#define __MV_U3D_H
+
+#define MV_U3D_EP_CONTEXT_ALIGNMENT32
+#define MV_U3D_TRB_ALIGNMENT16
+#define MV_U3D_DMA_BOUNDARY4096
+#define MV_U3D_EP0_MAX_PKT_SIZE512
+
+/* ep0 transfer state */
+#define MV_U3D_WAIT_FOR_SETUP0
+#define MV_U3D_DATA_STATE_XMIT1
+#define MV_U3D_DATA_STATE_NEED_ZLP2
+#define MV_U3D_WAIT_FOR_OUT_STATUS3
+#define MV_U3D_DATA_STATE_RECV4
+#define MV_U3D_STATUS_STAGE5
+
+#define MV_U3D_EP_MAX_LENGTH_TRANSFER0x10000
+
+/* USB3 Interrupt Status */
+#define MV_U3D_USBINT_SETUP0x00000001
+#define MV_U3D_USBINT_RX_COMPLETE0x00000002
+#define MV_U3D_USBINT_TX_COMPLETE0x00000004
+#define MV_U3D_USBINT_UNDER_RUN0x00000008
+#define MV_U3D_USBINT_RXDESC_ERR0x00000010
+#define MV_U3D_USBINT_TXDESC_ERR0x00000020
+#define MV_U3D_USBINT_RX_TRB_COMPLETE0x00000040
+#define MV_U3D_USBINT_TX_TRB_COMPLETE0x00000080
+#define MV_U3D_USBINT_VBUS_VALID0x00010000
+#define MV_U3D_USBINT_STORAGE_CMD_FULL0x00020000
+#define MV_U3D_USBINT_LINK_CHG0x01000000
+
+/* USB3 Interrupt Enable */
+#define MV_U3D_INTR_ENABLE_SETUP0x00000001
+#define MV_U3D_INTR_ENABLE_RX_COMPLETE0x00000002
+#define MV_U3D_INTR_ENABLE_TX_COMPLETE0x00000004
+#define MV_U3D_INTR_ENABLE_UNDER_RUN0x00000008
+#define MV_U3D_INTR_ENABLE_RXDESC_ERR0x00000010
+#define MV_U3D_INTR_ENABLE_TXDESC_ERR0x00000020
+#define MV_U3D_INTR_ENABLE_RX_TRB_COMPLETE0x00000040
+#define MV_U3D_INTR_ENABLE_TX_TRB_COMPLETE0x00000080
+#define MV_U3D_INTR_ENABLE_RX_BUFFER_ERR0x00000100
+#define MV_U3D_INTR_ENABLE_VBUS_VALID0x00010000
+#define MV_U3D_INTR_ENABLE_STORAGE_CMD_FULL0x00020000
+#define MV_U3D_INTR_ENABLE_LINK_CHG0x01000000
+#define MV_U3D_INTR_ENABLE_PRIME_STATUS0x02000000
+
+/* USB3 Link Change */
+#define MV_U3D_LINK_CHANGE_LINK_UP0x00000001
+#define MV_U3D_LINK_CHANGE_SUSPEND0x00000002
+#define MV_U3D_LINK_CHANGE_RESUME0x00000004
+#define MV_U3D_LINK_CHANGE_WRESET0x00000008
+#define MV_U3D_LINK_CHANGE_HRESET0x00000010
+#define MV_U3D_LINK_CHANGE_VBUS_INVALID0x00000020
+#define MV_U3D_LINK_CHANGE_INACT0x00000040
+#define MV_U3D_LINK_CHANGE_DISABLE_AFTER_U00x00000080
+#define MV_U3D_LINK_CHANGE_U10x00000100
+#define MV_U3D_LINK_CHANGE_U20x00000200
+#define MV_U3D_LINK_CHANGE_U30x00000400
+
+/* bridge setting */
+#define MV_U3D_BRIDGE_SETTING_VBUS_VALID(1 << 16)
+
+/* Command Register Bit Masks */
+#define MV_U3D_CMD_RUN_STOP0x00000001
+#define MV_U3D_CMD_CTRL_RESET0x00000002
+
+/* ep control register */
+#define MV_U3D_EPXCR_EP_TYPE_CONTROL0
+#define MV_U3D_EPXCR_EP_TYPE_ISOC1
+#define MV_U3D_EPXCR_EP_TYPE_BULK2
+#define MV_U3D_EPXCR_EP_TYPE_INT3
+#define MV_U3D_EPXCR_EP_ENABLE_SHIFT4
+#define MV_U3D_EPXCR_MAX_BURST_SIZE_SHIFT12
+#define MV_U3D_EPXCR_MAX_PACKET_SIZE_SHIFT16
+#define MV_U3D_USB_BULK_BURST_OUT6
+#define MV_U3D_USB_BULK_BURST_IN14
+
+#define MV_U3D_EPXCR_EP_FLUSH(1 << 7)
+#define MV_U3D_EPXCR_EP_HALT(1 << 1)
+#define MV_U3D_EPXCR_EP_INIT(1)
+
+/* TX/RX Status Register */
+#define MV_U3D_XFERSTATUS_COMPLETE_SHIFT24
+#define MV_U3D_COMPLETE_INVALID0
+#define MV_U3D_COMPLETE_SUCCESS1
+#define MV_U3D_COMPLETE_BUFF_ERR2
+#define MV_U3D_COMPLETE_SHORT_PACKET3
+#define MV_U3D_COMPLETE_TRB_ERR5
+#define MV_U3D_XFERSTATUS_TRB_LENGTH_MASK(0xFFFFFF)
+
+#define MV_U3D_USB_LINK_BYPASS_VBUS0x8
+
+#define MV_U3D_LTSSM_PHY_INIT_DONE0x80000000
+#define MV_U3D_LTSSM_NEVER_GO_COMPLIANCE0x40000000
+
+#define MV_U3D_USB3_OP_REGS_OFFSET0x100
+#define MV_U3D_USB3_PHY_OFFSET0xB800
+
+#define DCS_ENABLE0x1
+
+/* timeout */
+#define MV_U3D_RESET_TIMEOUT10000
+#define MV_U3D_FLUSH_TIMEOUT100000
+#define MV_U3D_OWN_TIMEOUT10000
+#define LOOPS_USEC_SHIFT4
+#define LOOPS_USEC(1 << LOOPS_USEC_SHIFT)
+#define LOOPS(timeout)((timeout) >> LOOPS_USEC_SHIFT)
+
+/* ep direction */
+#define MV_U3D_EP_DIR_IN1
+#define MV_U3D_EP_DIR_OUT0
+#define mv_u3d_ep_dir(ep)(((ep)->ep_num == 0) ? \
+((ep)->u3d->ep0_dir) : ((ep)->direction))
+
+/* usb capability registers */
+struct mv_u3d_cap_regs {
+u32rsvd[5];
+u32dboff;/* doorbell register offset */
+u32rtsoff;/* runtime register offset */
+u32vuoff;/* vendor unique register offset */
+};
+
+/* operation registers */
+struct mv_u3d_op_regs {
+u32usbcmd;/* Command register */
+u32rsvd1[11];
+u32dcbaapl;/* Device Context Base Address low register */
+u32dcbaaph;/* Device Context Base Address high register */
+u32rsvd2[243];
+u32portsc;/* port status and control register*/
+u32portlinkinfo;/* port link info register*/
+u32rsvd3[9917];
+u32doorbell;/* doorbell register */
+};
+
+/* control enpoint enable registers */
+struct epxcr {
+u32epxoutcr0;/* ep out control 0 register */
+u32epxoutcr1;/* ep out control 1 register */
+u32epxincr0;/* ep in control 0 register */
+u32epxincr1;/* ep in control 1 register */
+};
+
+/* transfer status registers */
+struct xferstatus {
+u32curdeqlo;/* current TRB pointer low */
+u32curdeqhi;/* current TRB pointer high */
+u32statuslo;/* transfer status low */
+u32statushi;/* transfer status high */
+};
+
+/* vendor unique control registers */
+struct mv_u3d_vuc_regs {
+u32ctrlepenable;/* control endpoint enable register */
+u32setuplock;/* setup lock register */
+u32endcomplete;/* endpoint transfer complete register */
+u32intrcause;/* interrupt cause register */
+u32intrenable;/* interrupt enable register */
+u32trbcomplete;/* TRB complete register */
+u32linkchange;/* link change register */
+u32rsvd1[5];
+u32trbunderrun;/* TRB underrun register */
+u32rsvd2[43];
+u32bridgesetting;/* bridge setting register */
+u32rsvd3[7];
+struct xferstatustxst[16];/* TX status register */
+struct xferstatusrxst[16];/* RX status register */
+u32ltssm;/* LTSSM control register */
+u32pipe;/* PIPE control register */
+u32linkcr0;/* link control 0 register */
+u32linkcr1;/* link control 1 register */
+u32rsvd6[60];
+u32mib0;/* MIB0 counter register */
+u32usblink;/* usb link control register */
+u32ltssmstate;/* LTSSM state register */
+u32linkerrorcause;/* link error cause register */
+u32rsvd7[60];
+u32devaddrtiebrkr;/* device address and tie breaker */
+u32itpinfo0;/* ITP info 0 register */
+u32itpinfo1;/* ITP info 1 register */
+u32rsvd8[61];
+struct epxcrepcr[16];/* ep control register */
+u32rsvd9[64];
+u32phyaddr;/* PHY address register */
+u32phydata;/* PHY data register */
+};
+
+/* Endpoint context structure */
+struct mv_u3d_ep_context {
+u32rsvd0;
+u32rsvd1;
+u32trb_addr_lo;/* TRB address low 32 bit */
+u32trb_addr_hi;/* TRB address high 32 bit */
+u32rsvd2;
+u32rsvd3;
+struct usb_ctrlrequest setup_buffer;/* setup data buffer */
+};
+
+/* TRB control data structure */
+struct mv_u3d_trb_ctrl {
+u32own:1;/* owner of TRB */
+u32rsvd1:3;
+u32chain:1;/* associate this TRB with the
+next TRB on the Ring */
+u32ioc:1;/* interrupt on complete */
+u32rsvd2:4;
+u32type:6;/* TRB type */
+#define TYPE_NORMAL1
+#define TYPE_DATA3
+#define TYPE_LINK6
+u32dir:1;/* Working at data stage of control endpoint
+operation. 0 is OUT and 1 is IN. */
+u32rsvd3:15;
+};
+
+/* TRB data structure
+ * For multiple TRB, all the TRBs' physical address should be continuous.
+ */
+struct mv_u3d_trb_hw {
+u32buf_addr_lo;/* data buffer address low 32 bit */
+u32buf_addr_hi;/* data buffer address high 32 bit */
+u32trb_len;/* transfer length */
+struct mv_u3d_trb_ctrlctrl;/* TRB control data */
+};
+
+/* TRB structure */
+struct mv_u3d_trb {
+struct mv_u3d_trb_hw *trb_hw;/* point to the trb_hw structure */
+dma_addr_t trb_dma;/* dma address for this trb_hw */
+struct list_head trb_list;/* trb list */
+};
+
+/* device data structure */
+struct mv_u3d {
+struct usb_gadgetgadget;
+struct usb_gadget_driver*driver;
+spinlock_tlock;/* device lock */
+struct completion*done;
+struct device*dev;
+intirq;
+
+/* usb controller registers */
+struct mv_u3d_cap_regs __iomem*cap_regs;
+struct mv_u3d_op_regs __iomem*op_regs;
+struct mv_u3d_vuc_regs __iomem*vuc_regs;
+void __iomem*phy_regs;
+
+unsigned intmax_eps;
+struct mv_u3d_ep_context*ep_context;
+size_tep_context_size;
+dma_addr_tep_context_dma;
+
+struct dma_pool*trb_pool; /* for TRB data structure */
+struct mv_u3d_ep*eps;
+
+struct mv_u3d_req*status_req; /* ep0 status request */
+struct usb_ctrlrequestlocal_setup_buff; /* store setup data*/
+
+unsigned intresume_state;/* USB state to resume */
+unsigned intusb_state;/* USB current state */
+unsigned intep0_state;/* Endpoint zero state */
+unsigned intep0_dir;
+
+unsigned intdev_addr;/* device address */
+
+unsigned interrors;
+
+unsignedsoftconnect:1;
+unsignedvbus_active:1;/* vbus is active or not */
+unsignedremote_wakeup:1; /* support remote wakeup */
+unsignedclock_gating:1;/* clock gating or not */
+unsignedactive:1;/* udc is active or not */
+unsignedvbus_valid_detect:1; /* udc vbus detection */
+
+struct mv_usb_addon_irq *vbus;
+unsigned intpower;
+
+struct clk*clk;
+};
+
+/* endpoint data structure */
+struct mv_u3d_ep {
+struct usb_epep;
+struct mv_u3d*u3d;
+struct list_headqueue;/* ep request queued hardware */
+struct list_headreq_list; /* list of ep request */
+struct mv_u3d_ep_context*ep_context; /* ep context */
+u32direction;
+charname[14];
+u32processing; /* there is ep request
+queued on haredware */
+spinlock_treq_lock; /* ep lock */
+unsignedwedge:1;
+unsignedenabled:1;
+unsignedep_type:2;
+unsignedep_num:8;
+};
+
+/* request data structure */
+struct mv_u3d_req {
+struct usb_requestreq;
+struct mv_u3d_ep*ep;
+struct list_headqueue;/* ep requst queued on hardware */
+struct list_headlist;/* ep request list */
+struct list_headtrb_list; /* trb list of a request */
+
+struct mv_u3d_trb*trb_head; /* point to first trb of a request */
+unsignedtrb_count; /* TRB number in the chain */
+unsignedchain; /* TRB chain or not */
+};
+
+#endif
diff --git a/drivers/usb/gadget/mv_u3d_core.c b/drivers/usb/gadget/mv_u3d_core.c
new file mode 100644
index 0000000..ffccba5
--- /dev/null
+++ b/drivers/usb/gadget/mv_u3d_core.c
< at >< at > -0,0 +1,2074 < at >< at >
+/*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmapool.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/timer.h>
+#include <linux/list.h>
+#include <linux/notifier.h>
+#include <linux/interrupt.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/pm.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/mv_usb.h>
+#include <linux/clk.h>
+#include <asm/system.h>
+#include <asm/unaligned.h>
+#include <asm/byteorder.h>
+
+#include "mv_u3d.h"
+
+#define DRIVER_DESC"Marvell PXA USB3.0 Device Controller driver"
+
+static const char driver_name[] = "mv_u3d";
+static const char driver_desc[] = DRIVER_DESC;
+
+static void mv_u3d_nuke(struct mv_u3d_ep *ep, int status);
+static void mv_u3d_stop_activity(struct mv_u3d *u3d,
+struct usb_gadget_driver *driver);
+
+/* for endpoint 0 operations */
+static const struct usb_endpoint_descriptor mv_u3d_ep0_desc = {
+.bLength =USB_DT_ENDPOINT_SIZE,
+.bDescriptorType =USB_DT_ENDPOINT,
+.bEndpointAddress =0,
+.bmAttributes =USB_ENDPOINT_XFER_CONTROL,
+.wMaxPacketSize =MV_U3D_EP0_MAX_PKT_SIZE,
+};
+
+static void mv_u3d_ep0_reset(struct mv_u3d *u3d)
+{
+struct mv_u3d_ep *ep;
+u32 epxcr;
+int i;
+
+for (i = 0; i < 2; i++) {
+ep = &u3d->eps[i];
+ep->u3d = u3d;
+
+/* ep0 ep context, ep0 in and out share the same ep context */
+ep->ep_context = &u3d->ep_context[1];
+}
+
+/* reset ep state machine */
+/* reset ep0 out */
+epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxoutcr0);
+epxcr |= MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0);
+udelay(5);
+epxcr &= ~MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0);
+
+epxcr = ((MV_U3D_EP0_MAX_PKT_SIZE
+<< MV_U3D_EPXCR_MAX_PACKET_SIZE_SHIFT)
+| (1 << MV_U3D_EPXCR_MAX_BURST_SIZE_SHIFT)
+| (1 << MV_U3D_EPXCR_EP_ENABLE_SHIFT)
+| MV_U3D_EPXCR_EP_TYPE_CONTROL);
+iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr1);
+
+/* reset ep0 in */
+epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxincr0);
+epxcr |= MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxincr0);
+udelay(5);
+epxcr &= ~MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxincr0);
+
+epxcr = ((MV_U3D_EP0_MAX_PKT_SIZE
+<< MV_U3D_EPXCR_MAX_PACKET_SIZE_SHIFT)
+| (1 << MV_U3D_EPXCR_MAX_BURST_SIZE_SHIFT)
+| (1 << MV_U3D_EPXCR_EP_ENABLE_SHIFT)
+| MV_U3D_EPXCR_EP_TYPE_CONTROL);
+iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxincr1);
+}
+
+static void mv_u3d_ep0_stall(struct mv_u3d *u3d)
+{
+u32 tmp;
+dev_dbg(u3d->dev, "%s\n", __func__);
+
+/* set TX and RX to stall */
+tmp = ioread32(&u3d->vuc_regs->epcr[0].epxoutcr0);
+tmp |= MV_U3D_EPXCR_EP_HALT;
+iowrite32(tmp, &u3d->vuc_regs->epcr[0].epxoutcr0);
+
+tmp = ioread32(&u3d->vuc_regs->epcr[0].epxincr0);
+tmp |= MV_U3D_EPXCR_EP_HALT;
+iowrite32(tmp, &u3d->vuc_regs->epcr[0].epxincr0);
+
+/* update ep0 state */
+u3d->ep0_state = MV_U3D_WAIT_FOR_SETUP;
+u3d->ep0_dir = MV_U3D_EP_DIR_OUT;
+}
+
+static int mv_u3d_process_ep_req(struct mv_u3d *u3d, int index,
+struct mv_u3d_req *curr_req)
+{
+struct mv_u3d_trb*curr_trb;
+dma_addr_t cur_deq_lo;
+struct mv_u3d_ep_context*curr_ep_context;
+int trb_complete, actual, remaining_length;
+int direction, ep_num;
+int retval = 0;
+u32 tmp, status, length;
+
+curr_ep_context = &u3d->ep_context[index];
+direction = index % 2;
+ep_num = index / 2;
+
+trb_complete = 0;
+actual = curr_req->req.length;
+
+while (!list_empty(&curr_req->trb_list)) {
+curr_trb = list_entry(curr_req->trb_list.next,
+struct mv_u3d_trb, trb_list);
+if (!curr_trb->trb_hw->ctrl.own) {
+dev_err(u3d->dev, "%s, TRB own error!\n",
+u3d->eps[index].name);
+return 1;
+}
+
+curr_trb->trb_hw->ctrl.own = 0;
+if (direction == MV_U3D_EP_DIR_OUT) {
+tmp = ioread32(&u3d->vuc_regs->rxst[ep_num].statuslo);
+cur_deq_lo =
+ioread32(&u3d->vuc_regs->rxst[ep_num].curdeqlo);
+} else {
+tmp = ioread32(&u3d->vuc_regs->txst[ep_num].statuslo);
+cur_deq_lo =
+ioread32(&u3d->vuc_regs->txst[ep_num].curdeqlo);
+}
+
+status = tmp >> MV_U3D_XFERSTATUS_COMPLETE_SHIFT;
+length = tmp & MV_U3D_XFERSTATUS_TRB_LENGTH_MASK;
+
+if (status == MV_U3D_COMPLETE_SUCCESS ||
+(status == MV_U3D_COMPLETE_SHORT_PACKET &&
+direction == MV_U3D_EP_DIR_OUT)) {
+remaining_length += length;
+actual -= remaining_length;
+} else {
+dev_err(u3d->dev,
+"complete_tr error: ep=%d %s: error = 0x%x\n",
+index >> 1, direction ? "SEND" : "RECV",
+status);
+retval = -EPROTO;
+}
+
+list_del_init(&curr_trb->trb_list);
+}
+if (retval)
+return retval;
+
+curr_req->req.actual = actual;
+return 0;
+}
+
+/*
+ * mv_u3d_done() - retire a request; caller blocked irqs
+ * < at >status : request status to be set, only works when
+ * request is still in progress.
+ */
+static
+void mv_u3d_done(struct mv_u3d_ep *ep, struct mv_u3d_req *req, int status)
+{
+struct mv_u3d *u3d = (struct mv_u3d *)ep->u3d;
+
+dev_dbg(u3d->dev, "mv_u3d_done: remove req->queue\n");
+/* Removed the req from ep queue */
+list_del_init(&req->queue);
+
+/* req.status should be set as -EINPROGRESS in ep_queue() */
+if (req->req.status == -EINPROGRESS)
+req->req.status = status;
+else
+status = req->req.status;
+
+/* Free trb for the request */
+if (!req->chain)
+dma_pool_free(u3d->trb_pool,
+req->trb_head->trb_hw, req->trb_head->trb_dma);
+else {
+dma_unmap_single(ep->u3d->gadget.dev.parent,
+(dma_addr_t)req->trb_head->trb_dma,
+req->trb_count * sizeof(struct mv_u3d_trb_hw),
+DMA_BIDIRECTIONAL);
+kfree(req->trb_head->trb_hw);
+}
+kfree(req->trb_head);
+
+usb_gadget_unmap_request(&u3d->gadget, &req->req, mv_u3d_ep_dir(ep));
+
+if (status && (status != -ESHUTDOWN)) {
+dev_dbg(u3d->dev, "complete %s req %p stat %d len %u/%u",
+ep->ep.name, &req->req, status,
+req->req.actual, req->req.length);
+}
+
+spin_unlock(&ep->u3d->lock);
+/*
+ * complete() is from gadget layer,
+ * eg fsg->bulk_in_complete()
+ */
+if (req->req.complete)
+req->req.complete(&ep->ep, &req->req);
+
+spin_lock(&ep->u3d->lock);
+}
+
+static int mv_u3d_queue_trb(struct mv_u3d_ep *ep, struct mv_u3d_req *req)
+{
+u32 tmp, direction;
+struct mv_u3d *u3d;
+struct mv_u3d_ep_context *ep_context;
+int retval = 0;
+
+u3d = ep->u3d;
+direction = mv_u3d_ep_dir(ep);
+
+/* ep0 in and out share the same ep context slot 1*/
+if (ep->ep_num == 0)
+ep_context = &(u3d->ep_context[1]);
+else
+ep_context = &(u3d->ep_context[ep->ep_num * 2 + direction]);
+
+/* check if the pipe is empty or not */
+if (!list_empty(&ep->queue)) {
+dev_err(u3d->dev, "add trb to non-empty queue!\n");
+retval = -ENOMEM;
+WARN_ON(1);
+} else {
+ep_context->rsvd0 = cpu_to_le32(1);
+ep_context->rsvd1 = 0;
+
+/* Configure the trb address and set the DCS bit.
+ * Both DCS bit and own bit in trb should be set.
+ */
+ep_context->trb_addr_lo =
+cpu_to_le32(req->trb_head->trb_dma | DCS_ENABLE);
+ep_context->trb_addr_hi = 0;
+
+/* Ensure that updates to the EP Context will
+ * occure before Ring Bell.
+ */
+wmb();
+
+/* ring bell the ep */
+if (ep->ep_num == 0)
+tmp = 0x1;
+else
+tmp = ep->ep_num * 2
++ ((direction == MV_U3D_EP_DIR_OUT) ? 0 : 1);
+
+iowrite32(tmp, &u3d->op_regs->doorbell);
+}
+return retval;
+}
+
+static struct mv_u3d_trb *mv_u3d_build_trb_one(struct mv_u3d_req *req,
+unsigned *length, dma_addr_t *dma)
+{
+u32 temp;
+unsigned int direction;
+struct mv_u3d_trb *trb;
+struct mv_u3d_trb_hw *trb_hw;
+struct mv_u3d *u3d;
+
+/* how big will this transfer be? */
+*length = req->req.length - req->req.actual;
+BUG_ON(*length > (unsigned)MV_U3D_EP_MAX_LENGTH_TRANSFER);
+
+u3d = req->ep->u3d;
+
+trb = kzalloc(sizeof(*trb), GFP_ATOMIC);
+if (!trb) {
+dev_err(u3d->dev, "%s, trb alloc fail\n", __func__);
+return NULL;
+}
+
+/*
+ * Be careful that no _GFP_HIGHMEM is set,
+ * or we can not use dma_to_virt
+ * cannot use GFP_KERNEL in spin lock
+ */
+trb_hw = dma_pool_alloc(u3d->trb_pool, GFP_ATOMIC, dma);
+if (!trb_hw) {
+dev_err(u3d->dev,
+"%s, dma_pool_alloc fail\n", __func__);
+return NULL;
+}
+trb->trb_dma = *dma;
+trb->trb_hw = trb_hw;
+
+/* initialize buffer page pointers */
+temp = (u32)(req->req.dma + req->req.actual);
+
+trb_hw->buf_addr_lo = cpu_to_le32(temp);
+trb_hw->buf_addr_hi = 0;
+trb_hw->trb_len = cpu_to_le32(*length);
+trb_hw->ctrl.own = 1;
+
+if (req->ep->ep_num == 0)
+trb_hw->ctrl.type = TYPE_DATA;
+else
+trb_hw->ctrl.type = TYPE_NORMAL;
+
+req->req.actual += *length;
+
+direction = mv_u3d_ep_dir(req->ep);
+if (direction == MV_U3D_EP_DIR_IN)
+trb_hw->ctrl.dir = 1;
+else
+trb_hw->ctrl.dir = 0;
+
+/* Enable interrupt for the last trb of a request */
+if (!req->req.no_interrupt)
+trb_hw->ctrl.ioc = 1;
+
+trb_hw->ctrl.chain = 0;
+
+wmb();
+return trb;
+}
+
+static int mv_u3d_build_trb_chain(struct mv_u3d_req *req, unsigned *length,
+struct mv_u3d_trb *trb, int *is_last)
+{
+u32 temp;
+unsigned int direction;
+struct mv_u3d *u3d;
+
+/* how big will this transfer be? */
+*length = min(req->req.length - req->req.actual,
+(unsigned)MV_U3D_EP_MAX_LENGTH_TRANSFER);
+
+u3d = req->ep->u3d;
+
+trb->trb_dma = 0;
+
+/* initialize buffer page pointers */
+temp = (u32)(req->req.dma + req->req.actual);
+
+trb->trb_hw->buf_addr_lo = cpu_to_le32(temp);
+trb->trb_hw->buf_addr_hi = 0;
+trb->trb_hw->trb_len = cpu_to_le32(*length);
+trb->trb_hw->ctrl.own = 1;
+
+if (req->ep->ep_num == 0)
+trb->trb_hw->ctrl.type = TYPE_DATA;
+else
+trb->trb_hw->ctrl.type = TYPE_NORMAL;
+
+req->req.actual += *length;
+
+direction = mv_u3d_ep_dir(req->ep);
+if (direction == MV_U3D_EP_DIR_IN)
+trb->trb_hw->ctrl.dir = 1;
+else
+trb->trb_hw->ctrl.dir = 0;
+
+/* zlp is needed if req->req.zero is set */
+if (req->req.zero) {
+if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
+*is_last = 1;
+else
+*is_last = 0;
+} else if (req->req.length == req->req.actual)
+*is_last = 1;
+else
+*is_last = 0;
+
+/* Enable interrupt for the last trb of a request */
+if (*is_last && !req->req.no_interrupt)
+trb->trb_hw->ctrl.ioc = 1;
+
+if (*is_last)
+trb->trb_hw->ctrl.chain = 0;
+else {
+trb->trb_hw->ctrl.chain = 1;
+dev_dbg(u3d->dev, "chain trb\n");
+}
+
+wmb();
+
+return 0;
+}
+
+/* generate TRB linked list for a request
+ * usb controller only supports continous trb chain,
+ * that trb structure physical address should be continous.
+ */
+static int mv_u3d_req_to_trb(struct mv_u3d_req *req)
+{
+unsigned count;
+int is_last;
+struct mv_u3d_trb *trb;
+struct mv_u3d_trb_hw *trb_hw;
+struct mv_u3d *u3d;
+dma_addr_t dma;
+unsigned length;
+unsigned trb_num;
+
+u3d = req->ep->u3d;
+
+INIT_LIST_HEAD(&req->trb_list);
+
+length = req->req.length - req->req.actual;
+/* normally the request transfer length is less than 16KB.
+ * we use buil_trb_one() to optimize it.
+ */
+if (length <= (unsigned)MV_U3D_EP_MAX_LENGTH_TRANSFER) {
+trb = mv_u3d_build_trb_one(req, &count, &dma);
+list_add_tail(&trb->trb_list, &req->trb_list);
+req->trb_head = trb;
+req->trb_count = 1;
+req->chain = 0;
+} else {
+trb_num = length / MV_U3D_EP_MAX_LENGTH_TRANSFER;
+if (length % MV_U3D_EP_MAX_LENGTH_TRANSFER)
+trb_num++;
+
+trb = kcalloc(trb_num, sizeof(*trb), GFP_ATOMIC);
+if (!trb) {
+dev_err(u3d->dev,
+"%s, trb alloc fail\n", __func__);
+return -ENOMEM;
+}
+
+trb_hw = kcalloc(trb_num, sizeof(*trb_hw), GFP_ATOMIC);
+if (!trb_hw) {
+dev_err(u3d->dev,
+"%s, trb_hw alloc fail\n", __func__);
+return -ENOMEM;
+}
+
+do {
+trb->trb_hw = trb_hw;
+if (mv_u3d_build_trb_chain(req, &count,
+trb, &is_last)) {
+dev_err(u3d->dev,
+"%s, mv_u3d_build_trb_chain fail\n",
+__func__);
+return -EIO;
+}
+
+list_add_tail(&trb->trb_list, &req->trb_list);
+req->trb_count++;
+trb++;
+trb_hw++;
+} while (!is_last);
+
+req->trb_head = list_entry(req->trb_list.next,
+struct mv_u3d_trb, trb_list);
+req->trb_head->trb_dma = dma_map_single(u3d->gadget.dev.parent,
+req->trb_head->trb_hw,
+trb_num * sizeof(*trb_hw),
+DMA_BIDIRECTIONAL);
+
+req->chain = 1;
+}
+
+return 0;
+}
+
+static int
+mv_u3d_start_queue(struct mv_u3d_ep *ep)
+{
+struct mv_u3d *u3d = ep->u3d;
+struct mv_u3d_req *req;
+int ret;
+
+if (!list_empty(&ep->req_list) && !ep->processing)
+req = list_entry(ep->req_list.next, struct mv_u3d_req, list);
+else
+return 0;
+
+ep->processing = 1;
+
+/* set up dma mapping */
+ret = usb_gadget_map_request(&u3d->gadget, &req->req,
+mv_u3d_ep_dir(ep));
+if (ret)
+return ret;
+
+req->req.status = -EINPROGRESS;
+req->req.actual = 0;
+req->trb_count = 0;
+
+/* build trbs and push them to device queue */
+if (!mv_u3d_req_to_trb(req)) {
+ret = mv_u3d_queue_trb(ep, req);
+if (ret) {
+ep->processing = 0;
+return ret;
+}
+} else {
+ep->processing = 0;
+dev_err(u3d->dev, "%s, mv_u3d_req_to_trb fail\n", __func__);
+return -ENOMEM;
+}
+
+/* irq handler advances the queue */
+if (req)
+list_add_tail(&req->queue, &ep->queue);
+
+return 0;
+}
+
+static int mv_u3d_ep_enable(struct usb_ep *_ep,
+const struct usb_endpoint_descriptor *desc)
+{
+struct mv_u3d *u3d;
+struct mv_u3d_ep *ep;
+struct mv_u3d_ep_context *ep_context;
+u16 max = 0;
+unsigned maxburst = 0;
+u32 epxcr, direction;
+
+if (!_ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT)
+return -EINVAL;
+
+ep = container_of(_ep, struct mv_u3d_ep, ep);
+u3d = ep->u3d;
+
+if (!u3d->driver || u3d->gadget.speed == USB_SPEED_UNKNOWN)
+return -ESHUTDOWN;
+
+direction = mv_u3d_ep_dir(ep);
+max = le16_to_cpu(desc->wMaxPacketSize);
+
+if (!_ep->maxburst)
+_ep->maxburst = 1;
+maxburst = _ep->maxburst;
+
+/* Get the endpoint context address */
+ep_context = (struct mv_u3d_ep_context *)ep->ep_context;
+
+/* Set the max burst size */
+switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
+case USB_ENDPOINT_XFER_BULK:
+if (maxburst > 16) {
+dev_err(u3d->dev,
+"max burst should not be greater "
+"than 1 on bulk ep\n");
+_ep->maxburst = maxburst = 1;
+}
+dev_dbg(u3d->dev,
+"maxburst: %d on bulk %s\n", maxburst, ep->name);
+break;
+case USB_ENDPOINT_XFER_CONTROL:
+if (maxburst != 1) {
+dev_err(u3d->dev,
+"max burst should be 1 on control ep\n");
+_ep->maxburst = maxburst = 1;
+}
+case USB_ENDPOINT_XFER_INT:
+if (maxburst != 1) {
+dev_err(u3d->dev,
+"max burst should be 1 on int ep "
+"if transfer size is not 1024\n");
+_ep->maxburst = maxburst = 1;
+}
+break;
+case USB_ENDPOINT_XFER_ISOC:
+if (maxburst != 1) {
+dev_err(u3d->dev,
+"max burst should be 1 on isoc ep "
+"if transfer size is not 1024\n");
+_ep->maxburst = maxburst = 1;
+}
+break;
+default:
+goto en_done;
+}
+
+ep->ep.maxpacket = max;
+ep->ep.desc = desc;
+ep->enabled = 1;
+
+/* Enable the endpoint for Rx or Tx and set the endpoint type */
+if (direction == MV_U3D_EP_DIR_OUT) {
+epxcr = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0);
+epxcr |= MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0);
+udelay(5);
+epxcr &= ~MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0);
+
+epxcr = ((max << MV_U3D_EPXCR_MAX_PACKET_SIZE_SHIFT)
+ | ((maxburst - 1) << MV_U3D_EPXCR_MAX_BURST_SIZE_SHIFT)
+ | (1 << MV_U3D_EPXCR_EP_ENABLE_SHIFT)
+ | (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK));
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxoutcr1);
+} else {
+epxcr = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxincr0);
+epxcr |= MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxincr0);
+udelay(5);
+epxcr &= ~MV_U3D_EPXCR_EP_INIT;
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxincr0);
+
+epxcr = ((max << MV_U3D_EPXCR_MAX_PACKET_SIZE_SHIFT)
+ | ((maxburst - 1) << MV_U3D_EPXCR_MAX_BURST_SIZE_SHIFT)
+ | (1 << MV_U3D_EPXCR_EP_ENABLE_SHIFT)
+ | (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK));
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxincr1);
+}
+
+return 0;
+en_done:
+return -EINVAL;
+}
+
+static int mv_u3d_ep_disable(struct usb_ep *_ep)
+{
+struct mv_u3d *u3d;
+struct mv_u3d_ep *ep;
+struct mv_u3d_ep_context *ep_context;
+u32 epxcr, direction;
+
+ep = container_of(_ep, struct mv_u3d_ep, ep);
+if ((!_ep) || !ep->ep.desc)
+return -EINVAL;
+
+u3d = ep->u3d;
+
+/* Get the endpoint context address */
+ep_context = ep->ep_context;
+
+direction = mv_u3d_ep_dir(ep);
+
+/* nuke all pending requests (does flush) */
+mv_u3d_nuke(ep, -ESHUTDOWN);
+
+/* Disable the endpoint for Rx or Tx and reset the endpoint type */
+if (direction == MV_U3D_EP_DIR_OUT) {
+epxcr = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxoutcr1);
+epxcr &= ~((1 << MV_U3D_EPXCR_EP_ENABLE_SHIFT)
+ | USB_ENDPOINT_XFERTYPE_MASK);
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxoutcr1);
+} else {
+epxcr = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxincr1);
+epxcr &= ~((1 << MV_U3D_EPXCR_EP_ENABLE_SHIFT)
+ | USB_ENDPOINT_XFERTYPE_MASK);
+iowrite32(epxcr, &u3d->vuc_regs->epcr[ep->ep_num].epxincr1);
+}
+
+ep->enabled = 0;
+
+ep->ep.desc = NULL;
+return 0;
+}
+
+static struct usb_request *
+mv_u3d_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
+{
+struct mv_u3d_req *req = NULL;
+
+req = kzalloc(sizeof *req, gfp_flags);
+if (!req)
+return NULL;
+
+INIT_LIST_HEAD(&req->queue);
+
+return &req->req;
+}
+
+static void mv_u3d_free_request(struct usb_ep *_ep, struct usb_request *_req)
+{
+struct mv_u3d_req *req = container_of(_req, struct mv_u3d_req, req);
+
+kfree(req);
+}
+
+static void mv_u3d_ep_fifo_flush(struct usb_ep *_ep)
+{
+struct mv_u3d *u3d;
+u32 direction;
+struct mv_u3d_ep *ep = container_of(_ep, struct mv_u3d_ep, ep);
+unsigned int loops;
+u32 tmp;
+
+/* if endpoint is not enabled, cannot flush endpoint */
+if (!ep->enabled)
+return;
+
+u3d = ep->u3d;
+direction = mv_u3d_ep_dir(ep);
+
+/* ep0 need clear bit after flushing fifo. */
+if (!ep->ep_num) {
+if (direction == MV_U3D_EP_DIR_OUT) {
+tmp = ioread32(&u3d->vuc_regs->epcr[0].epxoutcr0);
+tmp |= MV_U3D_EPXCR_EP_FLUSH;
+iowrite32(tmp, &u3d->vuc_regs->epcr[0].epxoutcr0);
+udelay(10);
+tmp &= ~MV_U3D_EPXCR_EP_FLUSH;
+iowrite32(tmp, &u3d->vuc_regs->epcr[0].epxoutcr0);
+} else {
+tmp = ioread32(&u3d->vuc_regs->epcr[0].epxincr0);
+tmp |= MV_U3D_EPXCR_EP_FLUSH;
+iowrite32(tmp, &u3d->vuc_regs->epcr[0].epxincr0);
+udelay(10);
+tmp &= ~MV_U3D_EPXCR_EP_FLUSH;
+iowrite32(tmp, &u3d->vuc_regs->epcr[0].epxincr0);
+}
+return;
+}
+
+if (direction == MV_U3D_EP_DIR_OUT) {
+tmp = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0);
+tmp |= MV_U3D_EPXCR_EP_FLUSH;
+iowrite32(tmp, &u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0);
+
+/* Wait until flushing completed */
+loops = LOOPS(MV_U3D_FLUSH_TIMEOUT);
+while (ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0) &
+MV_U3D_EPXCR_EP_FLUSH) {
+/*
+ * EP_FLUSH bit should be cleared to indicate this
+ * operation is complete
+ */
+if (loops == 0) {
+dev_dbg(u3d->dev,
+ "EP FLUSH TIMEOUT for ep%d%s\n", ep->ep_num,
+ direction ? "in" : "out");
+return;
+}
+loops--;
+udelay(LOOPS_USEC);
+}
+} else {/* EP_DIR_IN */
+tmp = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxincr0);
+tmp |= MV_U3D_EPXCR_EP_FLUSH;
+iowrite32(tmp, &u3d->vuc_regs->epcr[ep->ep_num].epxincr0);
+
+/* Wait until flushing completed */
+loops = LOOPS(MV_U3D_FLUSH_TIMEOUT);
+while (ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxincr0) &
+MV_U3D_EPXCR_EP_FLUSH) {
+/*
+* EP_FLUSH bit should be cleared to indicate this
+* operation is complete
+*/
+if (loops == 0) {
+dev_dbg(u3d->dev,
+ "EP FLUSH TIMEOUT for ep%d%s\n", ep->ep_num,
+ direction ? "in" : "out");
+return;
+}
+loops--;
+udelay(LOOPS_USEC);
+}
+}
+}
+
+/* queues (submits) an I/O request to an endpoint */
+static int
+mv_u3d_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
+{
+struct mv_u3d_ep *ep = container_of(_ep, struct mv_u3d_ep, ep);
+struct mv_u3d_req *req = container_of(_req, struct mv_u3d_req, req);
+struct mv_u3d *u3d = ep->u3d;
+unsigned long flags;
+int is_first_req = 0;
+
+if (!ep->ep_num
+&& u3d->ep0_state == MV_U3D_STATUS_STAGE
+&& !_req->length) {
+dev_dbg(u3d->dev, "ep0 status stage\n");
+u3d->ep0_state = MV_U3D_WAIT_FOR_SETUP;
+return 0;
+}
+
+dev_dbg(u3d->dev, "%s: %s, req: 0x%x\n",
+__func__, _ep->name, (u32)req);
+/* catch various bogus parameters */
+if (!_req || !req->req.complete || !req->req.buf
+|| !list_empty(&req->queue)) {
+dev_err(u3d->dev,
+"%s, bad params, _req: 0x%x,"
+"req->req.complete: 0x%x, req->req.buf: 0x%x,"
+"list_empty: 0x%x\n",
+__func__, (u32)_req,
+(u32)req->req.complete, (u32)req->req.buf,
+(u32)list_empty(&req->queue));
+return -EINVAL;
+}
+if (unlikely(!_ep || !ep->ep.desc)) {
+dev_err(u3d->dev, "%s, bad ep\n", __func__);
+return -EINVAL;
+}
+if (ep->ep.desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
+if (req->req.length > ep->ep.maxpacket)
+return -EMSGSIZE;
+}
+
+if (!u3d->driver || u3d->gadget.speed == USB_SPEED_UNKNOWN) {
+dev_err(u3d->dev,
+"%s, bad params of driver/speed\n", __func__);
+return -ESHUTDOWN;
+}
+
+req->ep = ep;
+
+/* Software list handles usb request. */
+spin_lock_irqsave(&ep->req_lock, flags);
+is_first_req = list_empty(&ep->req_list);
+list_add_tail(&req->list, &ep->req_list);
+spin_unlock_irqrestore(&ep->req_lock, flags);
+if (!is_first_req) {
+dev_dbg(u3d->dev, "list is not empty\n");
+return 0;
+}
+
+dev_dbg(u3d->dev, "call mv_u3d_start_queue from usb_ep_queue\n");
+spin_lock_irqsave(&u3d->lock, flags);
+mv_u3d_start_queue(ep);
+spin_unlock_irqrestore(&u3d->lock, flags);
+return 0;
+}
+
+/* dequeues (cancels, unlinks) an I/O request from an endpoint */
+static int mv_u3d_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
+{
+struct mv_u3d_ep *ep = container_of(_ep, struct mv_u3d_ep, ep);
+struct mv_u3d_req *req;
+struct mv_u3d *u3d = ep->u3d;
+struct mv_u3d_ep_context *ep_context;
+struct mv_u3d_req *next_req;
+
+unsigned long flags;
+int ret = 0;
+
+if (!_ep || !_req)
+return -EINVAL;
+
+spin_lock_irqsave(&ep->u3d->lock, flags);
+
+/* make sure it's actually queued on this endpoint */
+list_for_each_entry(req, &ep->queue, queue) {
+if (&req->req == _req)
+break;
+}
+if (&req->req != _req) {
+ret = -EINVAL;
+goto out;
+}
+
+/* The request is in progress, or completed but not dequeued */
+if (ep->queue.next == &req->queue) {
+_req->status = -ECONNRESET;
+mv_u3d_ep_fifo_flush(_ep);
+
+/* The request isn't the last request in this ep queue */
+if (req->queue.next != &ep->queue) {
+dev_dbg(u3d->dev,
+"it is the last request in this ep queue\n");
+ep_context = ep->ep_context;
+next_req = list_entry(req->queue.next,
+struct mv_u3d_req, queue);
+
+/* Point first TRB of next request to the EP context. */
+iowrite32((u32) next_req->trb_head,
+&ep_context->trb_addr_lo);
+} else {
+struct mv_u3d_ep_context *ep_context;
+ep_context = ep->ep_context;
+ep_context->trb_addr_lo = 0;
+ep_context->trb_addr_hi = 0;
+}
+
+} else
+WARN_ON(1);
+
+mv_u3d_done(ep, req, -ECONNRESET);
+
+/* remove the req from the ep req list */
+if (!list_empty(&ep->req_list)) {
+struct mv_u3d_req *curr_req;
+curr_req = list_entry(ep->req_list.next,
+struct mv_u3d_req, list);
+if (curr_req == req) {
+list_del_init(&req->list);
+ep->processing = 0;
+}
+}
+
+out:
+spin_unlock_irqrestore(&ep->u3d->lock, flags);
+return ret;
+}
+
+static void
+mv_u3d_ep_set_stall(struct mv_u3d *u3d, u8 ep_num, u8 direction, int stall)
+{
+u32 tmp;
+struct mv_u3d_ep *ep = u3d->eps;
+
+dev_dbg(u3d->dev, "%s\n", __func__);
+if (direction == MV_U3D_EP_DIR_OUT) {
+tmp = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0);
+if (stall)
+tmp |= MV_U3D_EPXCR_EP_HALT;
+else
+tmp &= ~MV_U3D_EPXCR_EP_HALT;
+iowrite32(tmp, &u3d->vuc_regs->epcr[ep->ep_num].epxoutcr0);
+} else {
+tmp = ioread32(&u3d->vuc_regs->epcr[ep->ep_num].epxincr0);
+if (stall)
+tmp |= MV_U3D_EPXCR_EP_HALT;
+else
+tmp &= ~MV_U3D_EPXCR_EP_HALT;
+iowrite32(tmp, &u3d->vuc_regs->epcr[ep->ep_num].epxincr0);
+}
+}
+
+static int mv_u3d_ep_set_halt_wedge(struct usb_ep *_ep, int halt, int wedge)
+{
+struct mv_u3d_ep *ep;
+unsigned long flags = 0;
+int status = 0;
+struct mv_u3d *u3d;
+
+ep = container_of(_ep, struct mv_u3d_ep, ep);
+u3d = ep->u3d;
+if (!_ep || !ep->ep.desc) {
+status = -EINVAL;
+goto out;
+}
+
+if (ep->ep.desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
+status = -EOPNOTSUPP;
+goto out;
+}
+
+/*
+ * Attempt to halt IN ep will fail if any transfer requests
+ * are still queue
+ */
+if (halt && (mv_u3d_ep_dir(ep) == MV_U3D_EP_DIR_IN)
+&& !list_empty(&ep->queue)) {
+status = -EAGAIN;
+goto out;
+}
+
+spin_lock_irqsave(&ep->u3d->lock, flags);
+mv_u3d_ep_set_stall(u3d, ep->ep_num, mv_u3d_ep_dir(ep), halt);
+if (halt && wedge)
+ep->wedge = 1;
+else if (!halt)
+ep->wedge = 0;
+spin_unlock_irqrestore(&ep->u3d->lock, flags);
+
+if (ep->ep_num == 0)
+u3d->ep0_dir = MV_U3D_EP_DIR_OUT;
+out:
+return status;
+}
+
+static int mv_u3d_ep_set_halt(struct usb_ep *_ep, int halt)
+{
+return mv_u3d_ep_set_halt_wedge(_ep, halt, 0);
+}
+
+static int mv_u3d_ep_set_wedge(struct usb_ep *_ep)
+{
+return mv_u3d_ep_set_halt_wedge(_ep, 1, 1);
+}
+
+static struct usb_ep_ops mv_u3d_ep_ops = {
+.enable= mv_u3d_ep_enable,
+.disable= mv_u3d_ep_disable,
+
+.alloc_request= mv_u3d_alloc_request,
+.free_request= mv_u3d_free_request,
+
+.queue= mv_u3d_ep_queue,
+.dequeue= mv_u3d_ep_dequeue,
+
+.set_wedge= mv_u3d_ep_set_wedge,
+.set_halt= mv_u3d_ep_set_halt,
+.fifo_flush= mv_u3d_ep_fifo_flush,
+};
+
+static void mv_u3d_controller_stop(struct mv_u3d *u3d)
+{
+u32 tmp;
+
+if (!u3d->clock_gating && u3d->vbus_valid_detect)
+iowrite32(MV_U3D_INTR_ENABLE_VBUS_VALID,
+&u3d->vuc_regs->intrenable);
+else
+iowrite32(0, &u3d->vuc_regs->intrenable);
+iowrite32(~0x0, &u3d->vuc_regs->endcomplete);
+iowrite32(~0x0, &u3d->vuc_regs->trbunderrun);
+iowrite32(~0x0, &u3d->vuc_regs->trbcomplete);
+iowrite32(~0x0, &u3d->vuc_regs->linkchange);
+iowrite32(0x1, &u3d->vuc_regs->setuplock);
+
+/* Reset the RUN bit in the command register to stop USB */
+tmp = ioread32(&u3d->op_regs->usbcmd);
+tmp &= ~MV_U3D_CMD_RUN_STOP;
+iowrite32(tmp, &u3d->op_regs->usbcmd);
+dev_dbg(u3d->dev, "after u3d_stop, USBCMD 0x%x\n",
+ioread32(&u3d->op_regs->usbcmd));
+}
+
+static void mv_u3d_controller_start(struct mv_u3d *u3d)
+{
+u32 usbintr;
+u32 temp;
+
+/* enable link LTSSM state machine */
+temp = ioread32(&u3d->vuc_regs->ltssm);
+temp |= MV_U3D_LTSSM_PHY_INIT_DONE;
+iowrite32(temp, &u3d->vuc_regs->ltssm);
+
+/* Enable interrupts */
+usbintr = MV_U3D_INTR_ENABLE_LINK_CHG | MV_U3D_INTR_ENABLE_TXDESC_ERR |
+MV_U3D_INTR_ENABLE_RXDESC_ERR | MV_U3D_INTR_ENABLE_TX_COMPLETE |
+MV_U3D_INTR_ENABLE_RX_COMPLETE | MV_U3D_INTR_ENABLE_SETUP |
+(u3d->vbus_valid_detect ? MV_U3D_INTR_ENABLE_VBUS_VALID : 0);
+iowrite32(usbintr, &u3d->vuc_regs->intrenable);
+
+/* Enable ctrl ep */
+iowrite32(0x1, &u3d->vuc_regs->ctrlepenable);
+
+/* Set the Run bit in the command register */
+iowrite32(MV_U3D_CMD_RUN_STOP, &u3d->op_regs->usbcmd);
+dev_dbg(u3d->dev, "after u3d_start, USBCMD 0x%x\n",
+ioread32(&u3d->op_regs->usbcmd));
+}
+
+static int mv_u3d_controller_reset(struct mv_u3d *u3d)
+{
+unsigned int loops;
+u32 tmp;
+
+/* Stop the controller */
+tmp = ioread32(&u3d->op_regs->usbcmd);
+tmp &= ~MV_U3D_CMD_RUN_STOP;
+iowrite32(tmp, &u3d->op_regs->usbcmd);
+
+/* Reset the controller to get default values */
+iowrite32(MV_U3D_CMD_CTRL_RESET, &u3d->op_regs->usbcmd);
+
+/* wait for reset to complete */
+loops = LOOPS(MV_U3D_RESET_TIMEOUT);
+while (ioread32(&u3d->op_regs->usbcmd) & MV_U3D_CMD_CTRL_RESET) {
+if (loops == 0) {
+dev_err(u3d->dev,
+"Wait for RESET completed TIMEOUT\n");
+return -ETIMEDOUT;
+}
+loops--;
+udelay(LOOPS_USEC);
+}
+
+/* Configure the Endpoint Context Address */
+iowrite32(u3d->ep_context_dma, &u3d->op_regs->dcbaapl);
+iowrite32(0, &u3d->op_regs->dcbaaph);
+
+return 0;
+}
+
+static int mv_u3d_enable(struct mv_u3d *u3d)
+{
+struct mv_usb_platform_data *pdata = u3d->dev->platform_data;
+int retval;
+
+if (u3d->active)
+return 0;
+
+if (u3d->clock_gating == 0) {
+u3d->active = 1;
+return 0;
+}
+
+dev_dbg(u3d->dev, "enable u3d\n");
+clk_enable(u3d->clk);
+if (pdata->phy_init) {
+retval = pdata->phy_init(u3d->phy_regs);
+if (retval) {
+dev_err(u3d->dev,
+"init phy error %d\n", retval);
+clk_disable(u3d->clk);
+return retval;
+}
+}
+u3d->active = 1;
+
+return 0;
+}
+
+static void mv_u3d_disable(struct mv_u3d *u3d)
+{
+struct mv_usb_platform_data *pdata = u3d->dev->platform_data;
+if (u3d->clock_gating && u3d->active) {
+dev_dbg(u3d->dev, "disable u3d\n");
+if (pdata->phy_deinit)
+pdata->phy_deinit(u3d->phy_regs);
+clk_disable(u3d->clk);
+u3d->active = 0;
+}
+}
+
+static int mv_u3d_vbus_session(struct usb_gadget *gadget, int is_active)
+{
+struct mv_u3d *u3d;
+unsigned long flags;
+int retval = 0;
+
+u3d = container_of(gadget, struct mv_u3d, gadget);
+
+spin_lock_irqsave(&u3d->lock, flags);
+
+u3d->vbus_active = (is_active != 0);
+dev_dbg(u3d->dev, "%s: softconnect %d, vbus_active %d\n",
+__func__, u3d->softconnect, u3d->vbus_active);
+/*
+ * 1. external VBUS detect: we can disable/enable clock on demand.
+ * 2. UDC VBUS detect: we have to enable clock all the time.
+ * 3. No VBUS detect: we have to enable clock all the time.
+ */
+if (u3d->driver && u3d->softconnect && u3d->vbus_active) {
+retval = mv_u3d_enable(u3d);
+if (retval == 0) {
+/*
+ * after clock is disabled, we lost all the register
+ * context. We have to re-init registers
+ */
+mv_u3d_controller_reset(u3d);
+mv_u3d_ep0_reset(u3d);
+mv_u3d_controller_start(u3d);
+}
+} else if (u3d->driver && u3d->softconnect) {
+if (!u3d->active)
+goto out;
+
+/* stop all the transfer in queue*/
+mv_u3d_stop_activity(u3d, u3d->driver);
+mv_u3d_controller_stop(u3d);
+mv_u3d_disable(u3d);
+}
+
+out:
+spin_unlock_irqrestore(&u3d->lock, flags);
+return retval;
+}
+
+/* constrain controller's VBUS power usage
+ * This call is used by gadget drivers during SET_CONFIGURATION calls,
+ * reporting how much power the device may consume. For example, this
+ * could affect how quickly batteries are recharged.
+ *
+ * Returns zero on success, else negative errno.
+ */
+static int mv_u3d_vbus_draw(struct usb_gadget *gadget, unsigned mA)
+{
+struct mv_u3d *u3d = container_of(gadget, struct mv_u3d, gadget);
+
+u3d->power = mA;
+
+return 0;
+}
+
+static int mv_u3d_pullup(struct usb_gadget *gadget, int is_on)
+{
+struct mv_u3d *u3d = container_of(gadget, struct mv_u3d, gadget);
+unsigned long flags;
+int retval = 0;
+
+spin_lock_irqsave(&u3d->lock, flags);
+
+dev_dbg(u3d->dev, "%s: softconnect %d, vbus_active %d\n",
+__func__, u3d->softconnect, u3d->vbus_active);
+u3d->softconnect = (is_on != 0);
+if (u3d->driver && u3d->softconnect && u3d->vbus_active) {
+retval = mv_u3d_enable(u3d);
+if (retval == 0) {
+/*
+ * after clock is disabled, we lost all the register
+ * context. We have to re-init registers
+ */
+mv_u3d_controller_reset(u3d);
+mv_u3d_ep0_reset(u3d);
+mv_u3d_controller_start(u3d);
+}
+} else if (u3d->driver && u3d->vbus_active) {
+/* stop all the transfer in queue*/
+mv_u3d_stop_activity(u3d, u3d->driver);
+mv_u3d_controller_stop(u3d);
+mv_u3d_disable(u3d);
+}
+
+spin_unlock_irqrestore(&u3d->lock, flags);
+
+return retval;
+}
+
+static int mv_u3d_start(struct usb_gadget *g,
+struct usb_gadget_driver *driver)
+{
+struct mv_u3d *u3d = container_of(g, struct mv_u3d, gadget);
+unsigned long flags;
+
+if (u3d->driver)
+return -EBUSY;
+
+spin_lock_irqsave(&u3d->lock, flags);
+
+/* hook up the driver ... */
+driver->driver.bus = NULL;
+u3d->driver = driver;
+u3d->gadget.dev.driver = &driver->driver;
+
+u3d->ep0_dir = USB_DIR_OUT;
+
+spin_unlock_irqrestore(&u3d->lock, flags);
+
+u3d->vbus_valid_detect = 1;
+
+return 0;
+}
+
+static int mv_u3d_stop(struct usb_gadget *g,
+struct usb_gadget_driver *driver)
+{
+struct mv_u3d *u3d = container_of(g, struct mv_u3d, gadget);
+unsigned long flags;
+
+u3d->vbus_valid_detect = 0;
+spin_lock_irqsave(&u3d->lock, flags);
+
+mv_u3d_enable(u3d);
+mv_u3d_controller_stop(u3d);
+/* stop all usb activities */
+u3d->gadget.speed = USB_SPEED_UNKNOWN;
+mv_u3d_stop_activity(u3d, driver);
+mv_u3d_disable(u3d);
+
+spin_unlock_irqrestore(&u3d->lock, flags);
+
+u3d->gadget.dev.driver = NULL;
+u3d->driver = NULL;
+
+return 0;
+}
+
+
+/* device controller usb_gadget_ops structure */
+static const struct usb_gadget_ops mv_u3d_ops = {
+/* notify controller that VBUS is powered or not */
+.vbus_session= mv_u3d_vbus_session,
+
+/* constrain controller's VBUS power usage */
+.vbus_draw= mv_u3d_vbus_draw,
+
+.pullup= mv_u3d_pullup,
+.udc_start= mv_u3d_start,
+.udc_stop= mv_u3d_stop,
+};
+
+static int mv_u3d_eps_init(struct mv_u3d *u3d)
+{
+struct mv_u3d_ep*ep;
+char name[14];
+int i;
+
+/* initialize ep0, ep0 in/out use eps[1] */
+ep = &u3d->eps[1];
+ep->u3d = u3d;
+strncpy(ep->name, "ep0", sizeof(ep->name));
+ep->ep.name = ep->name;
+ep->ep.ops = &mv_u3d_ep_ops;
+ep->wedge = 0;
+ep->ep.maxpacket = MV_U3D_EP0_MAX_PKT_SIZE;
+ep->ep_num = 0;
+ep->ep.desc = &mv_u3d_ep0_desc;
+INIT_LIST_HEAD(&ep->queue);
+INIT_LIST_HEAD(&ep->req_list);
+ep->ep_type = USB_ENDPOINT_XFER_CONTROL;
+
+/* add ep0 ep_context */
+ep->ep_context = &u3d->ep_context[1];
+
+/* initialize other endpoints */
+for (i = 2; i < u3d->max_eps * 2; i++) {
+ep = &u3d->eps[i];
+if (i & 1) {
+snprintf(name, sizeof(name), "ep%din", i >> 1);
+ep->direction = MV_U3D_EP_DIR_IN;
+} else {
+snprintf(name, sizeof(name), "ep%dout", i >> 1);
+ep->direction = MV_U3D_EP_DIR_OUT;
+}
+ep->u3d = u3d;
+strncpy(ep->name, name, sizeof(ep->name));
+ep->ep.name = ep->name;
+
+ep->ep.ops = &mv_u3d_ep_ops;
+ep->ep.maxpacket = (unsigned short) ~0;
+ep->ep_num = i / 2;
+
+INIT_LIST_HEAD(&ep->queue);
+list_add_tail(&ep->ep.ep_list, &u3d->gadget.ep_list);
+
+INIT_LIST_HEAD(&ep->req_list);
+spin_lock_init(&ep->req_lock);
+ep->ep_context = &u3d->ep_context[i];
+}
+
+return 0;
+}
+
+/* delete all endpoint requests, called with spinlock held */
+static void mv_u3d_nuke(struct mv_u3d_ep *ep, int status)
+{
+/* endpoint fifo flush */
+mv_u3d_ep_fifo_flush(&ep->ep);
+
+while (!list_empty(&ep->queue)) {
+struct mv_u3d_req *req = NULL;
+req = list_entry(ep->queue.next, struct mv_u3d_req, queue);
+mv_u3d_done(ep, req, status);
+}
+}
+
+/* stop all USB activities */
+static
+void mv_u3d_stop_activity(struct mv_u3d *u3d, struct usb_gadget_driver *driver)
+{
+struct mv_u3d_ep*ep;
+
+mv_u3d_nuke(&u3d->eps[1], -ESHUTDOWN);
+
+list_for_each_entry(ep, &u3d->gadget.ep_list, ep.ep_list) {
+mv_u3d_nuke(ep, -ESHUTDOWN);
+}
+
+/* report disconnect; the driver is already quiesced */
+if (driver) {
+spin_unlock(&u3d->lock);
+driver->disconnect(&u3d->gadget);
+spin_lock(&u3d->lock);
+}
+}
+
+static void mv_u3d_irq_process_error(struct mv_u3d *u3d)
+{
+/* Increment the error count */
+u3d->errors++;
+dev_err(u3d->dev, "%s\n", __func__);
+}
+
+static void mv_u3d_irq_process_link_change(struct mv_u3d *u3d)
+{
+u32 linkchange;
+
+linkchange = ioread32(&u3d->vuc_regs->linkchange);
+iowrite32(linkchange, &u3d->vuc_regs->linkchange);
+
+dev_dbg(u3d->dev, "linkchange: 0x%x\n", linkchange);
+
+if (linkchange & MV_U3D_LINK_CHANGE_LINK_UP) {
+dev_dbg(u3d->dev, "link up: ltssm state: 0x%x\n",
+ioread32(&u3d->vuc_regs->ltssmstate));
+
+u3d->usb_state = USB_STATE_DEFAULT;
+u3d->ep0_dir = MV_U3D_EP_DIR_OUT;
+u3d->ep0_state = MV_U3D_WAIT_FOR_SETUP;
+
+/* set speed */
+u3d->gadget.speed = USB_SPEED_SUPER;
+}
+
+if (linkchange & MV_U3D_LINK_CHANGE_SUSPEND) {
+dev_dbg(u3d->dev, "link suspend\n");
+u3d->resume_state = u3d->usb_state;
+u3d->usb_state = USB_STATE_SUSPENDED;
+}
+
+if (linkchange & MV_U3D_LINK_CHANGE_RESUME) {
+dev_dbg(u3d->dev, "link resume\n");
+u3d->usb_state = u3d->resume_state;
+u3d->resume_state = 0;
+}
+
+if (linkchange & MV_U3D_LINK_CHANGE_WRESET) {
+dev_dbg(u3d->dev, "warm reset\n");
+u3d->usb_state = USB_STATE_POWERED;
+}
+
+if (linkchange & MV_U3D_LINK_CHANGE_HRESET) {
+dev_dbg(u3d->dev, "hot reset\n");
+u3d->usb_state = USB_STATE_DEFAULT;
+}
+
+if (linkchange & MV_U3D_LINK_CHANGE_INACT)
+dev_dbg(u3d->dev, "inactive\n");
+
+if (linkchange & MV_U3D_LINK_CHANGE_DISABLE_AFTER_U0)
+dev_dbg(u3d->dev, "ss.disabled\n");
+
+if (linkchange & MV_U3D_LINK_CHANGE_VBUS_INVALID) {
+dev_dbg(u3d->dev, "vbus invalid\n");
+u3d->usb_state = USB_STATE_ATTACHED;
+u3d->vbus_valid_detect = 1;
+/* if external vbus detect is not supported,
+ * we handle it here.
+ */
+if (!u3d->vbus) {
+spin_unlock(&u3d->lock);
+mv_u3d_vbus_session(&u3d->gadget, 0);
+spin_lock(&u3d->lock);
+}
+}
+}
+
+static void mv_u3d_ch9setaddress(struct mv_u3d *u3d,
+struct usb_ctrlrequest *setup)
+{
+u32 tmp;
+
+if (u3d->usb_state != USB_STATE_DEFAULT) {
+dev_err(u3d->dev,
+"%s, cannot setaddr in this state (%d)\n",
+__func__, u3d->usb_state);
+goto err;
+}
+
+u3d->dev_addr = (u8)setup->wValue;
+
+dev_dbg(u3d->dev, "%s: 0x%x\n", __func__, u3d->dev_addr);
+
+if (u3d->dev_addr > 127) {
+dev_err(u3d->dev,
+"%s, u3d address is wrong (out of range)\n", __func__);
+u3d->dev_addr = 0;
+goto err;
+}
+
+/* update usb state */
+u3d->usb_state = USB_STATE_ADDRESS;
+
+/* set the new address */
+tmp = ioread32(&u3d->vuc_regs->devaddrtiebrkr);
+tmp &= ~0x7F;
+tmp |= (u32)u3d->dev_addr;
+iowrite32(tmp, &u3d->vuc_regs->devaddrtiebrkr);
+
+return;
+err:
+mv_u3d_ep0_stall(u3d);
+}
+
+static int mv_u3d_is_set_configuration(struct usb_ctrlrequest *setup)
+{
+if ((setup->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
+if (setup->bRequest == USB_REQ_SET_CONFIGURATION)
+return 1;
+
+return 0;
+}
+
+static void mv_u3d_handle_setup_packet(struct mv_u3d *u3d, u8 ep_num,
+struct usb_ctrlrequest *setup)
+{
+bool delegate = false;
+
+mv_u3d_nuke(&u3d->eps[ep_num * 2 + MV_U3D_EP_DIR_IN], -ESHUTDOWN);
+
+dev_dbg(u3d->dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
+setup->bRequestType, setup->bRequest,
+setup->wValue, setup->wIndex, setup->wLength);
+
+/* We process some stardard setup requests here */
+if ((setup->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
+switch (setup->bRequest) {
+case USB_REQ_GET_STATUS:
+delegate = true;
+break;
+
+case USB_REQ_SET_ADDRESS:
+mv_u3d_ch9setaddress(u3d, setup);
+break;
+
+case USB_REQ_CLEAR_FEATURE:
+delegate = true;
+break;
+
+case USB_REQ_SET_FEATURE:
+delegate = true;
+break;
+
+default:
+delegate = true;
+}
+} else
+delegate = true;
+
+/* delegate USB standard requests to the gadget driver */
+if (delegate == true) {
+/* USB requests handled by gadget */
+if (setup->wLength) {
+/* DATA phase from gadget, STATUS phase from u3d */
+u3d->ep0_dir = (setup->bRequestType & USB_DIR_IN)
+? MV_U3D_EP_DIR_IN : MV_U3D_EP_DIR_OUT;
+spin_unlock(&u3d->lock);
+if (u3d->driver->setup(&u3d->gadget,
+&u3d->local_setup_buff) < 0) {
+dev_err(u3d->dev, "setup error!\n");
+mv_u3d_ep0_stall(u3d);
+}
+spin_lock(&u3d->lock);
+} else {
+/* no DATA phase, STATUS phase from gadget */
+u3d->ep0_dir = MV_U3D_EP_DIR_IN;
+u3d->ep0_state = MV_U3D_STATUS_STAGE;
+spin_unlock(&u3d->lock);
+if (u3d->driver->setup(&u3d->gadget,
+&u3d->local_setup_buff) < 0)
+mv_u3d_ep0_stall(u3d);
+spin_lock(&u3d->lock);
+}
+
+if (mv_u3d_is_set_configuration(setup)) {
+dev_dbg(u3d->dev, "u3d configured\n");
+u3d->usb_state = USB_STATE_CONFIGURED;
+}
+}
+}
+
+static void mv_u3d_get_setup_data(struct mv_u3d *u3d, u8 ep_num, u8 *buffer_ptr)
+{
+struct mv_u3d_ep_context *epcontext;
+
+epcontext = &u3d->ep_context[ep_num * 2 + MV_U3D_EP_DIR_IN];
+
+/* Copy the setup packet to local buffer */
+memcpy(buffer_ptr, (u8 *) &epcontext->setup_buffer, 8);
+}
+
+static void mv_u3d_irq_process_setup(struct mv_u3d *u3d)
+{
+u32 tmp, i;
+/* Process all Setup packet received interrupts */
+tmp = ioread32(&u3d->vuc_regs->setuplock);
+if (tmp) {
+for (i = 0; i < u3d->max_eps; i++) {
+if (tmp & (1 << i)) {
+mv_u3d_get_setup_data(u3d, i,
+(u8 *)(&u3d->local_setup_buff));
+mv_u3d_handle_setup_packet(u3d, i,
+&u3d->local_setup_buff);
+}
+}
+}
+
+iowrite32(tmp, &u3d->vuc_regs->setuplock);
+}
+
+static void mv_u3d_irq_process_tr_complete(struct mv_u3d *u3d)
+{
+u32 tmp, bit_pos;
+int i, ep_num = 0, direction = 0;
+struct mv_u3d_ep*curr_ep;
+struct mv_u3d_req *curr_req, *temp_req;
+int status;
+
+tmp = ioread32(&u3d->vuc_regs->endcomplete);
+
+dev_dbg(u3d->dev, "tr_complete: ep: 0x%x\n", tmp);
+if (!tmp)
+return;
+iowrite32(tmp, &u3d->vuc_regs->endcomplete);
+
+for (i = 0; i < u3d->max_eps * 2; i++) {
+ep_num = i >> 1;
+direction = i % 2;
+
+bit_pos = 1 << (ep_num + 16 * direction);
+
+if (!(bit_pos & tmp))
+continue;
+
+if (i == 0)
+curr_ep = &u3d->eps[1];
+else
+curr_ep = &u3d->eps[i];
+
+/* remove req out of ep request list after completion */
+dev_dbg(u3d->dev, "tr comp: check req_list\n");
+spin_lock(&curr_ep->req_lock);
+if (!list_empty(&curr_ep->req_list)) {
+struct mv_u3d_req *req;
+req = list_entry(curr_ep->req_list.next,
+struct mv_u3d_req, list);
+list_del_init(&req->list);
+curr_ep->processing = 0;
+}
+spin_unlock(&curr_ep->req_lock);
+
+/* process the req queue until an uncomplete request */
+list_for_each_entry_safe(curr_req, temp_req,
+&curr_ep->queue, queue) {
+status = mv_u3d_process_ep_req(u3d, i, curr_req);
+if (status)
+break;
+/* write back status to req */
+curr_req->req.status = status;
+
+/* ep0 request completion */
+if (ep_num == 0) {
+mv_u3d_done(curr_ep, curr_req, 0);
+break;
+} else {
+mv_u3d_done(curr_ep, curr_req, status);
+}
+}
+
+dev_dbg(u3d->dev, "call mv_u3d_start_queue from ep complete\n");
+mv_u3d_start_queue(curr_ep);
+}
+}
+
+static irqreturn_t mv_u3d_irq(int irq, void *dev)
+{
+struct mv_u3d *u3d = (struct mv_u3d *)dev;
+u32 status, intr;
+u32 bridgesetting;
+u32 trbunderrun;
+
+spin_lock(&u3d->lock);
+
+status = ioread32(&u3d->vuc_regs->intrcause);
+intr = ioread32(&u3d->vuc_regs->intrenable);
+status &= intr;
+
+if (status == 0) {
+spin_unlock(&u3d->lock);
+dev_err(u3d->dev, "irq error!\n");
+return IRQ_NONE;
+}
+
+if (status & MV_U3D_USBINT_VBUS_VALID) {
+bridgesetting = ioread32(&u3d->vuc_regs->bridgesetting);
+if (bridgesetting & MV_U3D_BRIDGE_SETTING_VBUS_VALID) {
+/* write vbus valid bit of bridge setting to clear */
+bridgesetting = MV_U3D_BRIDGE_SETTING_VBUS_VALID;
+iowrite32(bridgesetting, &u3d->vuc_regs->bridgesetting);
+dev_dbg(u3d->dev, "vbus valid\n");
+
+u3d->usb_state = USB_STATE_POWERED;
+u3d->vbus_valid_detect = 0;
+/* if external vbus detect is not supported,
+ * we handle it here.
+ */
+if (!u3d->vbus) {
+spin_unlock(&u3d->lock);
+mv_u3d_vbus_session(&u3d->gadget, 1);
+spin_lock(&u3d->lock);
+}
+} else
+dev_err(u3d->dev, "vbus bit is not set\n");
+}
+
+/* RX data is already in the 16KB FIFO.*/
+if (status & MV_U3D_USBINT_UNDER_RUN) {
+trbunderrun = ioread32(&u3d->vuc_regs->trbunderrun);
+dev_err(u3d->dev, "under run, ep%d\n", trbunderrun);
+iowrite32(trbunderrun, &u3d->vuc_regs->trbunderrun);
+mv_u3d_irq_process_error(u3d);
+}
+
+if (status & (MV_U3D_USBINT_RXDESC_ERR | MV_U3D_USBINT_TXDESC_ERR)) {
+/* write one to clear */
+iowrite32(status & (MV_U3D_USBINT_RXDESC_ERR
+| MV_U3D_USBINT_TXDESC_ERR),
+&u3d->vuc_regs->intrcause);
+dev_err(u3d->dev, "desc err 0x%x\n", status);
+mv_u3d_irq_process_error(u3d);
+}
+
+if (status & MV_U3D_USBINT_LINK_CHG)
+mv_u3d_irq_process_link_change(u3d);
+
+if (status & MV_U3D_USBINT_TX_COMPLETE)
+mv_u3d_irq_process_tr_complete(u3d);
+
+if (status & MV_U3D_USBINT_RX_COMPLETE)
+mv_u3d_irq_process_tr_complete(u3d);
+
+if (status & MV_U3D_USBINT_SETUP)
+mv_u3d_irq_process_setup(u3d);
+
+spin_unlock(&u3d->lock);
+return IRQ_HANDLED;
+}
+
+static void mv_u3d_gadget_release(struct device *dev)
+{
+dev_dbg(dev, "%s\n", __func__);
+}
+
+static __devexit int mv_u3d_remove(struct platform_device *dev)
+{
+struct mv_u3d *u3d = platform_get_drvdata(dev);
+
+BUG_ON(u3d == NULL);
+
+usb_del_gadget_udc(&u3d->gadget);
+
+/* free memory allocated in probe */
+if (u3d->trb_pool)
+dma_pool_destroy(u3d->trb_pool);
+
+if (u3d->ep_context)
+dma_free_coherent(&dev->dev, u3d->ep_context_size,
+u3d->ep_context, u3d->ep_context_dma);
+
+kfree(u3d->eps);
+
+if (u3d->irq)
+free_irq(u3d->irq, &dev->dev);
+
+mv_u3d_disable(u3d);
+
+if (u3d->cap_regs)
+iounmap(u3d->cap_regs);
+u3d->cap_regs = NULL;
+
+kfree(u3d->status_req);
+
+clk_put(u3d->clk);
+
+device_unregister(&u3d->gadget.dev);
+
+platform_set_drvdata(dev, NULL);
+
+kfree(u3d);
+
+return 0;
+}
+
+static int mv_u3d_probe(struct platform_device *dev)
+{
+struct mv_u3d *u3d = NULL;
+struct mv_usb_platform_data *pdata = dev->dev.platform_data;
+int retval = 0;
+struct resource *r;
+size_t size;
+
+if (!dev->dev.platform_data) {
+dev_err(&dev->dev, "missing platform_data\n");
+retval = -ENODEV;
+goto err_pdata;
+}
+
+u3d = kzalloc(sizeof(*u3d), GFP_KERNEL);
+if (!u3d) {
+dev_err(&dev->dev, "failed to allocate memory for u3d\n");
+retval = -ENOMEM;
+goto err_alloc_private;
+}
+
+spin_lock_init(&u3d->lock);
+
+platform_set_drvdata(dev, u3d);
+
+u3d->dev = &dev->dev;
+u3d->vbus = pdata->vbus;
+
+u3d->clk = clk_get(&dev->dev, pdata->clkname[0]);
+if (IS_ERR(u3d->clk)) {
+retval = PTR_ERR(u3d->clk);
+goto err_get_clk;
+}
+
+r = platform_get_resource_byname(dev, IORESOURCE_MEM, "capregs");
+if (!r) {
+dev_err(&dev->dev, "no I/O memory resource defined\n");
+retval = -ENODEV;
+goto err_get_cap_regs;
+}
+
+u3d->cap_regs = (struct mv_u3d_cap_regs __iomem *)
+ioremap(r->start, resource_size(r));
+if (!u3d->cap_regs) {
+dev_err(&dev->dev, "failed to map I/O memory\n");
+retval = -EBUSY;
+goto err_map_cap_regs;
+} else {
+dev_dbg(&dev->dev, "cap_regs address: 0x%x/0x%x\n",
+(unsigned int)r->start, (unsigned int)u3d->cap_regs);
+}
+
+/* we will access controller register, so enable the u3d controller */
+clk_enable(u3d->clk);
+
+if (pdata->phy_init) {
+retval = pdata->phy_init(u3d->phy_regs);
+if (retval) {
+dev_err(&dev->dev, "init phy error %d\n", retval);
+goto err_u3d_enable;
+}
+}
+
+u3d->op_regs = (struct mv_u3d_op_regs __iomem *)((u32)u3d->cap_regs
++ MV_U3D_USB3_OP_REGS_OFFSET);
+
+u3d->vuc_regs = (struct mv_u3d_vuc_regs __iomem *)((u32)u3d->cap_regs
++ ioread32(&u3d->cap_regs->vuoff));
+
+u3d->max_eps = 16;
+
+/*
+ * some platform will use usb to download image, it may not disconnect
+ * usb gadget before loading kernel. So first stop u3d here.
+ */
+mv_u3d_controller_stop(u3d);
+iowrite32(0xFFFFFFFF, &u3d->vuc_regs->intrcause);
+
+size = u3d->max_eps * sizeof(struct mv_u3d_ep_context) * 2;
+size = (size + MV_U3D_EP_CONTEXT_ALIGNMENT - 1)
+& ~(MV_U3D_EP_CONTEXT_ALIGNMENT - 1);
+u3d->ep_context = dma_alloc_coherent(&dev->dev, size,
+&u3d->ep_context_dma, GFP_KERNEL);
+if (!u3d->ep_context) {
+dev_err(&dev->dev, "allocate ep context memory failed\n");
+retval = -ENOMEM;
+goto err_alloc_ep_context;
+}
+u3d->ep_context_size = size;
+
+/* create TRB dma_pool resource */
+u3d->trb_pool = dma_pool_create("u3d_trb",
+&dev->dev,
+sizeof(struct mv_u3d_trb_hw),
+MV_U3D_TRB_ALIGNMENT,
+MV_U3D_DMA_BOUNDARY);
+
+if (!u3d->trb_pool) {
+retval = -ENOMEM;
+goto err_alloc_trb_pool;
+}
+
+size = u3d->max_eps * sizeof(struct mv_u3d_ep) * 2;
+u3d->eps = kzalloc(size, GFP_KERNEL);
+if (!u3d->eps) {
+dev_err(&dev->dev, "allocate ep memory failed\n");
+retval = -ENOMEM;
+goto err_alloc_eps;
+}
+
+/* initialize ep0 status request structure */
+u3d->status_req = kzalloc(sizeof(struct mv_u3d_req) + 8, GFP_KERNEL);
+if (!u3d->status_req) {
+dev_err(&dev->dev, "allocate status_req memory failed\n");
+retval = -ENOMEM;
+goto err_alloc_status_req;
+}
+INIT_LIST_HEAD(&u3d->status_req->queue);
+
+/* allocate a small amount of memory to get valid address */
+u3d->status_req->req.buf = (char *)u3d->status_req
++ sizeof(struct mv_u3d_req);
+u3d->status_req->req.dma = virt_to_phys(u3d->status_req->req.buf);
+
+u3d->resume_state = USB_STATE_NOTATTACHED;
+u3d->usb_state = USB_STATE_ATTACHED;
+u3d->ep0_dir = MV_U3D_EP_DIR_OUT;
+u3d->remote_wakeup = 0;
+
+r = platform_get_resource(dev, IORESOURCE_IRQ, 0);
+if (!r) {
+dev_err(&dev->dev, "no IRQ resource defined\n");
+retval = -ENODEV;
+goto err_get_irq;
+}
+u3d->irq = r->start;
+if (request_irq(u3d->irq, mv_u3d_irq,
+IRQF_DISABLED | IRQF_SHARED, driver_name, u3d)) {
+u3d->irq = 0;
+dev_err(&dev->dev, "Request irq %d for u3d failed\n",
+u3d->irq);
+retval = -ENODEV;
+goto err_request_irq;
+}
+
+/* initialize gadget structure */
+u3d->gadget.ops = &mv_u3d_ops;/* usb_gadget_ops */
+u3d->gadget.ep0 = &u3d->eps[1].ep;/* gadget ep0 */
+INIT_LIST_HEAD(&u3d->gadget.ep_list);/* ep_list */
+u3d->gadget.speed = USB_SPEED_UNKNOWN;/* speed */
+
+/* the "gadget" abstracts/virtualizes the controller */
+dev_set_name(&u3d->gadget.dev, "gadget");
+u3d->gadget.dev.parent = &dev->dev;
+u3d->gadget.dev.dma_mask = dev->dev.dma_mask;
+u3d->gadget.dev.release = mv_u3d_gadget_release;
+u3d->gadget.name = driver_name;/* gadget name */
+
+retval = device_register(&u3d->gadget.dev);
+if (retval)
+goto err_register_gadget_device;
+
+mv_u3d_eps_init(u3d);
+
+/* external vbus detection */
+if (u3d->vbus) {
+u3d->clock_gating = 1;
+dev_err(&dev->dev, "external vbus detection\n");
+}
+
+/*
+ * For saving power disable clk. When clock is disabled,
+ * phy is deinit too.
+ * When clock is always on, It means that VBUS can not be detected,
+ * so enable vbus_active to make controller run at all the time.
+ */
+if (u3d->clock_gating) {
+if (pdata->phy_deinit)
+pdata->phy_deinit(u3d->phy_regs);
+clk_disable(u3d->clk);
+} else
+u3d->vbus_active = 1;
+
+/* enable usb3 controller vbus detection */
+u3d->vbus_valid_detect = 1;
+
+retval = usb_add_gadget_udc(&dev->dev, &u3d->gadget);
+if (retval)
+goto err_unregister;
+
+dev_dbg(&dev->dev, "successful probe usb3 device %s clock gating.\n",
+u3d->clock_gating ? "with" : "without");
+
+return 0;
+
+err_unregister:
+device_unregister(&u3d->gadget.dev);
+err_register_gadget_device:
+free_irq(u3d->irq, &dev->dev);
+err_request_irq:
+err_get_irq:
+kfree(u3d->status_req);
+err_alloc_status_req:
+kfree(u3d->eps);
+err_alloc_eps:
+dma_pool_destroy(u3d->trb_pool);
+err_alloc_trb_pool:
+dma_free_coherent(&dev->dev, u3d->ep_context_size,
+u3d->ep_context, u3d->ep_context_dma);
+err_alloc_ep_context:
+if (pdata->phy_deinit)
+pdata->phy_deinit(u3d->phy_regs);
+clk_disable(u3d->clk);
+err_u3d_enable:
+iounmap(u3d->cap_regs);
+err_map_cap_regs:
+err_get_cap_regs:
+err_get_clk:
+clk_put(u3d->clk);
+platform_set_drvdata(dev, NULL);
+kfree(u3d);
+err_alloc_private:
+err_pdata:
+return retval;
+}
+
+#ifdef CONFIG_PM
+static int mv_u3d_suspend(struct device *dev)
+{
+struct mv_u3d *u3d = dev_get_drvdata(dev);
+
+/*
+ * only cable is unplugged, usb can suspend.
+ * So do not care about clock_gating == 1, it is handled by
+ * vbus session.
+ */
+if (!u3d->clock_gating) {
+mv_u3d_controller_stop(u3d);
+
+spin_lock_irq(&u3d->lock);
+/* stop all usb activities */
+mv_u3d_stop_activity(u3d, u3d->driver);
+spin_unlock_irq(&u3d->lock);
+
+mv_u3d_disable(u3d);
+}
+
+return 0;
+}
+
+static int mv_u3d_resume(struct device *dev)
+{
+struct mv_u3d *u3d = dev_get_drvdata(dev);
+int retval;
+
+if (!u3d->clock_gating) {
+retval = mv_u3d_enable(u3d);
+if (retval)
+return retval;
+
+if (u3d->driver && u3d->softconnect) {
+mv_u3d_controller_reset(u3d);
+mv_u3d_ep0_reset(u3d);
+mv_u3d_controller_start(u3d);
+}
+}
+
+return 0;
+}
+
+SIMPLE_DEV_PM_OPS(mv_u3d_pm_ops, mv_u3d_suspend, mv_u3d_resume);
+#endif
+
+static void mv_u3d_shutdown(struct platform_device *dev)
+{
+struct mv_u3d *u3d = dev_get_drvdata(&dev->dev);
+u32 tmp;
+
+tmp = ioread32(&u3d->op_regs->usbcmd);
+tmp &= ~MV_U3D_CMD_RUN_STOP;
+iowrite32(tmp, &u3d->op_regs->usbcmd);
+}
+
+static struct platform_driver mv_u3d_driver = {
+.probe= mv_u3d_probe,
+.remove= __exit_p(mv_u3d_remove),
+.shutdown= mv_u3d_shutdown,
+.driver= {
+.owner= THIS_MODULE,
+.name= "mv-u3d",
+#ifdef CONFIG_PM
+.pm= &mv_u3d_pm_ops,
+#endif
+},
+};
+
+module_platform_driver(mv_u3d_driver);
+MODULE_ALIAS("platform:mv-u3d");
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_AUTHOR("Yu Xu <yuxu-eYqpPyKDWXRBDgjK7y7TUQ< at >public.gmane.org>");
+MODULE_LICENSE("GPL");
</pre>
Yu Xu
2012-05-25T02:17:47
-
[PATCH v2] usb: musb: davinci: Fix build breakage
http://comments.gmane.org/gmane.linux.usb.general/64841
<pre>This appears to have been broken by
commit 5cfb19ac604a68c030b245561f575c2d1bac1d49
(ARM: davinci: streamline sysmod access)
For now, fix by hardcoding USB_PHY_CTRL and DM355_DEEPSLEEP
Tested on DM365 with defconfig changes.
Signed-off-by: Jon Povey <jon.povey-Ean/AyPsLtfkYMGBc/C6ZA< at >public.gmane.org>
Acked-by: Sekhar Nori <nsekhar-l0cyMroinI0< at >public.gmane.org>
CC: Felipe Balbi <balbi-l0cyMroinI0< at >public.gmane.org>
Cc: <stable-u79uwXL29TY76Z2rM5mHXA< at >public.gmane.org> # v3.4.x
---
Commit message updated after comments. Patch unchanged.
drivers/usb/musb/davinci.c | 1 +
drivers/usb/musb/davinci.h | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index 768b4b5..9d63ba4 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
< at >< at > -34,6 +34,7 < at >< at >
#include <linux/dma-mapping.h>
#include <mach/cputype.h>
+#include <mach/hardware.h>
#include <asm/mach-types.h>
diff --git a/drivers/usb/musb/davinci.h b/drivers/usb/musb/davinci.h
index 046c844..371baa0 100644
--- a/drivers/usb/musb/davinci.h
+++ b/drivers/usb/musb/davinci.h
< at >< at > -15,7 +15,7 < at >< at >
*/
/* Integrated highspeed/otg PHY */
-#define USBPHY_CTL_PADDR(DAVINCI_SYSTEM_MODULE_BASE + 0x34)
+#define USBPHY_CTL_PADDR0x01c40034
#define USBPHY_DATAPOLBIT(11)/* (dm355) switch D+/D- */
#define USBPHY_PHYCLKGDBIT(8)
#define USBPHY_SESNDENBIT(7)/* v(sess_end) comparator */
< at >< at > -27,7 +27,7 < at >< at >
#define USBPHY_OTGPDWNBIT(1)
#define USBPHY_PHYPDWNBIT(0)
-#define DM355_DEEPSLEEP_PADDR(DAVINCI_SYSTEM_MODULE_BASE + 0x48)
+#define DM355_DEEPSLEEP_PADDR0x01c40048
#define DRVVBUS_FORCEBIT(2)
#define DRVVBUS_OVERRIDEBIT(1)
</pre>
Jon Povey
2012-05-25T01:50:18
-
[PATCH] usb: dwc3: add trace support
http://comments.gmane.org/gmane.linux.usb.general/64821
<pre>This patch add a few tracepoints to the DWC3
driver in order to aid debugging.
NYET-Signed-off-by: Felipe Balbi <balbi-l0cyMroinI0< at >public.gmane.org>
---
This is far from ready, but I wanted to see how the
rest of the community feels about adding a few
tracepoints to the dwc3 driver. Any suggestions of
where to add more interesting tracepoints ?
I was thinking of adding a few right before we kick
a transfer which would dump our TRB contents. That's
likely to be useful in most cases.
Any other idea of how to use traces on this driver ?
BTW Gerard/Boyan, this is (in part) what you were
looking for to be able to poke into the running
driver/IP. You could add your own debugging traces
and use them to poke into the device's registers
for your tests, though that's a bit of an abuse of
the interface, I guess ;-)
If all you need, is to print some stuff, we could, instead
use TRACE_EVENT() insteac of DECLARE_TRACE(). It would
become something like:
TRACE_EVENT(dwc3_readl,
TP_PROTO(void __iomem *base, u32 offset, u32 value),
TP_ARGS(base, offset, value),
TP_STRUCT__entry(
__field(void __iomem *, base)
__field(u32, offset)
__field(u32, value)
),
TP_fast_assign(
__entry->base = base;
__entry->offset = offset;
__entry->value = value;
),
TP_printk("read: base %p offset %08x value %08x",
__entry->base, __entry->offset,
__entry->value),
);
drivers/usb/dwc3/Makefile | 4 ++
drivers/usb/dwc3/core.c | 33 ++++++++++++++++
drivers/usb/dwc3/io.h | 23 ++----------
drivers/usb/dwc3/trace.c | 91 +++++++++++++++++++++++++++++++++++++++++++++
drivers/usb/dwc3/trace.h | 52 ++++++++++++++++++++++++++
5 files changed, 184 insertions(+), 19 deletions(-)
create mode 100644 drivers/usb/dwc3/trace.c
create mode 100644 drivers/usb/dwc3/trace.h
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 4502648..7d757bf 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
< at >< at > -7,6 +7,10 < at >< at > dwc3-y:= core.o
dwc3-y+= host.o
dwc3-y+= gadget.o ep0.o
+ifneq ($(CONFIG_TRACEPOINTS),)
+dwc3-y+= trace.o
+endif
+
ifneq ($(CONFIG_DEBUG_FS),)
dwc3-y+= debugfs.o
endif
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 49c0602..5539a12 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
< at >< at > -65,6 +65,39 < at >< at > MODULE_PARM_DESC(maximum_speed, "Maximum supported speed.");
/* -------------------------------------------------------------------------- */
+DEFINE_TRACE(dwc3_readl);
+DEFINE_TRACE(dwc3_writel);
+
+__always_inline u32 dwc3_readl(void __iomem *base, u32 offset)
+{
+u32value;
+
+/*
+ * We requested the mem region starting from the Globals address
+ * space, see dwc3_probe in core.c.
+ * However, the offsets are given starting from xHCI address space.
+ */
+value = readl(base + (offset - DWC3_GLOBALS_REGS_START));
+
+trace_dwc3_readl(base, offset, value);
+
+return value;
+}
+
+__always_inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
+{
+trace_dwc3_writel(base, offset, value);
+
+/*
+ * We requested the mem region starting from the Globals address
+ * space, see dwc3_probe in core.c.
+ * However, the offsets are given starting from xHCI address space.
+ */
+writel(value, base + (offset - DWC3_GLOBALS_REGS_START));
+}
+
+/* -------------------------------------------------------------------------- */
+
#define DWC3_DEVS_POSSIBLE32
static DECLARE_BITMAP(dwc3_devs, DWC3_DEVS_POSSIBLE);
diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
index a50f76b..12db9a3 100644
--- a/drivers/usb/dwc3/io.h
+++ b/drivers/usb/dwc3/io.h
< at >< at > -39,28 +39,13 < at >< at >
#ifndef __DRIVERS_USB_DWC3_IO_H
#define __DRIVERS_USB_DWC3_IO_H
+#include <linux/types.h>
#include <linux/io.h>
#include "core.h"
+#include "trace.h"
-static inline u32 dwc3_readl(void __iomem *base, u32 offset)
-{
-/*
- * We requested the mem region starting from the Globals address
- * space, see dwc3_probe in core.c.
- * However, the offsets are given starting from xHCI address space.
- */
-return readl(base + (offset - DWC3_GLOBALS_REGS_START));
-}
-
-static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
-{
-/*
- * We requested the mem region starting from the Globals address
- * space, see dwc3_probe in core.c.
- * However, the offsets are given starting from xHCI address space.
- */
-writel(value, base + (offset - DWC3_GLOBALS_REGS_START));
-}
+u32 dwc3_readl(void __iomem *base, u32 offset);
+void dwc3_writel(void __iomem *base, u32 offset, u32 value);
#endif /* __DRIVERS_USB_DWC3_IO_H */
diff --git a/drivers/usb/dwc3/trace.c b/drivers/usb/dwc3/trace.c
new file mode 100644
index 0000000..65dffcb
--- /dev/null
+++ b/drivers/usb/dwc3/trace.c
< at >< at > -0,0 +1,91 < at >< at >
+/**
+ * debugfs.c - DesignWare USB3 DRD Controller DebugFS file
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Authors: Felipe Balbi <balbi-l0cyMroinI0< at >public.gmane.org>,
+ * Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ< at >public.gmane.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+
+#include "trace.h"
+#include "core.h"
+#include "io.h"
+
+static void probe_dwc3_readl(void *_dwc, void __iomem *base,
+u32 offset, u32 value)
+{
+struct dwc3*dwc = _dwc;
+
+dev_info(dwc->dev, "READ: base %p offset %08x value %08x\n",
+base, offset, value);
+}
+
+static void probe_dwc3_writel(void *_dwc, void __iomem *base,
+u32 offset, u32 value)
+{
+struct dwc3*dwc = _dwc;
+
+dev_info(dwc->dev, "WRITE: base %p offset %08x value %08x\n",
+base, offset, value);
+}
+
+int __devinit dwc3_trace_init(struct dwc3 *dwc)
+{
+intret;
+
+ret = register_trace_dwc3_writel(probe_dwc3_writel, dwc);
+if (ret)
+goto err0;
+
+ret = register_trace_dwc3_readl(probe_dwc3_readl, dwc);
+if (ret)
+goto err1;
+
+return 0;
+
+err1:
+unregister_trace_dwc3_writel(probe_dwc3_writel, dwc);
+
+err0:
+tracepoint_synchronize_unregister();
+
+return ret;
+}
+
+void __devexit dwc3_trace_exit(struct dwc3 *dwc)
+{
+unregister_trace_dwc3_readl(probe_dwc3_readl, dwc);
+unregister_trace_dwc3_writel(probe_dwc3_writel, dwc);
+tracepoint_synchronize_unregister();
+}
diff --git a/drivers/usb/dwc3/trace.h b/drivers/usb/dwc3/trace.h
new file mode 100644
index 0000000..86367e4
--- /dev/null
+++ b/drivers/usb/dwc3/trace.h
< at >< at > -0,0 +1,52 < at >< at >
+/**
+ * trace.h - DesignWare USB3 DRD Controller TracePoints file
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi <balbi-l0cyMroinI0< at >public.gmane.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DWC3_TRACE_H
+#define __DWC3_TRACE_H
+
+#include <linux/compiler.h>/* for __iomem */
+#include <linux/tracepoint.h>
+
+DECLARE_TRACE(dwc3_readl,
+TP_PROTO(void __iomem *base, u32 offset, u32 value),
+TP_ARGS(base, offset, value));
+
+DECLARE_TRACE(dwc3_writel,
+TP_PROTO(void __iomem *base, u32 offset, u32 value),
+TP_ARGS(base, offset, value));
+
+#endif /* __DWC3_TRACE_H */
</pre>
Felipe Balbi
2012-05-24T12:48:24
-
[PATCH 00/15] pending dwc3 patches
http://comments.gmane.org/gmane.linux.usb.general/64798
<pre>Hi guys,
here are a few patches I have been holding on a local
branch. Once -rc1 is tagged, I will queue them for v3.6
merge window.
note the Fix for USB30CV's U1/U2 Test provided by Gerard
(thanks dude).
ps: I still have to run a few tests on these patches
myself, so they might still change and you can't find
them on my kernel.org tree yet ;-)
Felipe Balbi (9):
usb: dwc3: fix a WARN and a comment
usb: dwc3: handle pending unaligned Control OUT data phase correctly
usb: dwc3: ep0: switch over to IS_ALIGNED
usb: dwc3: ep0: align on function signature
usb: dwc3: ep0: fix a typo in comment
usb: dwc3: gadget: remove trailing semicolon
usb: dwc3: drop HAVE_CLK dependency from Exynos glue layer
usb: dwc3: gadget: prevent DCTL register corruption
usb: dwc3: gadget: disable U1/U2 on disconnect
Gerard CAUVY (1):
usb: dwc3: gadget: move AcceptU1Ena and AcceptU2Ena to Reset IRQ
Paul Zimmerman (5):
usb: dwc3: add definitions for new registers
usb: dwc3: gadget: reinitialize retries
usb: dwc3: gadget: rename phy_power() to phy_suspend()
usb: dwc3: support new revisions of DWC3 core
usb: dwc3: core: make sure evt->lpos is correctly initialized
drivers/usb/dwc3/Makefile | 14 +-----
drivers/usb/dwc3/core.c | 7 ++-
drivers/usb/dwc3/core.h | 94 +++++++++++++++++++++++++++--------
drivers/usb/dwc3/ep0.c | 102 ++++++++++++++++++++++----------------
drivers/usb/dwc3/gadget.c | 119 ++++++++++++++++++++++++++++++++-------------
drivers/usb/dwc3/gadget.h | 5 ++
6 files changed, 233 insertions(+), 108 deletions(-)
</pre>
Felipe Balbi
2012-05-24T10:34:35
-
Certain about struct *usb_otg at struct usb_phy
http://comments.gmane.org/gmane.linux.usb.general/64787
<pre>Hi Felipe and others,
I have found one design limitation at current otg/phy framework, that
is there is a usb_otg pointer at usb_phy's struct, and we must keep it
in order to let the host and device driver pass their pointer to otg
driver (the otg driver here is mainly do dual-role switch, and with/
without otg timer funtion) through otg_set_host/otg_set_peripheral.
In fact, the struct usb_phy should be no relationship with struct usb_otg,
as phy and otg is no relationship, besides, the host/device driver
should unnecessary to call get_usb_transciever to get usb_phy's pointer.
usb phy is resource that any USB drivers can use it, but should not
mandatory use it.
I wonder if we can use some ways to delete usb_otg pointer from struct
usb_otg.
</pre>
Peter Chen
2012-05-24T09:27:10
-
[PATCH] USB: qcserial: Add Sierra Wireless device IDs
http://comments.gmane.org/gmane.linux.usb.general/64785
<pre>Some additional IDs found in the BSD/GPL licensed out-of-tree
GobiSerial driver from Sierra Wireless.
Signed-off-by: Bjørn Mork <bjorn-yOkvZcmFvRU< at >public.gmane.org>
---
drivers/usb/serial/qcserial.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c
index 0d5fe59..996015c 100644
--- a/drivers/usb/serial/qcserial.c
+++ b/drivers/usb/serial/qcserial.c
< at >< at > -105,7 +105,13 < at >< at > static const struct usb_device_id id_table[] = {
{USB_DEVICE(0x1410, 0xa021)},/* Novatel Gobi 3000 Composite */
{USB_DEVICE(0x413c, 0x8193)},/* Dell Gobi 3000 QDL */
{USB_DEVICE(0x413c, 0x8194)},/* Dell Gobi 3000 Composite */
+{USB_DEVICE(0x1199, 0x9010)},/* Sierra Wireless Gobi 3000 QDL */
+{USB_DEVICE(0x1199, 0x9012)},/* Sierra Wireless Gobi 3000 QDL */
{USB_DEVICE(0x1199, 0x9013)},/* Sierra Wireless Gobi 3000 Modem device (MC8355) */
+{USB_DEVICE(0x1199, 0x9014)},/* Sierra Wireless Gobi 3000 QDL */
+{USB_DEVICE(0x1199, 0x9015)},/* Sierra Wireless Gobi 3000 Modem device */
+{USB_DEVICE(0x1199, 0x9018)},/* Sierra Wireless Gobi 3000 QDL */
+{USB_DEVICE(0x1199, 0x9019)},/* Sierra Wireless Gobi 3000 Modem device */
{USB_DEVICE(0x12D1, 0x14F0)},/* Sony Gobi 3000 QDL */
{USB_DEVICE(0x12D1, 0x14F1)},/* Sony Gobi 3000 Composite */
{ }/* Terminating entry */
</pre>
Bjørn Mork
2012-05-24T09:19:04
-
[PATCH v2 0/4] usb: chipidea: correct naming and id management
http://comments.gmane.org/gmane.linux.usb.general/64750
<pre>Changes since v1:
- rebase to Alex's tree for-felipe
- add ci13xxx_remove_device to put id
- change id management to bitmap
Richard Zhao (4):
USB: Chipidea: rename struct ci13xxx_udc_driver to struct
ci13xxx_platform_data
USB: Chipidea: rename struct ci13xxx variables from udc to ci
USB: Chipidea: add unified ci13xxx_{add,remove}_device for platform
drivers
USB: Chipidea: add ci13xxx device id management
drivers/usb/chipidea/ci.h | 30 +-
drivers/usb/chipidea/ci13xxx_msm.c | 48 +--
drivers/usb/chipidea/ci13xxx_pci.c | 52 +---
drivers/usb/chipidea/core.c | 108 ++++++-
drivers/usb/chipidea/debug.c | 146 +++++-----
drivers/usb/chipidea/host.c | 2 +-
drivers/usb/chipidea/udc.c | 630 ++++++++++++++++++------------------
include/linux/usb/chipidea.h | 11 +-
8 files changed, 544 insertions(+), 483 deletions(-)
</pre>
Richard Zhao
2012-05-23T15:45:14
-
[PATCH] usb: chipidea: remove unneeded NULL check
http://comments.gmane.org/gmane.linux.usb.general/64735
<pre>As reported by Dan Carpenter, there is a NULL check in udc_start() that
follows a dereference of the pointer that's being checked. However, at
that point udc pointer shouldn't ever be NULL and if it is, the dereference
should cause an oops.
Reported-by: Dan Carpenter <dan.carpenter-QHcLZuEGTsvQT0dZR+AlfA< at >public.gmane.org>
Signed-off-by: Alexander Shishkin <alexander.shishkin-VuQAYsv1563Yd54FQh9/CA< at >public.gmane.org>
---
drivers/usb/chipidea/udc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 51f9694..cdb9212 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
< at >< at > -1647,9 +1647,6 < at >< at > static int udc_start(struct ci13xxx *udc)
struct device *dev = udc->dev;
int retval = 0;
-if (!udc)
-return -EINVAL;
</pre>
Alexander Shishkin
2012-05-23T13:00:56
-
[PATCH] [g_mass_storage] Fix unmount problem with OS-X
http://comments.gmane.org/gmane.linux.usb.general/64734
<pre>OS-X uses a sequence on unmounting that makes us close the backing
file. Apparently there's no way to open it again, which makes it
impossible to remount without rmmod'ing g_mass_storage.
Fix this by adding a media_ejected flag to each lun, and keeping
track of it properly.
Any other method (i.e. preventing unmount, and not keeping track
of the eject status) failed due to OS-X sending start stop commands
after the unmount and checking again.
---
drivers/usb/gadget/f_mass_storage.c | 21 ++++++++++++++-------
drivers/usb/gadget/storage_common.c | 11 +++++++++++
2 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index cb8c162..b865d20 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
< at >< at > -1445,6 +1445,9 < at >< at > static int do_start_stop(struct fsg_common *common)
curlun->sense_data = SS_MEDIUM_NOT_PRESENT;
return -EINVAL;
}
+
+/* if the host is trying again, the media are mounted */
+fsg_lun_set_ejected(curlun, 0);
return 0;
}
< at >< at > -1468,11 +1471,15 < at >< at > static int do_start_stop(struct fsg_common *common)
return 0;
}
-up_read(&common->filesem);
-down_write(&common->filesem);
-fsg_lun_close(curlun);
-up_write(&common->filesem);
-down_read(&common->filesem);
+/*
+ * Do not close the LUNs, just made them invisible.
+ * When the next exception comes we make them visible
+ * again. This fixes the bug where MacOSX unmounts
+ * and then it's impossible to mount again, since
+ * fsg_lun_open is never called again.
+ */
+
+fsg_lun_set_ejected(curlun, 1);
return common->ops && common->ops->post_eject
? min(0, common->ops->post_eject(common, curlun,
< at >< at > -1531,7 +1538,6 < at >< at > static int do_mode_select(struct fsg_common *common, struct fsg_buffhd *bh)
return -EINVAL;
}
-
/*-------------------------------------------------------------------------*/
static int halt_bulk_in_endpoint(struct fsg_dev *fsg)
< at >< at > -1917,7 +1923,7 < at >< at > static int check_command(struct fsg_common *common, int cmnd_size,
/* If the medium isn't mounted and the command needs to access
* it, return an error. */
-if (curlun && !fsg_lun_is_open(curlun) && needs_medium) {
+if (curlun && !fsg_lun_is_open_and_mounted(curlun) && needs_medium) {
curlun->sense_data = SS_MEDIUM_NOT_PRESENT;
return -EINVAL;
}
< at >< at > -2533,6 +2539,7 < at >< at > static void handle_exception(struct fsg_common *common)
curlun->unit_attention_data = SS_NO_SENSE;
curlun->sense_data_info = 0;
curlun->info_valid = 0;
+curlun->media_ejected = 0;
}
common->state = FSG_STATE_IDLE;
}
diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index 8081ca3..723c6aa 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
< at >< at > -199,6 +199,7 < at >< at > struct fsg_lun {
unsigned intregistered:1;
unsigned intinfo_valid:1;
unsigned intnofua:1;
+unsigned intmedia_ejected:1;
u32sense_data;
u32sense_data_info;
< at >< at > -211,6 +212,16 < at >< at > struct fsg_lun {
#define fsg_lun_is_open(curlun)((curlun)->filp != NULL)
+#define fsg_lun_is_ejected(curlun) ((curlun)->media_ejected)
+
+#define fsg_lun_set_ejected(curlun, v) ((curlun)->media_ejected = !!(v))
+
+#define fsg_lun_is_open_and_mounted(curlun) \
+({ \
+const struct fsg_lun *_curlun = (curlun); \
+fsg_lun_is_open(_curlun) && !fsg_lun_is_ejected(_curlun); \
+ })
+
static struct fsg_lun *fsg_lun_from_dev(struct device *dev)
{
return container_of(dev, struct fsg_lun, dev);
</pre>
Pantelis Antoniou
2012-05-24T11:49:03
-
[PATCH] drivers: usb: musb: add bf60x support
http://comments.gmane.org/gmane.linux.usb.general/64729
<pre>Bf60x uses new musb ip which is a little different from old blackfin boards.
Now it's the same as most of other arch without a lot of blackfin specific
anomaly.
Signed-off-by: Bob Liu <lliubbo-Re5JQEeQqe8AvxtiuMwx3w< at >public.gmane.org>
---
drivers/usb/musb/Kconfig | 3 ++-
drivers/usb/musb/blackfin.c | 31 +++++++++++++++++++++++++------
drivers/usb/musb/musb_core.c | 5 +++--
drivers/usb/musb/musb_core.h | 2 +-
drivers/usb/musb/musb_dma.h | 2 +-
drivers/usb/musb/musb_io.h | 2 +-
drivers/usb/musb/musb_regs.h | 2 +-
drivers/usb/musb/musbhsdma.c | 2 +-
drivers/usb/musb/musbhsdma.h | 2 +-
9 files changed, 36 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index f70cab3..0fb1466 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
< at >< at > -7,6 +7,7 < at >< at >
config USB_MUSB_HDRC
tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)'
depends on USB && USB_GADGET
+depends on (ARM || (BF54x && !BF544) || (BF52x && !BF522 && !BF523) || (BF60x))
select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN)
select TWL4030_USB if MACH_OMAP_3430SDP
select TWL6030_USB if MACH_OMAP_4430SDP || MACH_OMAP4_PANDA
< at >< at > -56,7 +57,7 < at >< at > config USB_MUSB_AM35X
config USB_MUSB_BLACKFIN
tristate "Blackfin"
-depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523)
+depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523) || (BF60x)
config USB_MUSB_UX500
tristate "U8500 and U5500"
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index a087ed6..0f31690 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
< at >< at > -34,6 +34,7 < at >< at > struct bfin_glue {
/*
* Load an endpoint's FIFO
*/
+#ifndef CONFIG_BF60x
void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
{
struct musb *musb = hw_ep->musb;
< at >< at > -162,6 +163,7 < at >< at > void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
dump_fifo_data(dst, len);
}
+#endif
static irqreturn_t blackfin_interrupt(int irq, void *__hci)
{
< at >< at > -174,7 +176,6 < at >< at > static irqreturn_t blackfin_interrupt(int irq, void *__hci)
musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
-
if (musb->int_usb || musb->int_tx || musb->int_rx) {
musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
< at >< at > -216,10 +217,14 < at >< at > static void musb_conn_timer_handler(unsigned long _musb)
val = musb_readw(musb->mregs, MUSB_DEVCTL);
if (!(val & MUSB_DEVCTL_BDEVICE)) {
+#ifndef CONFIG_BF60x
gpio_set_value(musb->config->gpio_vrsel, 1);
+#endif
musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
} else {
+#ifndef CONFIG_BF60x
gpio_set_value(musb->config->gpio_vrsel, 0);
+#endif
/* Ignore VBUSERROR and SUSPEND IRQ */
val = musb_readb(musb->mregs, MUSB_INTRUSBE);
val &= ~MUSB_INTR_VBUSERROR;
< at >< at > -247,11 +252,14 < at >< at > static void musb_conn_timer_handler(unsigned long _musb)
val = musb_readw(musb->mregs, MUSB_DEVCTL);
if (!(val & MUSB_DEVCTL_BDEVICE)) {
+#ifndef CONFIG_BF60x
gpio_set_value(musb->config->gpio_vrsel, 1);
+#endif
musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
} else {
+#ifndef CONFIG_BF60x
gpio_set_value(musb->config->gpio_vrsel, 0);
-
+#endif
/* Ignore VBUSERROR and SUSPEND IRQ */
val = musb_readb(musb->mregs, MUSB_INTRUSBE);
val &= ~MUSB_INTR_VBUSERROR;
< at >< at > -361,6 +369,7 < at >< at > static int bfin_musb_adjust_channel_params(struct dma_channel *channel,
static void bfin_musb_reg_init(struct musb *musb)
{
+#ifndef CONFIG_BF60x
if (ANOMALY_05000346) {
bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value);
SSYNC();
< at >< at > -395,11 +404,20 < at >< at > static void bfin_musb_reg_init(struct musb *musb)
EP2_RX_ENA | EP3_RX_ENA | EP4_RX_ENA |
EP5_RX_ENA | EP6_RX_ENA | EP7_RX_ENA);
SSYNC();
+#else
+bfin_write_USB_PLLOSC_CTRL((480/musb->config->clkin) << 1);
+SSYNC();
+
+bfin_write_USB_VBUS_CTL(0x00);
+bfin_write_USB_APHY_CNTRL(0x80);
+SSYNC();
+musb->config->ram_bits = musb_readb(musb->mregs, MUSB_RAMINFO) & 0xf;
+#endif
}
static int bfin_musb_init(struct musb *musb)
{
-
+#ifndef CONFIG_BF60x
/*
* Rev 1.0 BF549 EZ-KITs require PE7 to be high for both DEVICE
* and OTG HOST modes, while rev 1.1 and greater require PE7 to
< at >< at > -413,7 +431,7 < at >< at > static int bfin_musb_init(struct musb *musb)
return -ENODEV;
}
gpio_direction_output(musb->config->gpio_vrsel, 0);
-
+#endif
usb_nop_xceiv_register();
musb->xceiv = usb_get_transceiver();
if (!musb->xceiv) {
< at >< at > -422,16 +440,17 < at >< at > static int bfin_musb_init(struct musb *musb)
}
bfin_musb_reg_init(musb);
-
if (is_host_enabled(musb)) {
setup_timer(&musb_conn_timer,
musb_conn_timer_handler, (unsigned long) musb);
}
+#ifndef CONFIG_BF60x
if (is_peripheral_enabled(musb))
musb->xceiv->set_power = bfin_musb_set_power;
-musb->isr = blackfin_interrupt;
musb->double_buffer_not_ok = true;
+#endif
+musb->isr = blackfin_interrupt;
return 0;
}
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 66aaccf..f1cdee4 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
< at >< at > -224,7 +224,7 < at >< at > static struct usb_phy_io_ops musb_ulpi_access = {
/*-------------------------------------------------------------------------*/
-#if !defined(CONFIG_USB_MUSB_TUSB6010) && !defined(CONFIG_USB_MUSB_BLACKFIN)
+#if !defined(CONFIG_USB_MUSB_TUSB6010) && (!defined(CONFIG_USB_MUSB_BLACKFIN) || CONFIG_BF60x)
/*
* Load an endpoint's FIFO
< at >< at > -1034,7 +1034,8 < at >< at > static void musb_shutdown(struct platform_device *pdev)
|| defined(CONFIG_USB_MUSB_OMAP2PLUS)\
|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)\
|| defined(CONFIG_USB_MUSB_AM35X)\
-|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
+|| defined(CONFIG_USB_MUSB_AM35X_MODULE)\
+|| defined(CONFIG_USB_MUSB_BLACKFIN)
static ushort __devinitdata fifo_mode = 4;
#elif defined(CONFIG_USB_MUSB_UX500)\
|| defined(CONFIG_USB_MUSB_UX500_MODULE)
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index f4a40f0..e93476e 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
< at >< at > -463,7 +463,7 < at >< at > static inline struct musb *gadget_to_musb(struct usb_gadget *g)
return container_of(g, struct musb, g);
}
-#ifdef CONFIG_BLACKFIN
+#if defined(CONFIG_BLACKFIN) && !defined(CONFIG_BF60x)
static inline int musb_read_fifosize(struct musb *musb,
struct musb_hw_ep *hw_ep, u8 epnum)
{
diff --git a/drivers/usb/musb/musb_dma.h b/drivers/usb/musb/musb_dma.h
index 3a97c4e..8357407 100644
--- a/drivers/usb/musb/musb_dma.h
+++ b/drivers/usb/musb/musb_dma.h
< at >< at > -84,7 +84,7 < at >< at > struct musb_hw_ep;
*Only allow DMA mode 1 to be used when the USB will actually generate the
*interrupts we expect.
*/
-#ifdef CONFIG_BLACKFIN
+#if defined(CONFIG_BLACKFIN) && !defined(CONFIG_BF60x)
# undef USE_MODE1
# if !ANOMALY_05000456
# define USE_MODE1
diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h
index 1d5eda2..d12874b 100644
--- a/drivers/usb/musb/musb_io.h
+++ b/drivers/usb/musb/musb_io.h
< at >< at > -57,7 +57,7 < at >< at > static inline void writesb(const void __iomem *addr, const void *buf, int len)
#endif
-#ifndef CONFIG_BLACKFIN
+#if !defined(CONFIG_BLACKFIN) || defined(CONFIG_BF60x)
/* NOTE: these offsets are all in bytes */
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 03f2655..bffa4a1 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
< at >< at > -214,7 +214,7 < at >< at >
#define MUSB_HUBADDR_MULTI_TT0x80
-#ifndef CONFIG_BLACKFIN
+#if !defined(CONFIG_BLACKFIN) || defined(CONFIG_BF60x)
/*
* Common USB registers
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c
index 57a6085..25379bc 100644
--- a/drivers/usb/musb/musbhsdma.c
+++ b/drivers/usb/musb/musbhsdma.c
< at >< at > -269,7 +269,7 < at >< at > static irqreturn_t dma_controller_irq(int irq, void *private_data)
int_hsdma = musb_readb(mbase, MUSB_HSDMA_INTR);
-#ifdef CONFIG_BLACKFIN
+#if defined(CONFIG_BLACKFIN) && !defined(CONFIG_BF60x)
/* Clear DMA interrupt flags */
musb_writeb(mbase, MUSB_HSDMA_INTR, int_hsdma);
#endif
diff --git a/drivers/usb/musb/musbhsdma.h b/drivers/usb/musb/musbhsdma.h
index 320fd4a..f971d07 100644
--- a/drivers/usb/musb/musbhsdma.h
+++ b/drivers/usb/musb/musbhsdma.h
< at >< at > -35,7 +35,7 < at >< at >
#include "omap2430.h"
#endif
-#ifndef CONFIG_BLACKFIN
+#if !defined(CONFIG_BLACKFIN) || defined(CONFIG_BF60x)
#define MUSB_HSDMA_BASE0x200
#define MUSB_HSDMA_INTR(MUSB_HSDMA_BASE + 0)
</pre>
Bob Liu
2012-05-23T10:09:49
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