gmane.linux.ports.ppc64.devel

pread() and pwrite() system calls

David Laight — 2012-05-25T13:29:06

We have a system with linux 2.6.32 and the somewhat archaic
uClibc 0.9.27 (but I'm not sure the current version is
any better, and I think there are binary compatibility
if we update).

I've just discovered that pread() is 'implemented'
by using 3 lseek() system calls and read().
(the same is true for the 64bit versions).

I thought that pread() was supposed to be atomic
(so usable concurrently by multiple threads) which
means that this implementation is completely broken.

I've not looked to see what glibc does.

I can see that part of the problem is the alignment
of the 64bit value on the argument list of syscall()
(when the register save area is cast to a sycall
argument structure).
But it also looks as though the uClibc syscall()
stub can only pass 5 arguments in registers, and
pread() (with an aligned 64bit offset) requires 6.

The ucLibc source seems to be predicated by __NR_pread,
but if that were defined it would try to call
__syscall_pread() and I can't find that anywhere.

A special pread/pwrite asm stub that just copies
r7 to r0 could be used.

Would it be enough to do:
syscall_pread_pwrite:
mov 0,7
sc
blr
and handle the -ve -> errno in C?

I've seen other parts of linux pass structures to
avoid issues with excessive number of arguments.
Unlike things like NetBSD amd64 which will read
additional args off the user stack (and has per-system
call stubs in libc so doesn't lose one argument).
(I rearranged the NetBSD amd64 kernel trap frame
layout so all the args ended up adjacent...)

David

module loading issue/flaw in busy memory situation?

Wrobel Heinz-R39252 — 2012-05-24T20:05:19

Hi,

let's assume a module gets loaded into an already busy system, and the ".init.text" section with the __init function gets loaded into one memory region, and the normal ".text" section gets loaded into a totally different memory region.
Now assume that both regions are >32MB apart in addressing, so that a call from the __init .init.text function to any function in .text requires a trampoline as set up by the do_plt_call() function in arch/kernel/module*.c
So far so good for user code.

Now assume that the __init function is not trivial and will require register save/restore functions in prologue/epilogue with such calls generated by gcc, e.g., the __init function calls _rest32gpr_28_x() in the epilogue. This restore functions however is in the .text section due to the static link of the normal libs.

Now we have the __init function calling the trampoline, which is destroying r11. The trampoline is then jumping to the register restore function which relies on r11 still being intact, which it now isn't anymore.
Net result is a crash because the trampoline ABI conflicts with the register restore ABI and you get a case of garbage in leading to garbage out.

This situation has apparently occurred based on the debug results I have here.

In the general case of module development it seems unpredictable if gcc will actually call a register restore function from the __init function, or if the sections get loaded to require a trampoline, so for any non-trivial function in non-trivial memory setups, a crash would have to be expected, depending on the time of day and moon phase when the module gets loaded.

Is this a fundamental flaw in the interaction of the module section use specification and the module load mechanism with the ABI definition?

Or am I missing some incorrect setup or requirement for __init functions that I should deal with?

Thanks,

Heinz
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[PATCH 1/2] powerpc/85xx: Add P1024rdb dts support

2012-05-24T09:08:27

From: Tang Yuantian <Yuantian.Tang< at >freescale.com>

Signed-off-by: Jin Qing <b24347< at >freescale.com>
Signed-off-by: Li Yang <leoli< at >freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang< at >freescale.com>
---
 arch/powerpc/boot/dts/p1024rdb.dtsi    |  228 ++++++++++++++++++++++++++++++++
 arch/powerpc/boot/dts/p1024rdb_32b.dts |   87 ++++++++++++
 arch/powerpc/boot/dts/p1024rdb_36b.dts |   87 ++++++++++++
 3 files changed, 402 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1024rdb.dtsi
 create mode 100644 arch/powerpc/boot/dts/p1024rdb_32b.dts
 create mode 100644 arch/powerpc/boot/dts/p1024rdb_36b.dts

diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/p1024rdb.dtsi
new file mode 100644
index 0000000..b05dcb4
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dtsi
< at >< at > -0,0 +1,228 < at >< at >
+/*
+ * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+nor< at >0,0 {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "cfi-flash";
+reg = <0x0 0x0 0x1000000>;
+bank-width = <2>;
+device-width = <1>;
+
+partition< at >0 {
+/* This location must not be altered  */
+/* 256KB for Vitesse 7385 Switch firmware */
+reg = <0x0 0x00040000>;
+label = "NOR Vitesse-7385 Firmware";
+read-only;
+};
+
+partition< at >40000 {
+/* 256KB for DTB Image */
+reg = <0x00040000 0x00040000>;
+label = "NOR DTB Image";
+};
+
+partition< at >80000 {
+/* 3.5 MB for Linux Kernel Image */
+reg = <0x00080000 0x00380000>;
+label = "NOR Linux Kernel Image";
+};
+
+partition< at >400000 {
+/* 11MB for JFFS2 based Root file System */
+reg = <0x00400000 0x00b00000>;
+label = "NOR JFFS2 Root File System";
+};
+
+partition< at >f00000 {
+/* This location must not be altered  */
+/* 512KB for u-boot Bootloader Image */
+/* 512KB for u-boot Environment Variables */
+reg = <0x00f00000 0x00100000>;
+label = "NOR U-Boot Image";
+read-only;
+};
+};
+
+nand< at >1,0 {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+reg = <0x1 0x0 0x40000>;
+
+partition< at >0 {
+/* This location must not be altered  */
+/* 1MB for u-boot Bootloader Image */
+reg = <0x0 0x00100000>;
+label = "NAND U-Boot Image";
+read-only;
+};
+
+partition< at >100000 {
+/* 1MB for DTB Image */
+reg = <0x00100000 0x00100000>;
+label = "NAND DTB Image";
+};
+
+partition< at >200000 {
+/* 4MB for Linux Kernel Image */
+reg = <0x00200000 0x00400000>;
+label = "NAND Linux Kernel Image";
+};
+
+partition< at >600000 {
+/* 4MB for Compressed Root file System Image */
+reg = <0x00600000 0x00400000>;
+label = "NAND Compressed RFS Image";
+};
+
+partition< at >a00000 {
+/* 15MB for JFFS2 based Root file System */
+reg = <0x00a00000 0x00f00000>;
+label = "NAND JFFS2 Root File System";
+};
+
+partition< at >1900000 {
+/* 7MB for User Writable Area */
+reg = <0x01900000 0x00700000>;
+label = "NAND Writable User area";
+};
+};
+};
+
+&soc {
+spi< at >7000 {
+flash< at >0 {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "spansion,m25p80";
+reg = <0>;
+spi-max-frequency = <40000000>;
+
+partition< at >0 {
+/* 512KB for u-boot Bootloader Image */
+reg = <0x0 0x00080000>;
+label = "SPI U-Boot Image";
+read-only;
+};
+
+partition< at >80000 {
+/* 512KB for DTB Image */
+reg = <0x00080000 0x00080000>;
+label = "SPI DTB Image";
+};
+
+partition< at >100000 {
+/* 4MB for Linux Kernel Image */
+reg = <0x00100000 0x00400000>;
+label = "SPI Linux Kernel Image";
+};
+
+partition< at >500000 {
+/* 4MB for Compressed RFS Image */
+reg = <0x00500000 0x00400000>;
+label = "SPI Compressed RFS Image";
+};
+
+partition< at >900000 {
+/* 7MB for JFFS2 based RFS */
+reg = <0x00900000 0x00700000>;
+label = "SPI JFFS2 RFS";
+};
+};
+};
+
+i2c< at >3000 {
+rtc< at >68 {
+compatible = "dallas,ds1339";
+reg = <0x68>;
+};
+};
+
+usb< at >22000 {
+phy_type = "ulpi";
+};
+
+usb< at >23000 {
+status = "disabled";
+};
+
+mdio< at >24000 {
+phy0: ethernet-phy< at >0 {
+interrupts = <3 1 0 0>;
+reg = <0x0>;
+};
+phy1: ethernet-phy< at >1 {
+interrupts = <2 1 0 0>;
+reg = <0x1>;
+};
+phy2: ethernet-phy< at >2 {
+interrupts = <1 1 0 0>;
+reg = <0x2>;
+};
+};
+
+mdio< at >25000 {
+tbi0: tbi-phy< at >11 {
+reg = <0x11>;
+device_type = "tbi-phy";
+};
+};
+
+mdio< at >26000 {
+tbi1: tbi-phy< at >11 {
+reg = <0x11>;
+device_type = "tbi-phy";
+};
+};
+
+ethernet< at >b0000 {
+phy-handle = <&phy2>;
+phy-connection-type = "rgmii-id";
+};
+
+ethernet< at >b1000 {
+phy-handle = <&phy0>;
+tbi-handle = <&tbi0>;
+phy-connection-type = "sgmii";
+};
+
+ethernet< at >b2000 {
+phy-handle = <&phy1>;
+phy-connection-type = "rgmii-id";
+};
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb_32b.dts b/arch/powerpc/boot/dts/p1024rdb_32b.dts
new file mode 100644
index 0000000..90e803e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_32b.dts
< at >< at > -0,0 +1,87 < at >< at >
+/*
+ * P1024 RDB 32Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+model = "fsl,P1024RDB";
+compatible = "fsl,P1024RDB";
+
+memory {
+device_type = "memory";
+};
+
+lbc: localbus< at >ffe05000 {
+reg = <0x0 0xffe05000 0 0x1000>;
+ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+  0x1 0x0 0x0 0xff800000 0x00040000>;
+};
+
+soc: soc< at >ffe00000 {
+ranges = <0x0 0x0 0xffe00000 0x100000>;
+};
+
+pci0: pcie< at >ffe09000 {
+reg = <0x0 0xffe09000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+pcie< at >0 {
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+
+pci1: pcie< at >ffe0a000 {
+reg = <0x0 0xffe0a000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+pcie< at >0 {
+reg = <0x0 0x0 0x0 0x0 0x0>;
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
new file mode 100644
index 0000000..3656825
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_36b.dts
< at >< at > -0,0 +1,87 < at >< at >
+/*
+ * P1024 RDB 36Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+model = "fsl,P1024RDB";
+compatible = "fsl,P1024RDB";
+
+memory {
+device_type = "memory";
+};
+
+lbc: localbus< at >fffe05000 {
+reg = <0xf 0xffe05000 0 0x1000>;
+ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+  0x1 0x0 0xf 0xff800000 0x00040000>;
+};
+
+soc: soc< at >fffe00000 {
+ranges = <0x0 0xf 0xffe00000 0x100000>;
+};
+
+pci0: pcie< at >fffe09000 {
+reg = <0xf 0xffe09000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+pcie< at >0 {
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+
+pci1: pcie< at >fffe0a000 {
+reg = <0xf 0xffe0a000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+pcie< at >0 {
+reg = <0x0 0x0 0x0 0x0 0x0>;
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"

Oops with Radeon/Uninorth on Maple

Dmitry Eremin-Solenikov — 2012-05-24T06:18:55

Hello, colleagues,

I'm trying to enable an AGP slot (again) on my Maple board (dual 
PPC970FX board, with CPC925 (U3H) north bridge).

  For now I'm stuck with a problem: I use radeon card, drm-radeon driver 
with KMS.

If I force drm-radeon to think about a card as about PCI card (by 
commenting corresponding lines in drm_radeon_kms.c), everything works, I 
get framebuffer, working X11, etc. If I enable agpgart-uninorth driver
and RADEON_IS_AGP flag in drm driver, I get an Oops early during the 
bootstrap. Relevant part of the log (I can send full dmesg of normal 
bootstrap or this oops on request, if that would help).

[    2.820647] Linux agpgart interface v0.103
[    2.824909] agpgart-uninorth 0000:f0:0b.0: Apple U3H chipset
[    2.830668] agpgart-uninorth 0000:f0:0b.0: Found device u3, rev 35
[    2.843611] agpgart-uninorth 0000:f0:0b.0: configuring for size idx: 64
[    2.850638] agpgart-uninorth 0000:f0:0b.0: AGP aperture is 256M < at > 0x0
[    2.857646] [drm] Initialized drm 1.1.0 20060810
[    2.862567] [drm] radeon defaulting to kernel modesetting.
[    2.868091] [drm] radeon kernel modesetting enabled.
[    2.873222] radeon 0000:f0:10.0: enabling device (0000 -> 0003)
[    2.880311] radeon 0000:f0:10.0: enabling bus mastering
[    2.885591] [drm] initializing kernel modesetting (RV350 
0x1002:0x4152 0x18BC:0x0416).
[    2.893629] [drm] register mmio base: 0xD0020000
[    2.898260] [drm] register mmio size: 65536
[    2.947112] [drm] GPU not posted. posting now...
[    3.051033] agpgart-uninorth 0000:f0:0b.0: putting AGP V3 device into 
8x mode
[    3.058197] radeon 0000:f0:10.0: putting AGP V3 device into 8x mode
[    3.064666] radeon 0000:f0:10.0: GTT: 256M 0x00000000 - 0x0FFFFFFF
[    3.070864] [drm] Generation 2 PCI interface, using max accessible memory
[    3.077672] radeon 0000:f0:10.0: VRAM: 128M 0x00000000C0000000 - 
0x00000000C7FFFFFF (128M used)
[    3.086487] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[    3.093126] [drm] Driver supports precise vblank timestamp query.
[    3.099291] [drm] radeon: irq initialized.
[    3.103404] [drm] Detected VRAM RAM=128M, BAR=128M
[    3.108214] [drm] RAM width 128bits DDR
[    3.112263] [TTM] Zone  kernel: Available graphics memory: 496682 kiB
[    3.118732] [TTM] Initializing pool allocator
[    3.123346] [drm] radeon: 128M of VRAM memory ready
[    3.128256] [drm] radeon: 256M of GTT memory ready.
[    3.133295] [drm] radeon: ib pool ready.
[    3.137708] [drm] radeon: 1 quad pipes, 1 Z pipes initialized.
[    3.144018] radeon 0000:f0:10.0: WB disabled
[    3.148326] [drm] fence driver on ring 0 use gpu addr 0x00000000 and 
cpu addr 0xd000000000066000
[    3.157474] [drm] Loading R300 Microcode
[    3.162480] [drm] radeon: ring at 0x0000000000001000
[    3.167569] [drm] ring test succeeded in 0 usecs
cpu 0x0: Vector: 200 (Machine Check) at [c000000000d63aa0]
     pc: c0000000000cc07c: .trace_hardirqs_on_caller+0x6c/0x190
     lr: c0000000000152f4: .cpu_idle+0x1a4/0x220
     sp: c000000000d63d20
    msr: 9000000000009032
   current = 0xc000000000c4db30
   paca    = 0xc00000000ffff000   softe: 0        irq_happened: 0x01
     pid   = 0, comm = swapper/0
enter ? for help
[c000000000d63db0] c0000000000152f4 .cpu_idle+0x1a4/0x220
[c000000000d63e50] c000000000008fb8 .rest_init+0xe8/0x110
[c000000000d63ee0] c000000000ba2998 .start_kernel+0x3e4/0x408
[c000000000d63f90] c000000000007558 .start_here_common+0x20/0x48
0:mon> x
[  843.783295] Oops: Machine check, sig: 7 [#1]
[  843.787589] SMP NR_CPUS=4 Maple
[  843.790768] Modules linked in:
[  843.793855] NIP: c0000000000cc07c LR: c0000000000152f4 CTR: 
c000000000023eac
[  843.800920] REGS: c000000000d63aa0 TRAP: 0200   Not tainted  (3.4.0+)
[  843.807376] MSR: 9000000000009032 <SF,HV,EE,ME,IR,DR,RI>  CR: 
24222222  XER: 00000006
[  843.815412] SOFTE: 0
[  843.817607] TASK = c000000000c4db30[0] 'swapper/0' THREAD: 
c000000000d60000 CPU: 0
[  843.825035] GPR00: 0000000000000000 c000000000d63d20 c000000000d63280 
c0000000000152f4
[  843.833169] GPR04: 0000000000000000 c000000000099d10 0000000000000001 
0000000000000002
[  843.841302] GPR08: 0100000000000000 c000000000e828e8 0140000000000000 
0000000000000000
[  843.849436] GPR12: 0000000044222282 c00000000ffff000 0000000000000000 
0000000000000000
[  843.857570] GPR16: 0000000000ff8750 0000000000cdc890 00000000010001e0 
0000000000000000
[  843.865702] GPR20: 0000000000000000 0000000000000000 000000001dcd6500 
0000000000000000
[  843.873835] GPR24: 0000000000000000 0000000000ec7b00 9000000000009032 
c000000000d7b178
[  843.881979] GPR28: c000000000d7b278 0000000000000008 c000000000c970f8 
c0000000000152f4
[  843.890314] NIP [c0000000000cc07c] .trace_hardirqs_on_caller+0x6c/0x190
[  843.896942] LR [c0000000000152f4] .cpu_idle+0x1a4/0x220
[  843.902181] Call Trace:
[  843.904640] [c000000000d63d20] [c000000000d63db0] 
init_thread_union+0x3db0/0x4000 (unreliable)
[  843.913317] [c000000000d63db0] [c0000000000152f4] .cpu_idle+0x1a4/0x220
[  843.919964] [c000000000d63e50] [c000000000008fb8] .rest_init+0xe8/0x110
[  843.926615] [c000000000d63ee0] [c000000000ba2998] 
.start_kernel+0x3e4/0x408
[  843.933611] [c000000000d63f90] [c000000000007558] 
.start_here_common+0x20/0x48
[  843.940866] Instruction dump:
[  843.943868] 40de00a4 e92d01c8 800908e8 2f800000 40de0094 e93e8098 
80090000 2f800000
[  843.951829] 409e0030 880d01f2 2fa00000 40de00b0 <e93e84e8> 88090000 
2f800000 40de00c8


Looking for any suggestions on this.

[PATCH] powerpc/p1010rdb: add EEPROMs to device tree

Gustavo Zacarias — 2012-05-23T14:35:18

Add EEPROM to the P1010RDB device tree.
The 24c01 acts as a memory SPD so it shouldn't be overwritten without
care.
The 24c256 is a general purpose memory.

Signed-off-by: Gustavo Zacarias <gustavo< at >zacarias.com.ar>
---
 arch/powerpc/boot/dts/p1010rdb.dtsi |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 4977614..ec7c27a 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
< at >< at > -126,12 +126,24 < at >< at >
 
 &board_soc {
 i2c< at >3000 {
+eeprom< at >50 {
+compatible = "st,24c256";
+reg = <0x50>;
+};
+
 rtc< at >68 {
 compatible = "pericom,pt7c4338";
 reg = <0x68>;
 };
 };
 
+i2c< at >3100 {
+eeprom< at >52 {
+compatible = "atmel,24c01";
+reg = <0x52>;
+};
+};
+
 spi< at >7000 {
 flash< at >0 {
 #address-cells = <1>;

[PATCH] powerpc: tracing: Avoid tracepoint duplication with DECLARE_EVENT_CLASS

Anton Blanchard — 2012-05-23T04:47:48

irq_entry, irq_exit, timer_interrupt_entry and timer_interrupt_exit
all do the same thing so use DECLARE_EVENT_CLASS to avoid duplicating
everything 4 times.

This saves quite a lot of space in both instruction text and data:

   text    data     bss     dec     hex filename
   9265   19622      16   28903    70e7 arch/powerpc/kernel/irq.o
   6817   19019      16   25852    64fc arch/powerpc/kernel/irq.o

Signed-off-by: Anton Blanchard <anton< at >samba.org>
---

Index: linux-build/arch/powerpc/include/asm/trace.h
===================================================================
--- linux-build.orig/arch/powerpc/include/asm/trace.h2012-05-23 13:30:51.235534219 +1000
+++ linux-build/arch/powerpc/include/asm/trace.h2012-05-23 14:10:44.406639628 +1000
< at >< at > -8,7 +8,7 < at >< at >
 
 struct pt_regs;
 
-TRACE_EVENT(irq_entry,
+DECLARE_EVENT_CLASS(ppc64_interrupt_class,
 
 TP_PROTO(struct pt_regs *regs),
 
< at >< at > -25,55 +25,32 < at >< at > TRACE_EVENT(irq_entry,
 TP_printk("pt_regs=%p", __entry->regs)
 );
 
-TRACE_EVENT(irq_exit,
+DEFINE_EVENT(ppc64_interrupt_class, irq_entry,
 
 TP_PROTO(struct pt_regs *regs),
 
-TP_ARGS(regs),
-
-TP_STRUCT__entry(
-__field(struct pt_regs *, regs)
-),
-
-TP_fast_assign(
-__entry->regs = regs;
-),
-
-TP_printk("pt_regs=%p", __entry->regs)
+TP_ARGS(regs)
 );
 
-TRACE_EVENT(timer_interrupt_entry,
+DEFINE_EVENT(ppc64_interrupt_class, irq_exit,
 
 TP_PROTO(struct pt_regs *regs),
 
-TP_ARGS(regs),
-
-TP_STRUCT__entry(
-__field(struct pt_regs *, regs)
-),
-
-TP_fast_assign(
-__entry->regs = regs;
-),
-
-TP_printk("pt_regs=%p", __entry->regs)
+TP_ARGS(regs)
 );
 
-TRACE_EVENT(timer_interrupt_exit,
+DEFINE_EVENT(ppc64_interrupt_class, timer_interrupt_entry,
 
 TP_PROTO(struct pt_regs *regs),
 
-TP_ARGS(regs),
+TP_ARGS(regs)
+);
 
-TP_STRUCT__entry(
-__field(struct pt_regs *, regs)
-),
+DEFINE_EVENT(ppc64_interrupt_class, timer_interrupt_exit,
 
-TP_fast_assign(
-__entry->regs = regs;
-),
+TP_PROTO(struct pt_regs *regs),
 
-TP_printk("pt_regs=%p", __entry->regs)
+TP_ARGS(regs)
 );
 
 #ifdef CONFIG_PPC_PSERIES

[PATCH] powerpc: Enable jump label support

Anton Blanchard — 2012-05-23T03:58:41

When looking through some instruction traces I noticed our tracepoint
checks were inline. It turns out we don't have CONFIG_JUMP_LABEL
enabled.

By enabling CONFIG_JUMP_LABEL we replace a load/compare/branch with
a nop at every tracepoint call. For example in do_IRQ:

CONFIG_JUMP_LABEL disabled:
        stdx 3,11,9
        lwz 0,8(29)
        cmpwi 7,0,0
        bne- 7,.L124
        bl .irq_enter

CONFIG_JUMP_LABEL enabled:
        stdx 3,11,9     
        nop
        bl .irq_enter  

Signed-off-by: Anton Blanchard <anton< at >samba.org>
---

Index: linux-build/arch/powerpc/configs/ppc64_defconfig
===================================================================
--- linux-build.orig/arch/powerpc/configs/ppc64_defconfig2012-04-05 13:47:45.691857096 +1000
+++ linux-build/arch/powerpc/configs/ppc64_defconfig2012-05-23 13:14:04.254270594 +1000
< at >< at > -16,6 +16,7 < at >< at > CONFIG_BLK_DEV_INITRD=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=y
 CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
Index: linux-build/arch/powerpc/configs/pseries_defconfig
===================================================================
--- linux-build.orig/arch/powerpc/configs/pseries_defconfig2012-04-05 13:47:45.691857096 +1000
+++ linux-build/arch/powerpc/configs/pseries_defconfig2012-05-23 13:14:59.783222304 +1000
< at >< at > -24,6 +24,7 < at >< at > CONFIG_BLK_DEV_INITRD=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=y
 CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y

powerc tree maintainership status

Benjamin Herrenschmidt — 2012-05-23T03:43:27

Hi Folks !

I'm going to be getting some surgery next week. In the good case, I
should be officially back to work 2 weeks later, but I might end
up being unavailable for longer.

So while I'm away, Michael Ellerman and Paul Mackerras are going to take
care of the powerpc tree. I'll make sure Paul and I sign Michael's PGP
key before I leave.

Cheers,
Ben.

Handling spin table in kdump

Suzuki K. Poulose — 2012-05-22T12:42:10

Hi

I came across the following issue while testing Kdump on an SMP 
board(Currituck) running a non-SMP kernel. Even though the kernel is UP,
the device-tree has the nodes for second CPU and the related details.


The kexec tool adds the spin table area as a reserved section in the 
device tree for the dump capture kernel. This value is read from the 
'cpu-release-addr'.

But now, if the spin table is not located within the 'Reserved region' 
for the crash kernel, the dump capture kernel would fail to boot, 
hitting a BUG in mm/bootmem.c as in [1].

This is because we try to reserve a region which is not available to the 
kernel.

So I am wondering how is this handled really on an SMP board (Fsl_bookE).

There are two possible solutions :
1) Do not reserve the regions for the spin-table, as we will use
only the crashing CPU in the second kernel(maxcpus=1).


2) Add the spin-table region to the available memory regions passed
to the kernel by kexec-tools.

I have tested (1) and it works fine for me. Yet to test (2).


Thoughts ?


Thanks
Suzuki



[1] Kernel Bug
----------------


Linux version 3.3.0-rc5 (root< at >suzukikp.in.ibm.com) (gcc version 4.3.4 
[gcc-4_3-branch revision 152973] (GCC) ) #12 Tue May 22 18:03:01 IST2
Found legacy serial port 0 for /plb/opb/serial< at >10000000
   mem=20010000000, taddr=20010000000, irq=0, clk=1851851, speed=115200
------------[ cut here ]------------
kernel BUG at mm/bootmem.c:351!
Vector: 700 (Program Check) at [c8a61e90]
     pc: c847f91c: mark_bootmem+0xa0/0x14c
     lr: c8472670: do_init_bootmem+0x1ac/0x218
     sp: c8a61f40
    msr: 21000
   current = 0xc8a4a500
     pid   = 0, comm = swapper
kernel BUG at mm/bootmem.c:351!
enter ? for help
[c8a61f70] c8472670 do_init_bootmem+0x1ac/0x218
[c8a61f90] c847025c setup_arch+0x1bc/0x234
[c8a61fb0] c846b62c start_kernel+0x98/0x358
[c8a61ff0] c80000b4 _start+0xb4/0xf8

powerpc -next rebase WARNING

Benjamin Herrenschmidt — 2012-05-22T01:51:13

Folks, bad news ... my fault.

I accidentally forgot a --signoff on a git am command last week, meaning
that a pair of patches are in -next and not signed off by me.

For various (legal) reasons that cannot go into Linus tree as-is, so I
have to rebase the tree to fix it.

Sorry about that ...

Cheers,
Ben.

[PATCH] powerpc: fix irq distribution

Kim Phillips — 2012-05-18T01:11:45

setting CONFIG_IRQ_ALL_CPUS distributes IRQs to CPUs only when
the number of online CPUs equals NR_CPUS.  See commit
280ff97494e0fef4124bee5c52e39b23a18dd283 "sparc64: fix and
optimize irq distribution" for more details.

Using the online mask fixes IRQ-to-CPU distribution on systems
that boot with less than NR_CPUS.

Signed-off-by: Kim Phillips <kim.phillips< at >freescale.com>
---
 arch/powerpc/kernel/irq.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 2a599ce..c05fd53 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
< at >< at > -891,7 +891,7 < at >< at > int irq_choose_cpu(const struct cpumask *mask)
 {
 int cpuid;
 
-if (cpumask_equal(mask, cpu_all_mask)) {
+if (cpumask_equal(mask, cpu_online_mask)) {
 static int irq_rover;
 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
 unsigned long flags;

[PATCH] mtd: Fix typo in Kconfig

Frank Svendsboe — 2012-05-17T20:43:09

MTD_OF_PARTS and the default setting is not working due to using 'Y'
instead of 'y', introduced in commit
d6137badeff1ef64b4e0092ec249ebdeaeb3ff37. This made our board, and
possibly other boards using DTS defined partitions and not having
CONFIG_MTD_OF_PARTS=y defined in the defconfig, fail to mount root
after v3.1.

Signed-off-by: Frank Svendsboe <frank.svendsboe< at >gmail.com>
---
 drivers/mtd/Kconfig |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 5760c1a..27143e0 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
< at >< at > -128,7 +128,7 < at >< at > config MTD_AFS_PARTS
 
 config MTD_OF_PARTS
 tristate "OpenFirmware partitioning information support"
-default Y
+default y
 depends on OF
 help
   This provides a partition parsing function which derives

ppc/sata-fsl: orphan config value: CONFIG_MPC8315_DS

Anthony Foiani — 2012-05-17T17:08:18

Greetings.

I was occasionally running into problems at boot time on an
MPC8315-based board (derived from the MPC831xRDB, apparently), using
SATA to talk to an SSD.  My vendor suggested that I enable
CONFIG_MPC8315_DS.

That symbol is only found once in the entire kernel codebase:

  $ git checkout v3.4-rc7
  HEAD is now at 36be505... Linux 3.4-rc7

  $ git grep -nH CONFIG_MPC8315_DS
  drivers/ata/sata_fsl.c:729:#ifdef CONFIG_MPC8315_DS

There is no kconfig support for it at all.

It was added in 2007; further, this is the only commit in the entire
git history that contains this string:

   commit e7eac96e8f0e57a6e9f94943557bc2b23be31471
   Author: ashish kalra <ashish.kalra< at >freescale.com>
   Date:   Wed Oct 31 19:28:02 2007 +0800

       ata/sata_fsl: Move MPC8315DS link speed limit workaround to specific ifdef
       
       Signed-off-by: ashish kalra <ashish.kalra< at >freescale.com>
       Signed-off-by: Li Yang <leoli< at >freescale.com>
       Signed-off-by: Jeff Garzik <jeff< at >garzik.org>

   diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
   index 5892472..e076e1f 100644
   --- a/drivers/ata/sata_fsl.c
   +++ b/drivers/ata/sata_fsl.c
   < at >< at > -652,6 +652,7 < at >< at > static int sata_fsl_port_start(struct ata_port *ap)
           VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL));
           VPRINTK("CHBA  = 0x%x\n", ioread32(hcr_base + CHBA));
    
   +#ifdef CONFIG_MPC8315_DS
           /*
            * Workaround for 8315DS board 3gbps link-up issue,
            * currently limit SATA port to GEN1 speed
   < at >< at > -664,6 +665,7 < at >< at > static int sata_fsl_port_start(struct ata_port *ap)
           sata_fsl_scr_read(ap, SCR_CONTROL, &temp);
           dev_printk(KERN_WARNING, dev, "scr_control, speed limited to %x\n",
                           temp);
   +#endif
    
           return 0;
    }

This otherwise-unsupported variable was noted by Robert Day in 2008;
Adrian Bunk suggested a patch, but the Freescale folks said that it
was for a not-yet-mainlined board, so the patch was dropped:

   http://marc.info/?l=linux-ide&m=121783965216004&w=2

As Robert notied again in 2010, it still wasn't mainlined:

   http://marc.info/?l=linux-ide&m=121783965216004&w=2

And, obviously, it still isn't today.

Can the Freescale people tell us exactly what we should be testing to
determine when to enforce this restriction?  A config variable that
points to a non-existent board doesn't seem much help.

Thanks,
Tony

linux-next: manual merge of the crypto tree with the powerpc tree

Stephen Rothwell — 2012-05-17T03:21:16

Hi Herbert,

Today's linux-next merge of the crypto tree got a conflict in
drivers/crypto/Kconfig between commit aef7b31c8833 ("powerpc/crypto:
Build files for the nx device driver") from the powerpc tree and commit
2789c08fffea ("crypto: ux500 - Add driver for CRYP hardware") from the
crypto tree.

Just context changes.  I fixed it up (see below) and can carry the fix as
necessary.

[PATCH] pseries/iommu: remove default window before attempting DDW manipulation

Nishanth Aravamudan — 2012-05-15T17:04:32

An upcoming release of firmware will add DDW extensions, in particular
an API to "reset" the DMA window to the original configuration (32-bit,
2GB in size). With that API available, we can safely remove the default
window, increasing the resources available to firmware for creation of
larger windows for the slot in question -- if we encounter an error, we
can use the new API to reset the state of the slot.

Further, this same release of firmware will make it a hard requirement
for OSes to release the existing window before any other windows will be
shown as available, to avoid conflicts in addressing between the two
windows.

In anticipation of these changes, always remove the default window
before we do any DDW manipulations.

Signed-off-by: Nishanth Aravamudan <nacc< at >us.ibm.com>

diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 0915b1a..526076b 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
< at >< at > -707,6 +707,21 < at >< at > static int __init disable_ddw_setup(char *str)
 
 early_param("disable_ddw", disable_ddw_setup);
 
+static inline void __remove_ddw(struct device_node *np, const u32 *ddw_avail, u64 liobn)
+{
+int ret;
+
+ret = rtas_call(ddw_avail[2], 1, 1, NULL, liobn);
+if (ret)
+pr_warning("%s: failed to remove DMA window: rtas returned "
+"%d to ibm,remove-pe-dma-window(%x) %llx\n",
+np->full_name, ret, ddw_avail[2], liobn);
+else
+pr_debug("%s: successfully removed DMA window: rtas returned "
+"%d to ibm,remove-pe-dma-window(%x) %llx\n",
+np->full_name, ret, ddw_avail[2], liobn);
+}
+
 static void remove_ddw(struct device_node *np)
 {
 struct dynamic_dma_window_prop *dwp;
< at >< at > -736,15 +751,7 < at >< at > static void remove_ddw(struct device_node *np)
 pr_debug("%s successfully cleared tces in window.\n",
  np->full_name);
 
-ret = rtas_call(ddw_avail[2], 1, 1, NULL, liobn);
-if (ret)
-pr_warning("%s: failed to remove direct window: rtas returned "
-"%d to ibm,remove-pe-dma-window(%x) %llx\n",
-np->full_name, ret, ddw_avail[2], liobn);
-else
-pr_debug("%s: successfully removed direct window: rtas returned "
-"%d to ibm,remove-pe-dma-window(%x) %llx\n",
-np->full_name, ret, ddw_avail[2], liobn);
+__remove_ddw(np, ddw_avail, liobn);
 
 delprop:
 ret = prom_remove_property(np, win64);
< at >< at > -869,6 +876,35 < at >< at > static int create_ddw(struct pci_dev *dev, const u32 *ddw_avail,
 return ret;
 }
 
+static void restore_default_window(struct pci_dev *dev,
+u32 ddw_restore_token, unsigned long liobn)
+{
+struct eeh_dev *edev;
+u32 cfg_addr;
+u64 buid;
+int ret;
+
+/*
+ * Get the config address and phb buid of the PE window.
+ * Rely on eeh to retrieve this for us.
+ * Retrieve them from the pci device, not the node with the
+ * dma-window property
+ */
+edev = pci_dev_to_eeh_dev(dev);
+cfg_addr = edev->config_addr;
+if (edev->pe_config_addr)
+cfg_addr = edev->pe_config_addr;
+buid = edev->phb->buid;
+
+do {
+ret = rtas_call(ddw_restore_token, 3, 1, NULL, cfg_addr,
+BUID_HI(buid), BUID_LO(buid));
+} while (rtas_busy_delay(ret));
+dev_info(&dev->dev,
+"ibm,reset-pe-dma-windows(%x) %x %x %x returned %d\n",
+ ddw_restore_token, cfg_addr, BUID_HI(buid), BUID_LO(buid), ret);
+}
+
 /*
  * If the PE supports dynamic dma windows, and there is space for a table
  * that can map all pages in a linear offset, then setup such a table,
< at >< at > -889,9 +925,13 < at >< at > static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
 u64 dma_addr, max_addr;
 struct device_node *dn;
 const u32 *uninitialized_var(ddw_avail);
+const u32 *uninitialized_var(ddw_extensions);
+u32 ddw_restore_token = 0;
 struct direct_window *window;
 struct property *win64;
 struct dynamic_dma_window_prop *ddwprop;
+const void *dma_window = NULL;
+unsigned long liobn, offset, size;
 
 mutex_lock(&direct_window_init_mutex);
 
< at >< at > -911,7 +951,40 < at >< at > static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
 if (!ddw_avail || len < 3 * sizeof(u32))
 goto out_unlock;
 
-       /*
+/*
+ * the extensions property is only required to exist in certain
+ * levels of firmware and later
+ * the ibm,ddw-extensions property is a list with the first
+ * element containing the number of extensions and each
+ * subsequent entry is a value corresponding to that extension
+ */
+ddw_extensions = of_get_property(pdn, "ibm,ddw-extensions", &len);
+if (ddw_extensions) {
+/*
+ * each new defined extension length should be added to
+ * the top of the switch so the "earlier" entries also
+ * get picked up
+ */
+switch (ddw_extensions[0]) {
+/* ibm,reset-pe-dma-windows */
+case 1:
+ddw_restore_token = ddw_extensions[1];
+break;
+}
+}
+
+/*
+ * Only remove the existing DMA window if we can restore back to
+ * the default state. Removing the existing window maximizes the
+ * resources available to firmware for dynamic window creation.
+ */
+if (ddw_restore_token) {
+dma_window = of_get_property(pdn, "ibm,dma-window", NULL);
+of_parse_dma_window(pdn, dma_window, &liobn, &offset, &size);
+__remove_ddw(pdn, ddw_avail, liobn);
+}
+
+/*
  * Query if there is a second window of size to map the
  * whole partition.  Query returns number of windows, largest
  * block assigned to PE (partition endpoint), and two bitmasks
< at >< at > -920,7 +993,7 < at >< at > static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
 dn = pci_device_to_OF_node(dev);
 ret = query_ddw(dev, ddw_avail, &query);
 if (ret != 0)
-goto out_unlock;
+goto out_restore_window;
 
 if (query.windows_available == 0) {
 /*
< at >< at > -929,7 +1002,7 < at >< at > static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
  * trading in for a larger page size.
  */
 dev_dbg(&dev->dev, "no free dynamic windows");
-goto out_unlock;
+goto out_restore_window;
 }
 if (query.page_size & 4) {
 page_shift = 24; /* 16MB */
< at >< at > -940,7 +1013,7 < at >< at > static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
 } else {
 dev_dbg(&dev->dev, "no supported direct page size in mask %x",
   query.page_size);
-goto out_unlock;
+goto out_restore_window;
 }
 /* verify the window * number of ptes will map the partition */
 /* check largest block * page size > max memory hotplug addr */
< at >< at > -949,14 +1022,14 < at >< at > static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
 dev_dbg(&dev->dev, "can't map partiton max 0x%llx with %u "
   "%llu-sized pages\n", max_addr,  query.largest_available_block,
   1ULL << page_shift);
-goto out_unlock;
+goto out_restore_window;
 }
 len = order_base_2(max_addr);
 win64 = kzalloc(sizeof(struct property), GFP_KERNEL);
 if (!win64) {
 dev_info(&dev->dev,
 "couldn't allocate property for 64bit dma window\n");
-goto out_unlock;
+goto out_restore_window;
 }
 win64->name = kstrdup(DIRECT64_PROPNAME, GFP_KERNEL);
 win64->value = ddwprop = kmalloc(sizeof(*ddwprop), GFP_KERNEL);
< at >< at > -1018,6 +1091,10 < at >< at > out_free_prop:
 kfree(win64->value);
 kfree(win64);
 
+out_restore_window:
+if (ddw_restore_token)
+restore_default_window(dev, ddw_restore_token, liobn);
+
 out_unlock:
 mutex_unlock(&direct_window_init_mutex);
 return dma_addr;

Fixing a cputhread code documentation

Anshuman Khandual — 2012-05-14T15:32:00

diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h
index ce516e5..ac3eedb 100644
--- a/arch/powerpc/include/asm/cputhreads.h
+++ b/arch/powerpc/include/asm/cputhreads.h
< at >< at > -9,7 +9,7 < at >< at >
  * Note: This implementation is limited to a power of 2 number of
  * threads per core and the same number for each core in the system
  * (though it would work if some processors had less threads as long
- * as the CPU numbers are still allocated, just not brought offline).
+ * as the CPU numbers are still allocated, just not brought online).
  *
  * However, the API allows for a different implementation in the future
  * if needed, as long as you only use the functions and not the variables

--
Anshuman Khandual

[PATCH v5 1/5] powerpc/85xx: implement hardware timebase sync

Zhao Chenhui — 2012-05-11T11:53:51

Do hardware timebase sync. Firstly, stop all timebases, and transfer
the timebase value of the boot core to the other core. Finally,
start all timebases.

Only apply to dual-core chips, such as MPC8572, P2020, etc.

Signed-off-by: Zhao Chenhui <chenhui.zhao< at >freescale.com>
Signed-off-by: Li Yang <leoli< at >freescale.com>
---
 arch/powerpc/include/asm/fsl_guts.h |    2 +
 arch/powerpc/platforms/85xx/smp.c   |   93 +++++++++++++++++++++++++++++++++--
 2 files changed, 91 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index aa4c488..dd5ba2c 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
< at >< at > -48,6 +48,8 < at >< at > struct ccsr_guts {
         __be32  dmuxcr;/* 0x.0068 - DMA Mux Control Register */
         u8res06c[0x70 - 0x6c];
 __be32devdisr;/* 0x.0070 - Device Disable Control */
+#define CCSR_GUTS_DEVDISR_TB10x00001000
+#define CCSR_GUTS_DEVDISR_TB00x00004000
 __be32devdisr2;/* 0x.0074 - Device Disable Control 2 */
 u8res078[0x7c - 0x78];
 __be32  pmjcr;/* 0x.007c - 4 Power Management Jog Control Register */
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index ff42490..6862dda 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
< at >< at > -24,6 +24,7 < at >< at >
 #include <asm/mpic.h>
 #include <asm/cacheflush.h>
 #include <asm/dbell.h>
+#include <asm/fsl_guts.h>
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/mpic.h>
< at >< at > -115,13 +116,70 < at >< at > smp_85xx_kick_cpu(int nr)
 
 struct smp_ops_t smp_85xx_ops = {
 .kick_cpu = smp_85xx_kick_cpu,
-#ifdef CONFIG_KEXEC
-.give_timebase= smp_generic_give_timebase,
-.take_timebase= smp_generic_take_timebase,
-#endif
 };
 
 #ifdef CONFIG_KEXEC
+static struct ccsr_guts __iomem *guts;
+static u64 timebase;
+static int tb_req;
+static int tb_valid;
+
+static void mpc85xx_timebase_freeze(int freeze)
+{
+unsigned int mask;
+
+if (!guts)
+return;
+
+mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
+if (freeze)
+setbits32(&guts->devdisr, mask);
+else
+clrbits32(&guts->devdisr, mask);
+
+in_be32(&guts->devdisr);
+}
+
+static void mpc85xx_give_timebase(void)
+{
+unsigned long flags;
+
+local_irq_save(flags);
+
+while (!tb_req)
+barrier();
+tb_req = 0;
+
+mpc85xx_timebase_freeze(1);
+timebase = get_tb();
+mb();
+tb_valid = 1;
+
+while (tb_valid)
+barrier();
+
+mpc85xx_timebase_freeze(0);
+
+local_irq_restore(flags);
+}
+
+static void mpc85xx_take_timebase(void)
+{
+unsigned long flags;
+
+local_irq_save(flags);
+
+tb_req = 1;
+while (!tb_valid)
+barrier();
+
+set_tb(timebase >> 32, timebase & 0xffffffff);
+mb();
+tb_valid = 0;
+
+local_irq_restore(flags);
+}
+
 atomic_t kexec_down_cpus = ATOMIC_INIT(0);
 
 void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary)
< at >< at > -228,6 +286,20 < at >< at > smp_85xx_setup_cpu(int cpu_nr)
 doorbell_setup_this_cpu();
 }
 
+#ifdef CONFIG_KEXEC
+static const struct of_device_id guts_ids[] = {
+{ .compatible = "fsl,mpc8572-guts", },
+{ .compatible = "fsl,mpc8560-guts", },
+{ .compatible = "fsl,mpc8536-guts", },
+{ .compatible = "fsl,p1020-guts", },
+{ .compatible = "fsl,p1021-guts", },
+{ .compatible = "fsl,p1022-guts", },
+{ .compatible = "fsl,p1023-guts", },
+{ .compatible = "fsl,p2020-guts", },
+{},
+};
+#endif
+
 void __init mpc85xx_smp_init(void)
 {
 struct device_node *np;
< at >< at > -249,6 +321,19 < at >< at > void __init mpc85xx_smp_init(void)
 smp_85xx_ops.cause_ipi = doorbell_cause_ipi;
 }
 
+#ifdef CONFIG_KEXEC
+np = of_find_matching_node(NULL, guts_ids);
+if (np) {
+guts = of_iomap(np, 0);
+smp_85xx_ops.give_timebase = mpc85xx_give_timebase;
+smp_85xx_ops.take_timebase = mpc85xx_take_timebase;
+of_node_put(np);
+} else {
+smp_85xx_ops.give_timebase = smp_generic_give_timebase;
+smp_85xx_ops.take_timebase = smp_generic_take_timebase;
+}
+#endif
+
 smp_ops = &smp_85xx_ops;
 
 #ifdef CONFIG_KEXEC

[Patch][hw-breakpoint] Use generic hw-breakpoint interfaces for new PPC ptrace flags

K.Prasad — 2012-05-11T08:43:38

Hi Ben,
Please find a patch that introduces generic hw-breakpoint
interfaces for a couple of ptrace flags used by server-class processors.

This patch has been reviewed by the community and acked-by David Gibson
last year
(http://thread.gmane.org/gmane.linux.ports.ppc.embedded/47473/focus=47760)
but did not get submitted to you for inclusion (the patch
applies to the latest linux-2.6 tree, with a few line adjustments).
While originally a patchset of two, I'm submitting only the first (and
independent) patch due to disagreements over the 2/2 patch.

Kindly consider this patch for inclusion into the relevant PowerPC tree.

Thanks,
K.Prasad

------

PPC_PTRACE_GETHWDBGINFO, PPC_PTRACE_SETHWDEBUG and PPC_PTRACE_DELHWDEBUG are
PowerPC specific ptrace flags that use the watchpoint register. While they are
targeted primarily towards BookE users, user-space applications such as GDB
have started using them for BookS too. This patch enables the use of generic
hardware breakpoint interfaces for these new flags.

Apart from the usual benefits of using generic hw-breakpoint interfaces, these
changes allow debuggers (such as GDB) to use a common set of ptrace flags for
their watchpoint needs and allow more precise breakpoint specification (length
of the variable can be specified).

Signed-off-by: K.Prasad <prasad< at >linux.vnet.ibm.com>
Acked-by: David Gibson <david< at >gibson.dropbear.id.au>
---
 Documentation/powerpc/ptrace.txt |   16 ++++++++
 arch/powerpc/kernel/ptrace.c     |   77 +++++++++++++++++++++++++++++++++++---
 2 files changed, 87 insertions(+), 6 deletions(-)

diff --git a/Documentation/powerpc/ptrace.txt b/Documentation/powerpc/ptrace.txt
index f4a5499..f2a7a39 100644
--- a/Documentation/powerpc/ptrace.txt
+++ b/Documentation/powerpc/ptrace.txt
< at >< at > -127,6 +127,22 < at >< at > Some examples of using the structure to:
   p.addr2           = (uint64_t) end_range;
   p.condition_value = 0;
 
+- set a watchpoint in server processors (BookS)
+
+  p.version         = 1;
+  p.trigger_type    = PPC_BREAKPOINT_TRIGGER_RW;
+  p.addr_mode       = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE;
+  or
+  p.addr_mode       = PPC_BREAKPOINT_MODE_EXACT;
+
+  p.condition_mode  = PPC_BREAKPOINT_CONDITION_NONE;
+  p.addr            = (uint64_t) begin_range;
+  /* For PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE addr2 needs to be specified, where
+   * addr2 - addr <= 8 Bytes.
+   */
+  p.addr2           = (uint64_t) end_range;
+  p.condition_value = 0;
+
 3. PTRACE_DELHWDEBUG
 
 Takes an integer which identifies an existing breakpoint or watchpoint
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 05b7dd2..cd41c78 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
< at >< at > -1339,6 +1339,12 < at >< at > static int set_dac_range(struct task_struct *child,
 static long ppc_set_hwdebug(struct task_struct *child,
      struct ppc_hw_breakpoint *bp_info)
 {
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+int ret, len = 0;
+struct thread_struct *thread = &(child->thread);
+struct perf_event *bp;
+struct perf_event_attr attr;
+#endif /* CONFIG_HAVE_HW_BREAKPOINT */
 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
 unsigned long dabr;
 #endif
< at >< at > -1382,13 +1388,9 < at >< at > static long ppc_set_hwdebug(struct task_struct *child,
  */
 if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
     (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
-    bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT ||
     bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
 return -EINVAL;
 
-if (child->thread.dabr)
-return -ENOSPC;
-
 if ((unsigned long)bp_info->addr >= TASK_SIZE)
 return -EIO;
 
< at >< at > -1398,15 +1400,63 < at >< at > static long ppc_set_hwdebug(struct task_struct *child,
 dabr |= DABR_DATA_READ;
 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
 dabr |= DABR_DATA_WRITE;
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+if (ptrace_get_breakpoints(child) < 0)
+return -ESRCH;
 
-child->thread.dabr = dabr;
+/*
+ * Check if the request is for 'range' breakpoints. We can
+ * support it if range < 8 bytes.
+ */
+if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE) {
+len = bp_info->addr2 - bp_info->addr;
+} else if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
+ptrace_put_breakpoints(child);
+return -EINVAL;
+}
+bp = thread->ptrace_bps[0];
+if (bp) {
+ptrace_put_breakpoints(child);
+return -ENOSPC;
+}
+
+/* Create a new breakpoint request if one doesn't exist already */
+hw_breakpoint_init(&attr);
+attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN;
+attr.bp_len = len;
+arch_bp_generic_fields(dabr & (DABR_DATA_WRITE | DABR_DATA_READ),
+&attr.bp_type);
+
+thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
+       ptrace_triggered, NULL, child);
+if (IS_ERR(bp)) {
+thread->ptrace_bps[0] = NULL;
+ptrace_put_breakpoints(child);
+return PTR_ERR(bp);
+}
 
+ptrace_put_breakpoints(child);
+return 1;
+#endif /* CONFIG_HAVE_HW_BREAKPOINT */
+
+if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT)
+return -EINVAL;
+
+if (child->thread.dabr)
+return -ENOSPC;
+
+child->thread.dabr = dabr;
 return 1;
 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
 }
 
 static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
 {
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+int ret = 0;
+struct thread_struct *thread = &(child->thread);
+struct perf_event *bp;
+#endif /* CONFIG_HAVE_HW_BREAKPOINT */
 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 int rc;
 
< at >< at > -1426,10 +1476,25 < at >< at > static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
 #else
 if (data != 1)
 return -EINVAL;
+
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+if (ptrace_get_breakpoints(child) < 0)
+return -ESRCH;
+
+bp = thread->ptrace_bps[0];
+if (bp) {
+unregister_hw_breakpoint(bp);
+thread->ptrace_bps[0] = NULL;
+} else
+ret = -ENOENT;
+ptrace_put_breakpoints(child);
+return ret;
+#else /* CONFIG_HAVE_HW_BREAKPOINT */
 if (child->thread.dabr == 0)
 return -ENOENT;
 
 child->thread.dabr = 0;
+#endif /* CONFIG_HAVE_HW_BREAKPOINT */
 
 return 0;
 #endif
< at >< at > -1560,7 +1625,7 < at >< at > long arch_ptrace(struct task_struct *child, long request,
 dbginfo.data_bp_alignment = 4;
 #endif
 dbginfo.sizeof_condition = 0;
-dbginfo.features = 0;
+dbginfo.features = PPC_DEBUG_FEATURE_DATA_BP_RANGE;
 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
 
 if (!access_ok(VERIFY_WRITE, datavp,

[PATCH 2/2][v2] powerpc/watchdog: replace CONFIG_FSL_BOOKE with CONFIG_PPC_FSL_BOOK3E

Shaohui Xie — 2012-05-11T05:33:40

CONFIG_FSL_BOOKE is only defined in 32-bit, CONFIG_PPC_FSL_BOOK3E is
defined in both 32-bit and 64-bit, so use CONFIG_PPC_FSL_BOOK3E to make
driver work in 32-bit & 64-bit.

Signed-off-by: Shaohui Xie <Shaohui.Xie< at >freescale.com>
---
changes for v2:
use PPC_FSL_BOOK3E instead of FSL_SOC_BOOKE.

 drivers/watchdog/Kconfig     |    8 ++++----
 drivers/watchdog/booke_wdt.c |    4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 3709624..4373ca0 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
< at >< at > -1094,10 +1094,10 < at >< at > config BOOKE_WDT
 config BOOKE_WDT_DEFAULT_TIMEOUT
 int "PowerPC Book-E Watchdog Timer Default Timeout"
 depends on BOOKE_WDT
-default 38 if FSL_BOOKE
-range 0 63 if FSL_BOOKE
-default 3 if !FSL_BOOKE
-range 0 3 if !FSL_BOOKE
+default 38 if PPC_FSL_BOOK3E
+range 0 63 if PPC_FSL_BOOK3E
+default 3 if !PPC_FSL_BOOK3E
+range 0 3 if !PPC_FSL_BOOK3E
 help
   Select the default watchdog timer period to be used by the PowerPC
   Book-E watchdog driver.  A watchdog "event" occurs when the bit
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index ce0ab44..338a437 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
< at >< at > -37,7 +37,7 < at >< at >
 u32 booke_wdt_enabled;
 u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
 
-#ifdefCONFIG_FSL_BOOKE
+#ifdefCONFIG_PPC_FSL_BOOK3E
 #define WDTP(x)((((x)&0x3)<<30)|(((x)&0x3c)<<15))
 #define WDTP_MASK(WDTP(0x3f))
 #else
< at >< at > -190,7 +190,7 < at >< at > static long booke_wdt_ioctl(struct file *file,
 case WDIOC_SETTIMEOUT:
 if (get_user(tmp, p))
 return -EFAULT;
-#ifdefCONFIG_FSL_BOOKE
+#ifdefCONFIG_PPC_FSL_BOOK3E
 /* period of 1 gives the largest possible timeout */
 if (tmp > period_to_sec(1))
 return -EINVAL;

[BUG] powerpc: perf record crash

Sukadev Bhattiprolu — 2012-05-11T00:23:54

I get this crash when I run on 3.4.0-rc5 on a P6.

./perf record -a -d -- ./perf bench sched all

I rebuilt 'perf' locally after building the kernel 3.4.0-rc5.

Sometimes it occurs on the first attempt, sometimes on the second.
Pls let me know if I can provide any other debug info.

----

Red Hat Enterprise Linux Server release 6.2 (Santiago)
Kernel 3.4.0-rc5-mainline on an ppc64

stormy2 login: kernel BUG at arch/powerpc/kernel/irq.c:188!
Oops: Exception in kernel mode, sig: 5 [#1]
SMP NR_CPUS=1024 NUMA pSeries
Modules linked in: ipv6 bnx2 ses enclosure sg ehea ext4 jbd2 mbcache sd_mod crc_t10dif ipr radeon drm_kms_helper ttm drm i2c_algo_bit i2c_core power_supply dm_mirror dm_region_hash dm_log dm_mod [last unloaded: scsi_wait_scan]
NIP: c00000000000ea9c LR: c000000000010548 CTR: 0000000000000000
REGS: c00000006de879f0 TRAP: 0700   Not tainted  (3.4.0-rc5-mainline)
MSR: 8000000000021032 <SF,ME,IR,DR,RI>  CR: 22000088  XER: 00000000
SOFTE: 0
CFAR: 0000000000003318
TASK = c00000006de62d50[0] 'swapper/7' THREAD: c00000006de84000 CPU: 7
GPR00: 0000000000000001 c00000006de87c70 c000000000c47d88 0000000000000500 
GPR04: 000000000bf87ff4 0000000000000000 0000000000000007 000e1cfe2fc642ff 
GPR08: 00000000007e0000 c000000006df1500 0000000000000001 0000000000000000 
GPR12: 0000000042000088 c000000006df1500 c00000006de87f90 0000000006f042c0 
GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 
GPR20: 0000000000000000 0000000000000000 0000000000000000 8000000000009032 
GPR24: c00000006de84000 0000000000000000 c000000000e356d0 c000000000cd0318 
GPR28: c0000000006229b8 c000000000b55f58 c000000000bce190 c000000000ff8eb0 
NIP [c00000000000ea9c] .__check_irq_replay+0x7c/0x90
LR [c000000000010548] .arch_local_irq_restore+0x38/0x90
Call Trace:
[c00000006de87c70] [00000000832e13f4] 0x832e13f4 (unreliable)
[c00000006de87ce0] [c0000000004ca118] .cpuidle_idle_call+0x1f8/0x380
[c00000006de87da0] [c000000000055450] .pSeries_idle+0x10/0x40
[c00000006de87e10] [c000000000017ce8] .cpu_idle+0x178/0x290
[c00000006de87ed0] [c0000000006081f0] .start_secondary+0x350/0x35c
[c00000006de87f90] [c00000000000936c] .start_secondary_prolog+0x10/0x14
Instruction dump:
4e800020 7da96b78 8809022b 794bf7e3 38600500 5400e87e 5400183e 9809022b 
4082ffdc 880d022b 7c0000d0 78000fe0 <0b000000> 38600000 4bffffc4 60000000 
---[ end trace 39f49db612f9ab0f ]---

Kernel panic - not syncing: Attempted to kill the idle task!
panic occurred, switching back to text console
Dumping ftrace buffer:
   (ftrace buffer empty)
Current pid: 6199 comm: perf / Idle pid: 0 comm: swapper/7
------------[ cut here ]------------
WARNING: at kernel/rcutree.c:465
Modules linked in: ipv6 bnx2 ses enclosure sg ehea ext4 jbd2 mbcache sd_mod crc_t10dif ipr radeon drm_kms_helper ttm drm i2c_algo_bit i2c_core power_supply dm_mirror dm_region_hash dm_log dm_mod [last unloaded: scsi_wait_scan]
NIP: c000000000110aa0 LR: c000000000110a9c CTR: c000000000060f40
REGS: c000000068b96e00 TRAP: 0700   Tainted: G      D       (3.4.0-rc5-mainline)
MSR: 8000000000021032 <SF,ME,IR,DR,RI>  CR: 28022482  XER: 0000000a
SOFTE: 0
CFAR: c000000000602cc4
TASK = c000000059620090[6199] 'perf' THREAD: c000000068b94000 CPU: 7
GPR00: c000000000110a9c c000000068b97080 c000000000c47d88 000000000000003d 
GPR04: 0000000000000000 0000000000000000 0000000000000000 800000000b2a3d80 
GPR08: 0000000000000000 c000000000804208 000000000002ef30 00000000007e0000 
GPR12: 0000000024022488 c000000006df1500 c000000069c8db00 c000000000815b80 
GPR16: c000000000815b80 0000000000000000 c000000068b97750 c000000000caed60 
GPR20: c000000068b94080 0000000000000001 0000000000000000 0000000000000004 
GPR24: c000000000815b80 c000000000cacad8 c000000068b94000 0000000000000000 
GPR28: c0000000008155f0 c00000006de62d50 c000000000bd5c40 c000000000b88053 
NIP [c000000000110aa0] .rcu_idle_exit_common+0xc0/0x100
LR [c000000000110a9c] .rcu_idle_exit_common+0xbc/0x100
Call Trace:
[c000000068b97080] [c000000000110a9c] .rcu_idle_exit_common+0xbc/0x100 (unreliable)
[c000000068b97110] [c000000000110b98] .rcu_irq_enter+0xb8/0xe0
[c000000068b97190] [c00000000007b5ec] .irq_enter+0x1c/0xc0
[c000000068b97220] [c000000000010024] .do_IRQ+0x64/0x2e0
[c000000068b972e0] [c0000000000038c0] hardware_interrupt_common+0x140/0x180
--- Exception: 501 at .arch_local_irq_restore+0x74/0x90
    LR = .arch_local_irq_restore+0x74/0x90
[c000000068b975d0] [c0000000000b35e8] .update_rq_clock+0x48/0x80 (unreliable)
[c000000068b97640] [c0000000000b319c] .finish_task_switch+0x7c/0x150
[c000000068b976e0] [c0000000005f62b0] .__schedule+0x2f0/0x6e0
[c000000068b97960] [c0000000001d0ac4] .pipe_wait+0x64/0xa0
[c000000068b97a20] [c0000000001d1578] .pipe_read+0x3d8/0x670
[c000000068b97b50] [c0000000001c35a4] .do_sync_read+0xb4/0x140
[c000000068b97ce0] [c0000000001c475c] .vfs_read+0xec/0x1e0
[c000000068b97d80] [c0000000001c4978] .SyS_read+0x58/0xd0
[c000000068b97e30] [c0000000000097dc] syscall_exit+0x0/0x38
Instruction dump:
881f000e 2f800001 41feffbc e92d0200 e8ad0200 e889022e e8dd022e e87e8120 
38a503c8 38fd03c8 484f21fd 60000000 <0fe00000> 38000001 981f000e 4bffff88 
---[ end trace 39f49db612f9ab10 ]---
Current pid: 6199 comm: perf / Idle pid: 0 comm: swapper/7
------------[ cut here ]------------
WARNING: at kernel/rcutree.c:355
Modules linked in: ipv6 bnx2 ses enclosure sg ehea ext4 jbd2 mbcache sd_mod crc_t10dif ipr radeon drm_kms_helper ttm drm i2c_algo_bit i2c_core power_supply dm_mirror dm_region_hash dm_log dm_mod [last unloaded: scsi_wait_scan]
NIP: c000000000110d80 LR: c000000000110d7c CTR: c000000000060f40
REGS: c000000068b96e10 TRAP: 0700   Tainted: G      D W     (3.4.0-rc5-mainline)
MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI>  CR: 28022482  XER: 0000000a
SOFTE: 0
CFAR: c000000000602cc4
TASK = c000000059620090[6199] 'perf' THREAD: c000000068b94000 CPU: 7
GPR00: c000000000110d7c c000000068b97090 c000000000c47d88 000000000000003d 
GPR04: 0000000000000000 0000000000000000 0000000000000000 800000000b2a3d80 
GPR08: 0000000000000000 c000000000804208 00000000000399f0 00000000007e0000 
GPR12: 0000000028022488 c000000006df1500 c000000069c8db00 c000000000815b80 
GPR16: c000000000815b80 0000000000000000 c000000068b97750 c000000000caed60 
GPR20: c000000068b94080 0000000000000001 0000000000000010 c000000068b94100 
GPR24: 0000000000000000 c000000068b94000 c0000000e7fac000 0000000000000000 
GPR28: c00000006de62d50 c000000000b88053 c000000000bd5c40 c000000000fe4bf8 
NIP [c000000000110d80] .rcu_idle_enter_common+0xd0/0x110
LR [c000000000110d7c] .rcu_idle_enter_common+0xcc/0x110
Call Trace:
[c000000068b97090] [c000000000110d7c] .rcu_idle_enter_common+0xcc/0x110 (unreliable)
[c000000068b97120] [c000000000110e74] .rcu_irq_exit+0xb4/0xe0
[c000000068b971a0] [c00000000007b3ec] .irq_exit+0x8c/0xf0
[c000000068b97220] [c000000000010094] .do_IRQ+0xd4/0x2e0
[c000000068b972e0] [c0000000000038c0] hardware_interrupt_common+0x140/0x180
--- Exception: 501 at .arch_local_irq_restore+0x74/0x90
    LR = .arch_local_irq_restore+0x74/0x90
[c000000068b975d0] [c0000000000b35e8] .update_rq_clock+0x48/0x80 (unreliable)
[c000000068b97640] [c0000000000b319c] .finish_task_switch+0x7c/0x150
[c000000068b976e0] [c0000000005f62b0] .__schedule+0x2f0/0x6e0
[c000000068b97960] [c0000000001d0ac4] .pipe_wait+0x64/0xa0
[c000000068b97a20] [c0000000001d1578] .pipe_read+0x3d8/0x670
[c000000068b97b50] [c0000000001c35a4] .do_sync_read+0xb4/0x140
[c000000068b97ce0] [c0000000001c475c] .vfs_read+0xec/0x1e0
[c000000068b97d80] [c0000000001c4978] .SyS_read+0x58/0xd0
[c000000068b97e30] [c0000000000097dc] syscall_exit+0x0/0x38
Instruction dump:
881d0011 2f800001 41feff8c e92d0200 e8ad0200 e889022e e8dc022e e87e8120 
38a503c8 38fc03c8 484f1f1d 60000000 <0fe00000> 38000001 981d0011 4bffff58 
---[ end trace 39f49db612f9ab11 ]---
Rebooting in 10 seconds..

[PATCH][v2] powerpc: Support lower minimum entitlement for virtual processors

Robert Jennings — 2012-05-10T18:55:49

This patch changes the architecture vector to advertise support for a
lower minimum virtual processor entitled capacity.  The default
minimum without this patch is 10%, this patch specifies 1%.

Signed-off-by: Robert Jennings <rcj< at >linux.vnet.ibm.com>
---
Dropped minimum to 1% and tested to ensure that pHYP handled this properly.
---
 arch/powerpc/kernel/prom_init.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index eca626e..46a3c42 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
< at >< at > -689,6 +689,9 < at >< at > static void __init early_cmdline_parse(void)
 #define OV3_VMX0x40/* VMX/Altivec */
 #define OV3_DFP0x20/* decimal FP */
 
+/* Option vector 4: IBM PAPR implementation */
+#define OV4_MIN_ENT_CAP0x01/* minimum VP entitled capacity */
+
 /* Option vector 5: PAPR/OF options supported */
 #define OV5_LPAR0x80/* logical partitioning supported */
 #define OV5_SPLPAR0x40/* shared-processor LPAR supported */
< at >< at > -753,8 +756,9 < at >< at > static unsigned char ibm_architecture_vec[] = {
 OV3_FP | OV3_VMX | OV3_DFP,
 
 /* option vector 4: IBM PAPR implementation */
-2 - 2,/* length */
+3 - 2,/* length */
 0,/* don't halt */
+OV4_MIN_ENT_CAP,/* minimum VP entitled capacity */
 
 /* option vector 5: PAPR/OF options */
 13 - 2,/* length */
< at >< at > -771,7 +775,7 < at >< at > static unsigned char ibm_architecture_vec[] = {
  * must match by the macro below. Update the definition if
  * the structure layout changes.
  */
-#define IBM_ARCH_VEC_NRCORES_OFFSET100
+#define IBM_ARCH_VEC_NRCORES_OFFSET101
 W(NR_CPUS),/* number of cores supported */
 
 /* option vector 6: IBM PAPR hints */