gmane.linux.ide

[git pull] IDE fixes for 2.6.28-rc7

Bartlomiej Zolnierkiewicz — 2008-12-02T20:02:14

* amd74xx host driver fix for nVidia controllers (this should take care of most bugreports about ATAPI devices not working properly) [ libata developers are encouraged to copy the fix to pata_amd (the issue manifests itself with pata_amd reporting diagnostics failure on good devices) ] * quirk for SAMSUNG SP0822N with firmware WA100-10 to allow UDMA > 33 * fix ide_release_lock imbalance for Atari (from Michael Schmitz) + few misc fixes Linus, please pull from: master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6.git/ to receive the following updates: drivers/ide/alim15x3.c | 2 +- drivers/ide/amd74xx.c | 11 ++++++++++- drivers/ide/ide-io.c | 30 ++++++++++++++---------------- drivers/ide/ide-iops.c | 9 +++------ drivers/ide/ide-probe.c | 3 ++- include/linux/ide.h | 8 ++++++++ 6 files changed, 38 insertions(+), 25 deletions(-) Bartlomiej Zolnierkiewicz (5): amd74xx: workaround unreliable AltStatus register for nVidia controllers ide: add SAMSUNG SP0822N with firmware WA100-10 to ivb_list[] ide: respect current DMA setting during resume ide: fix build for DEBUG_PM ide: remove dead code from drive_is_ready() Hannes Eder (1): alim15x3: fix sparse warning Michael Schmitz (1): ide: fix the ide_release_lock imbalance diff --git a/drivers/ide/alim15x3.c b/drivers/ide/alim15x3.c index e56c7b7..45d2356 100644 --- a/drivers/ide/alim15x3.c +++ b/drivers/ide/alim15x3.c < at >< at > -591,7 +591,7 < at >< at > static int __init ali15x3_ide_init(void) static void __exit ali15x3_ide_exit(void) { -return pci_unregister_driver(&alim15x3_pci_driver); +pci_unregister_driver(&alim15x3_pci_driver); } module_init(ali15x3_ide_init); diff --git a/drivers/ide/amd74xx.c b/drivers/ide/amd74xx.c index 81ec731..c6bcd30 100644 --- a/drivers/ide/amd74xx.c +++ b/drivers/ide/amd74xx.c < at >< at > -3,7 +3,7 < at >< at > * IDE driver for Linux. * * Copyright (c) 2000-2002 Vojtech Pavlik - * Copyright (c) 2007 Bartlomiej Zolnierkiewicz + * Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz * * Based on the work of: * Andre Hedrick < at >< at > -263,6 +263,15 < at >< at > static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_ d.udma_mask = ATA_UDMA5; } +/* + * It seems that on some nVidia controllers using AltStatus + * register can be unreliable so default to Status register + * if the device is in Compatibility Mode. + */ +if (dev->vendor == PCI_VENDOR_ID_NVIDIA && + ide_pci_is_in_compatibility_mode(dev)) +d.host_flags |= IDE_HFLAG_BROKEN_ALTSTATUS; + printk(KERN_INFO "%s %s: UDMA%s controller\n", d.name, pci_name(dev), amd_dma[fls(d.udma_mask) - 1]); diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c index 7162d67..7d275b2 100644 --- a/drivers/ide/ide-io.c +++ b/drivers/ide/ide-io.c < at >< at > -132,10 +132,14 < at >< at > int ide_end_request (ide_drive_t *drive, int uptodate, int nr_sectors) } EXPORT_SYMBOL(ide_end_request); -static void ide_complete_power_step(ide_drive_t *drive, struct request *rq, u8 stat, u8 error) +static void ide_complete_power_step(ide_drive_t *drive, struct request *rq) { struct request_pm_state *pm = rq->data; +#ifdef DEBUG_PM +printk(KERN_INFO "%s: complete_power_step(step: %d)\n", +drive->name, pm->pm_step); +#endif if (drive->media != ide_disk) return; < at >< at > -172,7 +176,7 < at >< at > static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request * /* Not supported? Switch to next step now. */ if (ata_id_flush_enabled(drive->id) == 0 || (drive->dev_flags & IDE_DFLAG_WCACHE) == 0) { -ide_complete_power_step(drive, rq, 0, 0); +ide_complete_power_step(drive, rq); return ide_stopped; } if (ata_id_flush_ext_enabled(drive->id)) < at >< at > -191,7 +195,7 < at >< at > static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request * if (drive->media != ide_disk) pm->pm_step = IDE_PM_RESTORE_DMA; else -ide_complete_power_step(drive, rq, 0, 0); +ide_complete_power_step(drive, rq); return ide_stopped; case IDE_PM_IDLE:/* Resume step 2 (idle) */ args->tf.command = ATA_CMD_IDLEIMMEDIATE; < at >< at > -204,10 +208,8 < at >< at > static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request * */ if (drive->hwif->dma_ops == NULL) break; -/* - * TODO: respect IDE_DFLAG_USING_DMA - */ -ide_set_dma(drive); +if (drive->dev_flags & IDE_DFLAG_USING_DMA) +ide_set_dma(drive); break; } < at >< at > -322,11 +324,8 < at >< at > void ide_end_drive_cmd (ide_drive_t *drive, u8 stat, u8 err) } } else if (blk_pm_request(rq)) { struct request_pm_state *pm = rq->data; -#ifdef DEBUG_PM -printk("%s: complete_power_step(step: %d, stat: %x, err: %x)\n", -drive->name, rq->pm->pm_step, stat, err); -#endif -ide_complete_power_step(drive, rq, stat, err); + +ide_complete_power_step(drive, rq); if (pm->pm_step == IDE_PM_COMPLETED) ide_complete_pm_request(drive, rq); return; < at >< at > -804,7 +803,7 < at >< at > static ide_startstop_t start_request (ide_drive_t *drive, struct request *rq) struct request_pm_state *pm = rq->data; #ifdef DEBUG_PM printk("%s: start_power_step(step: %d)\n", -drive->name, rq->pm->pm_step); +drive->name, pm->pm_step); #endif startstop = ide_start_power_step(drive, rq); if (startstop == ide_stopped && < at >< at > -967,14 +966,13 < at >< at > static void ide_do_request (ide_hwgroup_t *hwgroup, int masked_irq) ide_startstop_tstartstop; int loops = 0; -/* for atari only: POSSIBLY BROKEN HERE(?) */ -ide_get_lock(ide_intr, hwgroup); - /* caller must own ide_lock */ BUG_ON(!irqs_disabled()); while (!hwgroup->busy) { hwgroup->busy = 1; +/* for atari only */ +ide_get_lock(ide_intr, hwgroup); drive = choose_drive(hwgroup); if (drive == NULL) { int sleeping = 0; diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c index 5d6ba14..c41c3b9 100644 --- a/drivers/ide/ide-iops.c +++ b/drivers/ide/ide-iops.c < at >< at > -457,18 +457,14 < at >< at > int drive_is_ready (ide_drive_t *drive) if (drive->waiting_for_dma) return hwif->dma_ops->dma_test_irq(drive); -#if 0 -/* need to guarantee 400ns since last command was issued */ -udelay(1); -#endif - /* * We do a passive status test under shared PCI interrupts on * cards that truly share the ATA side interrupt, but may also share * an interrupt with another pci card/device. We make no assumptions * about possible isa-pnp and pci-pnp issues yet. */ -if (hwif->io_ports.ctl_addr) +if (hwif->io_ports.ctl_addr && + (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) stat = hwif->tp_ops->read_altstatus(hwif); else /* Note: this may clear a pending IRQ!! */ < at >< at > -610,6 +606,7 < at >< at > static const struct drive_list_entry ivb_list[] = { { "TSSTcorp CDDVDW SH-S202N", "SB01"}, { "TSSTcorp CDDVDW SH-S202H", "SB00"}, { "TSSTcorp CDDVDW SH-S202H", "SB01"}, +{ "SAMSUNG SP0822N", "WA100-10"}, { NULL, NULL} }; diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c index 1649ea5..c55bdbd 100644 --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c < at >< at > -266,7 +266,8 < at >< at > static int actual_try_to_identify (ide_drive_t *drive, u8 cmd) /* take a deep breath */ msleep(50); -if (io_ports->ctl_addr) { +if (io_ports->ctl_addr && + (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) { a = tp_ops->read_altstatus(hwif); s = tp_ops->read_status(hwif); if ((a ^ s) & ~ATA_IDX) diff --git a/include/linux/ide.h b/include/linux/ide.h index 54525be..010fb26 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h < at >< at > -1296,6 +1296,13 < at >< at > extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *o #define ide_pci_register_driver(d) pci_register_driver(d) #endif +static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev) +{ +if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) +return 1; +return 0; +} + void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, hw_regs_t *, hw_regs_t **); void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); < at >< at > -1375,6 +1382,7 < at >< at > enum { IDE_HFLAG_IO_32BIT= (1 << 24), /* unmask IRQs */ IDE_HFLAG_UNMASK_IRQS= (1 << 25), +IDE_HFLAG_BROKEN_ALTSTATUS= (1 << 26), /* serialize ports if DMA is possible (for sl82c105) */ IDE_HFLAG_SERIALIZE_DMA= (1 << 27), /* force host out of "simplex" mode */

[git patches] libata fixes

Jeff Garzik — 2008-12-01T19:06:53

1) pata_rb532_cf significant fixes 2) laptop- and drive-specific workarounds Please pull from 'upstream-linus' branch of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev.git upstream-linus to receive the following updates: drivers/ata/ata_piix.c | 15 +++++++++++++++ drivers/ata/libata-core.c | 21 +++++++++++++++++++++ drivers/ata/pata_rb532_cf.c | 15 ++++++++++----- include/linux/libata.h | 1 + 4 files changed, 47 insertions(+), 5 deletions(-) Phil Sutter (2): [libata] pata_rb532_cf: fix and rename register definitions [libata] pata_rb532_cf: fix signature of the xfer function Tejun Heo (2): ata_piix: add borked Tecra M4 to broken suspend list libata: blacklist Seagate drives which time out FLUSH_CACHE when used with NCQ diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 8e37be1..d6d97d8 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c < at >< at > -1066,6 +1066,21 < at >< at > static int piix_broken_suspend(void) if (dmi_find_device(DMI_DEV_TYPE_OEM_STRING, oemstrs[i], NULL)) return 1; +/* TECRA M4 sometimes forgets its identify and reports bogus + * DMI information. As the bogus information is a bit + * generic, match as many entries as possible. This manual + * matching is necessary because dmi_system_id.matches is + * limited to four entries. + */ +if (!strcmp(dmi_get_system_info(DMI_SYS_VENDOR), "TOSHIBA") && + !strcmp(dmi_get_system_info(DMI_PRODUCT_NAME), "000000") && + !strcmp(dmi_get_system_info(DMI_PRODUCT_VERSION), "000000") && + !strcmp(dmi_get_system_info(DMI_PRODUCT_SERIAL), "000000") && + !strcmp(dmi_get_system_info(DMI_BOARD_VENDOR), "TOSHIBA") && + !strcmp(dmi_get_system_info(DMI_BOARD_NAME), "Portable PC") && + !strcmp(dmi_get_system_info(DMI_BOARD_VERSION), "Version A0")) +return 1; + return 0; } diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 4214bfb..5e2eb74 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c < at >< at > -2492,6 +2492,13 < at >< at > int ata_dev_configure(struct ata_device *dev) } } +if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) { +ata_dev_printk(dev, KERN_WARNING, "WARNING: device requires " + "firmware update to be fully functional.\n"); +ata_dev_printk(dev, KERN_WARNING, " contact the vendor " + "or visit http://ata.wiki.kernel.org.\n"); +} + return 0; err_out_nosup: < at >< at > -4042,6 +4049,20 < at >< at > static const struct ata_blacklist_entry ata_device_blacklist [] = { { "ST380817AS","3.42",ATA_HORKAGE_NONCQ }, { "ST3160023AS","3.42",ATA_HORKAGE_NONCQ }, +/* Seagate NCQ + FLUSH CACHE firmware bug */ +{ "ST31500341AS","9JU138",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST31000333AS","9FZ136",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3640623AS","9FZ164",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3640323AS","9FZ134",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3320813AS","9FZ182",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3320613AS","9FZ162",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, + /* Blacklist entries taken from Silicon Image 3124/3132 Windows driver .inf file - also several Linux problem reports */ { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c index f8b3ffc..c2e6fb9 100644 --- a/drivers/ata/pata_rb532_cf.c +++ b/drivers/ata/pata_rb532_cf.c < at >< at > -39,9 +39,11 < at >< at > #define RB500_CF_MAXPORTS1 #define RB500_CF_IO_DELAY400 -#define RB500_CF_REG_CMD0x0800 +#define RB500_CF_REG_BASE0x0800 +#define RB500_CF_REG_ERR0x080D #define RB500_CF_REG_CTRL0x080E -#define RB500_CF_REG_DATA0x0C00 +/* 32bit buffered data register offset */ +#define RB500_CF_REG_DBUF320x0C00 struct rb532_cf_info { void __iomem*iobase; < at >< at > -72,11 +74,12 < at >< at > static void rb532_pata_exec_command(struct ata_port *ap, rb532_pata_finish_io(ap); } -static void rb532_pata_data_xfer(struct ata_device *adev, unsigned char *buf, +static unsigned int rb532_pata_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data) { struct ata_port *ap = adev->link->ap; void __iomem *ioaddr = ap->ioaddr.data_addr; +int retlen = buflen; if (write_data) { for (; buflen > 0; buflen--, buf++) < at >< at > -87,6 +90,7 < at >< at > static void rb532_pata_data_xfer(struct ata_device *adev, unsigned char *buf, } rb532_pata_finish_io(adev->link->ap); +return retlen; } static void rb532_pata_freeze(struct ata_port *ap) < at >< at > -146,13 +150,14 < at >< at > static void rb532_pata_setup_ports(struct ata_host *ah) ap->pio_mask= 0x1f; /* PIO4 */ ap->flags= ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO; -ap->ioaddr.cmd_addr= info->iobase + RB500_CF_REG_CMD; +ap->ioaddr.cmd_addr= info->iobase + RB500_CF_REG_BASE; ap->ioaddr.ctl_addr= info->iobase + RB500_CF_REG_CTRL; ap->ioaddr.altstatus_addr = info->iobase + RB500_CF_REG_CTRL; ata_sff_std_ports(&ap->ioaddr); -ap->ioaddr.data_addr= info->iobase + RB500_CF_REG_DATA; +ap->ioaddr.data_addr= info->iobase + RB500_CF_REG_DBUF32; +ap->ioaddr.error_addr= info->iobase + RB500_CF_REG_ERR; } static __devinit int rb532_pata_driver_probe(struct platform_device *pdev) diff --git a/include/linux/libata.h b/include/linux/libata.h index 59b0f1c..ed3f26e 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h < at >< at > -375,6 +375,7 < at >< at > enum { ATA_HORKAGE_BRIDGE_OK= (1 << 10),/* no bridge limits */ ATA_HORKAGE_ATAPI_MOD16_DMA = (1 << 11), /* use ATAPI DMA for commands not multiple of 16 bytes */ +ATA_HORKAGE_FIRMWARE_WARN = (1 << 12),/* firwmare update warning */ /* DMA mask for user DMA control: User visible values; DO NOT renumber */ -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

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[PATCH #upstream-fixes] ata_piix: add borked Tecra M4 to broken suspend list

Tejun Heo — 2008-11-29T13:37:21

Tecra M4 sometimes forget what it is and reports bogus data via DMI which makes the machine evade broken suspend matching and thus fail suspend/resume. This patch updates piix_broken_suspend() such that it can match such case. As the borked DMI data is a bit generic, matching many entries to make the match more specific is necessary. As the usual DMI matching is limited to four entries, this patch uses hard coded manual matching. This is reported by Alexandru Romanescu. Signed-off-by: Tejun Heo kernel.org> Cc: Alexandru Romanescu yahoo.co.uk> --- drivers/ata/ata_piix.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 8e37be1..d6d97d8 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c < at >< at > -1066,6 +1066,21 < at >< at > static int piix_broken_suspend(void) if (dmi_find_device(DMI_DEV_TYPE_OEM_STRING, oemstrs[i], NULL)) return 1; +/* TECRA M4 sometimes forgets its identify and reports bogus + * DMI information. As the bogus information is a bit + * generic, match as many entries as possible. This manual + * matching is necessary because dmi_system_id.matches is + * limited to four entries. + */ +if (!strcmp(dmi_get_system_info(DMI_SYS_VENDOR), "TOSHIBA") && + !strcmp(dmi_get_system_info(DMI_PRODUCT_NAME), "000000") && + !strcmp(dmi_get_system_info(DMI_PRODUCT_VERSION), "000000") && + !strcmp(dmi_get_system_info(DMI_PRODUCT_SERIAL), "000000") && + !strcmp(dmi_get_system_info(DMI_BOARD_VENDOR), "TOSHIBA") && + !strcmp(dmi_get_system_info(DMI_BOARD_NAME), "Portable PC") && + !strcmp(dmi_get_system_info(DMI_BOARD_VERSION), "Version A0")) +return 1; + return 0; } -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH #upstream-fixes] libata: blacklist Seagate drives which time out FLUSH_CACHE when used with NCQ

Tejun Heo — 2008-11-27T04:36:48

Some recent Seagate harddrives have firmware bug which causes FLUSH CACHE to timeout under certain circumstances if NCQ is being used. This can be worked around by disabling NCQ and fixed by updating the firmware. Implement ATA_HORKAGE_FIRMWARE_UPDATE and blacklist these devices. The wiki page has been updated to contain information on this issue. http://ata.wiki.kernel.org/index.php/Known_issues Signed-off-by: Tejun Heo kernel.org> --- drivers/ata/libata-core.c | 21 +++++++++++++++++++++ include/linux/libata.h | 1 + 2 files changed, 22 insertions(+) diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 4214bfb..5e2eb74 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c < at >< at > -2492,6 +2492,13 < at >< at > int ata_dev_configure(struct ata_device *dev) } } +if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) { +ata_dev_printk(dev, KERN_WARNING, "WARNING: device requires " + "firmware update to be fully functional.\n"); +ata_dev_printk(dev, KERN_WARNING, " contact the vendor " + "or visit http://ata.wiki.kernel.org.\n"); +} + return 0; err_out_nosup: < at >< at > -4042,6 +4049,20 < at >< at > static const struct ata_blacklist_entry ata_device_blacklist [] = { { "ST380817AS","3.42",ATA_HORKAGE_NONCQ }, { "ST3160023AS","3.42",ATA_HORKAGE_NONCQ }, +/* Seagate NCQ + FLUSH CACHE firmware bug */ +{ "ST31500341AS","9JU138",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST31000333AS","9FZ136",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3640623AS","9FZ164",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3640323AS","9FZ134",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3320813AS","9FZ182",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, +{ "ST3320613AS","9FZ162",ATA_HORKAGE_NONCQ | +ATA_HORKAGE_FIRMWARE_WARN }, + /* Blacklist entries taken from Silicon Image 3124/3132 Windows driver .inf file - also several Linux problem reports */ { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, diff --git a/include/linux/libata.h b/include/linux/libata.h index 59b0f1c..ed3f26e 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h < at >< at > -375,6 +375,7 < at >< at > enum { ATA_HORKAGE_BRIDGE_OK= (1 << 10),/* no bridge limits */ ATA_HORKAGE_ATAPI_MOD16_DMA = (1 << 11), /* use ATAPI DMA for commands not multiple of 16 bytes */ +ATA_HORKAGE_FIRMWARE_WARN = (1 << 12),/* firwmare update warning */ /* DMA mask for user DMA control: User visible values; DO NOT renumber */ -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

PART TIME REPRESENTATIVE POSITION NEEDED !!!

James Lee — 2008-11-24T23:46:17

Dear Sir/Ma., Lemmens crane system is an European and African Invented Company,but has a Standardized branch here in Singapore .We Buy, Produce and Distribute Constructing materials such as Crawler Cranes, Mechanical Crane and Marine Equipment Worldwide, you can check out our European branch website (www.lemmens-group.com ). We have reached big sales volume of Constructing Materials in Europe,Africa and the United Kingdom and now are trying to penetrate the USA/Canada market. Quite soon we will open representative offices or authorized sales centers in the USA/Canada and therefore we are currently looking for people who will assist us in establishing a new distribution! Network there. The fact is that despite the USA/Canada market is new for us we already have regular clients also speaks for itself. WHAT YOU NEED TO DO FOR US ? But we have a problem that's setting us back. We have some problem collecting our payments from our USA/Canada clients.. The international money transfer tax for legal entities (companies) in USA is 25%, whereas for the individual it is only 7%.There is no sense for us to work this way, while tax for international money transfer made by a private individual is 7% .That's why we need you! We need agents to receive payment for our textiles (in Money Orders, Checks or Bank Wire Transfers) from our clients in the USA/Canada and to resend the money to us via Money Gram or Western union money transfer. This way we will save money because of tax decreasing. JOB DESCRIPTION ? 1. Receive payment from Clients 2. Cash Payments at your Bank or Exchange Rate Offices 3. Deduct 10% which will be your percentage/pay on Payment processed. 4. Forward balance after deduction of percentage/pay to any of the offices you will be contacted to send payment to (Payment is to be sent via either by Money Gram or Western Union Money Transfer ). HOW MUCH WILL YOU EARN ? * 10% from each operation! For instance: you receive $8000 via Checks or money orders on our behalf.. You will cash the money and keep $800 (10% from $8000) for yourself; at the beginning your commission will equal 10%, though later it will increase up to 12% ,as you can earn up to $80,000-$150,000 anually from us.. ADVANTAGES You don't have to go out as you will work as an independent contractor right from your home office. Your job is absolutely legal. You can earn up to $10,000-$20,000 monthly depending on time you will spend for this job. You do not need any capital to start. You can do the Work easily without leaving or affecting your present Job. The employees who make efforts and work hard have a strong possibility to become managers. Anyway our employees never leave us. MAIN REQUIREMENTS * 18 years or older * Legally capable * Responsible * Ready to work 3-4 hours per week. * With PC knowledge * E-mail and internet experience (minimal) * We are not requesting for your Bank information's, SSN or any other personal information from you, as what will need is a proof of seriousness and achievement between you and us. And please know that everything is absolutely legal, that's why you have to fill a contract and If you are interested in our offer, please respond with the following details in order for us to reach you: * NAME * CONTACT ADDRESS * PHONE NUMBERS * AGE * SEX *OCCUPATION *NATIONALTY Kindly email us your reponses via this email--- rep.lemmenscrane< at >gmail.com Thanks for your anticipated action. And kindly get back to us if you are interested or not , as we hope to hear back from you soon. Regards, James Wong Lee lemmens crane system Branch Singapore City, Singapore Reply to rep.lemmenscrane< at >gmail.com -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH 0/2] libata: Cavium OCTEON SOC Compact Flash driver (v2)

David Daney — 2008-11-25T01:36:48

As part of our efforts to get the Cavium OCTEON processor support merged (see: http://marc.info/?l=linux-mips&m=122704699515601), I have a new version of our CF driver for your consideration. This second version I split into two separate patches. The first adds some entries to the ata_timing table in libata-core. The second is the driver proper. I will reply with the two patches. David Daney (2): libata: Add three more columns to the ata_timing table. libata: New driver for OCTEON SOC Compact Flash interface (v2). drivers/ata/Kconfig | 9 + drivers/ata/Makefile | 1 + drivers/ata/libata-core.c | 76 ++-- drivers/ata/pata_octeon_cf.c | 904 ++++++++++++++++++++++++++++++++++++++++++ include/linux/libata.h | 14 +- 5 files changed, 966 insertions(+), 38 deletions(-) create mode 100644 drivers/ata/pata_octeon_cf.c -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

ata_pio_need_iordy vs. CF spec. V4.1

David Daney — 2008-11-24T17:40:10

Table 22 on page 51 of CF Specification Rev. 4.1 indicates that iordy is not supported in PIO5 and PIO6. This seems to be in conflict with the code in ata_pio_need_iordy, which asserts that it is mandatory in any mode greater than PIO2. Which is correct? Or am I misreading something? Thanks, David Daney -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH] Resurrect IT8172 IDE controller driver

Shane McDonald — 2008-11-24T06:21:33

Support for the IT8172 IDE controller was removed from the kernel sometime after 2.6.18. Support for the only boards that used the IT8172 was removed from the kernel after 2.6.18, as they had never compiled since 2.6.0. However, there are a couple of platforms that use this chip: the PMC-Sierra Xiao Hu thin-client computer, which is no longer in production, and the Linksys NSS4000 Network Attached Storage box, which is based on the Xiao Hu board. I am attempting to add support for the Xiao Hu to the kernel, and this IT8172 IDE controller is the first bit of code in this effort. This patch resurrects the IT8172 IDE controller code. I began with the 2.6.18 version of the it8172.c file, and have moved it forward so that it works with the latest version of the kernel. I have run this driver on a PMC-Sierra Xiao Hu board with the 2.6.28-rc6 kernel, and I have had no problems with it in my configuration. The attached patch applies cleanly against 2.6.28-rc6. Signed-off-by: Shane McDonald gmail.com> --- drivers/ide/Kconfig | 7 + drivers/ide/Makefile | 1 drivers/ide/it8172.c | 205 ++++++++++++++++++++++++++++++++++++++ include/linux/pci_ids.h | 1 4 files changed, 214 insertions(+) diff -uprN a/drivers/ide/Kconfig b/drivers/ide/Kconfig --- a/drivers/ide/Kconfig2008-11-23 00:53:23.000000000 -0600 +++ b/drivers/ide/Kconfig2008-11-23 00:54:13.000000000 -0600 < at >< at > -524,6 +524,13 < at >< at > config BLK_DEV_PIIX This allows the kernel to change PIO, DMA and UDMA speeds and to configure the chip to optimum performance. +config BLK_DEV_IT8172 +tristate "IT8172 IDE support" +select BLK_DEV_IDEDMA_PCI +help + This driver adds support for the IDE controller on the + IT8172 System Controller. + config BLK_DEV_IT8213 tristate "IT8213 IDE support" select BLK_DEV_IDEDMA_PCI diff -uprN a/drivers/ide/Makefile b/drivers/ide/Makefile --- a/drivers/ide/Makefile2008-11-23 00:53:23.000000000 -0600 +++ b/drivers/ide/Makefile2008-11-23 00:54:13.000000000 -0600 < at >< at > -46,6 +46,7 < at >< at > obj-$(CONFIG_BLK_DEV_SC1200)+= sc1200. obj-$(CONFIG_BLK_DEV_CY82C693)+= cy82c693.o obj-$(CONFIG_BLK_DEV_DELKIN)+= delkin_cb.o obj-$(CONFIG_BLK_DEV_HPT366)+= hpt366.o +obj-$(CONFIG_BLK_DEV_IT8172)+= it8172.o obj-$(CONFIG_BLK_DEV_IT8213)+= it8213.o obj-$(CONFIG_BLK_DEV_IT821X)+= it821x.o obj-$(CONFIG_BLK_DEV_JMICRON)+= jmicron.o diff -uprN a/drivers/ide/it8172.c b/drivers/ide/it8172.c --- a/drivers/ide/it8172.c1969-12-31 18:00:00.000000000 -0600 +++ b/drivers/ide/it8172.c2008-11-23 01:06:01.000000000 -0600 < at >< at > -0,0 +1,205 < at >< at > +/* + * + * BRIEF MODULE DESCRIPTION + * IT8172 IDE controller support + * + * Copyright 2000 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * stevel< at >mvista.com or source< at >mvista.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "IT8172" + +/* + * Prototypes + */ + +static void it8172_set_pio_mode(ide_drive_t *drive, const u8 pio) +{ +ide_hwif_t *hwif= HWIF(drive); +struct pci_dev *dev= to_pci_dev(hwif->dev); +int is_slave= (&hwif->drives[1] == drive); +unsigned long flags; +u16 drive_enables; +u32 drive_timing; + +spin_lock_irqsave(&ide_lock, flags); +pci_read_config_word(dev, 0x40, &drive_enables); +pci_read_config_dword(dev, 0x44, &drive_timing); + +/* + * FIX! The DIOR/DIOW pulse width and recovery times in port 0x44 + * are being left at the default values of 8 PCI clocks (242 nsec + * for a 33 MHz clock). These can be safely shortened at higher + * PIO modes. The DIOR/DIOW pulse width and recovery times only + * apply to PIO modes, not to the DMA modes. + */ + +/* + * Enable port 0x44. The IT8172 spec is confused; it calls + * this register the "Slave IDE Timing Register", but in fact, + * it controls timing for both master and slave drives. + */ +drive_enables |= 0x4000; + +if (is_slave) { +drive_enables &= 0xc006; +if (pio > 1) +/* enable prefetch and IORDY sample-point */ +drive_enables |= 0x0060; +} else { +drive_enables &= 0xc060; +if (pio > 1) +/* enable prefetch and IORDY sample-point */ +drive_enables |= 0x0006; +} + +pci_write_config_word(dev, 0x40, drive_enables); +spin_unlock_irqrestore(&ide_lock, flags); +} + +static void it8172_set_dma_mode(ide_drive_t *drive, const u8 speed) +{ +ide_hwif_t *hwif= HWIF(drive); +struct pci_dev *dev= to_pci_dev(hwif->dev); +int a_speed= 3 << (drive->dn * 4); +int u_flag= 1 << drive->dn; +int u_speed= 0; +u8 reg48, reg4a; + +const u8 mwdma_to_pio[] = { 0, 3, 4 }; +u8 pio; + +pci_read_config_byte(dev, 0x48, ®48); +pci_read_config_byte(dev, 0x4a, ®4a); + +if (speed >= XFER_UDMA_0) { + +/* Setting the DMA cycle time to 2 or 3 PCI clocks + * (60 and 91 nsec at 33 MHz PCI clock) seems to cause + * BadCRC errors during DMA transfers on some drives, + * even though both numbers meet the minimum ATAPI-4 spec + * of 73 and 54 nsec for UDMA 1 and 2 respectively. + * So the faster times are not implemented here. + * The good news is that the slower cycle time has + * very little affect on transfer performance. + */ + +u_speed = 0 << (drive->dn * 4); + +pci_write_config_byte(dev, 0x48, reg48 | u_flag); +reg4a &= ~a_speed; +pci_write_config_byte(dev, 0x4a, reg4a | u_speed); +} else { +pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); +pci_write_config_byte(dev, 0x4a, reg4a & ~a_speed); +} + +if (speed >= XFER_MW_DMA_0) +pio = mwdma_to_pio[speed - XFER_MW_DMA_0]; +else +pio = 2; + +it8172_set_pio_mode(drive, pio); +} + + +static unsigned int __devinit init_chipset_it8172(struct pci_dev *dev) +{ +unsigned char progif; + +/* + * Place both IDE interfaces into PCI "native" mode + */ +pci_read_config_byte(dev, PCI_CLASS_PROG, &progif); +pci_write_config_byte(dev, PCI_CLASS_PROG, progif | 0x05); + +return dev->irq; +} + + +static const struct ide_port_ops it8172_port_ops = { +.set_pio_mode= it8172_set_pio_mode, +.set_dma_mode= it8172_set_dma_mode, +}; + +static const struct ide_port_info it8172_chipset __devinitdata = { +.name= DRV_NAME, +.init_chipset= init_chipset_it8172, +.port_ops= &it8172_port_ops, +.enablebits= {{0x00, 0x00, 0x00}, {0x40, 0x00, 0x01} }, +.host_flags= IDE_HFLAG_SINGLE, +.pio_mask= ATA_PIO4, +.swdma_mask= ATA_SWDMA2_ONLY, +.mwdma_mask= ATA_MWDMA12_ONLY, +.udma_mask= ATA_UDMA2, +}; + +static int __devinit it8172_init_one(struct pci_dev *dev, +const struct pci_device_id *id) +{ +if ((!(PCI_FUNC(dev->devfn) & 1) || +(!((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)))) +return -ENODEV; /* IT8172 is more than an IDE controller */ +return ide_pci_init_one(dev, &it8172_chipset, NULL); +} + +static struct pci_device_id it8172_pci_tbl[] = { +{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8172), 0 }, +{ 0, }, +}; +MODULE_DEVICE_TABLE(pci, it8172_pci_tbl); + +static struct pci_driver it8172_pci_driver = { +.name= "IT8172_IDE", +.id_table= it8172_pci_tbl, +.probe= it8172_init_one, +.remove= ide_pci_remove, +.suspend= ide_pci_suspend, +.resume= ide_pci_resume, +}; + +static int __init it8172_ide_init(void) +{ +return ide_pci_register_driver(&it8172_pci_driver); +} + +static void __exit it8172_ide_exit(void) +{ +pci_unregister_driver(&it8172_pci_driver); +} + +module_init(it8172_ide_init); +module_exit(it8172_ide_exit); + +MODULE_AUTHOR("SteveL< at >mvista.com"); +MODULE_DESCRIPTION("PCI driver module for ITE 8172 IDE"); +MODULE_LICENSE("GPL"); diff -uprN a/include/linux/pci_ids.h b/include/linux/pci_ids.h --- a/include/linux/pci_ids.h2008-11-23 00:53:41.000000000 -0600 +++ b/include/linux/pci_ids.h2008-11-23 01:03:59.000000000 -0600 < at >< at > -1658,6 +1658,7 < at >< at > #define PCI_VENDOR_ID_ROCKWELL0x127A #define PCI_VENDOR_ID_ITE0x1283 +#define PCI_DEVICE_ID_ITE_81720x8172 #define PCI_DEVICE_ID_ITE_82110x8211 #define PCI_DEVICE_ID_ITE_82120x8212 #define PCI_DEVICE_ID_ITE_82130x8213 -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

about TRIM/DISCARD support and barriers

Tejun Heo — 2008-11-23T04:46:08

Hello, all. Dongjun Shin who works for Samsung SSD dep asked me about libata TRIM support and pointed me to the new DISCARD support David Woodhouse got merged for 2.6.28. I took a look at the code and blk-layer interface-wise we seemed to be ready both for filesystems and userland (so that fsck or something which runs background can mark unused blocks) but there doesn't seem to be any low level driver which actually implements ->prepare_discard_fn or fs which sets the DISCARD flag. Adding ->prepare_discard_fn wouldn't be difficult at all but I became curious about a few things after looking at the DISCARD interface. First of all - how to avoid racing aginst reusing and how to schedule DISCARDs. * There are two variants of DISCARD - DISCARD w/o barrier and DISCARD w/ barrier, if a fs uses the former, it would need to make sure that it the DISCARD finishes before re-using the block. Block layer will make sure order will be kept for the latter but depending on how often those DICARDs are issued it can disrupt IO scheduling. * It looks like non-barrier DISCARD will be put into the IO sched and scheduled the same way as regular IOs. I don't relly think this is necessary or a good idea. DISCARDs probably don't need any kind of sorting anyway and it's likely to disrupt IO sched heuristics. Also, DISCARDs can be postponed w/o affecting correct operation. However, DISCARDs are not likely to take a long time and we might not have to worry about it too much unless it starves regular IOs. With the above three points, I think it might be better to make block layer manage and order DISCARD requests than putting it onto the filesystem or barrier mechanism. If block layer manages map of pending DISCARDs and FSes just tell block layer newly freed blocks, block layer can schedule DISCARDs as it sees fit and cancels pending ones if IO access to it occurs before the DISCARD is issued to the drive. This way, adding DISCARD support to FSes become much easier - it can just put blk_discard(lba, range) where it's discarding blocks and don't have to worry about ordering or error handling. What do you think? Also, I have a question regarding the current barrier implementation. When I asked it to Chris Mason some time ago, I was told that btrfs doesn't really make use of barrier in that btrfs itself waits for the barrier to complete before proceeding. I've been thinking about colored barrier implementation because I heard that the current barrier ordering is too crude or heavy handed. But, then again, if the filesystem waits for requests to complete itself and those dependent requests are marked SYNC as necessary so that they don't get postponed too much, all that's needed is flush cache. Doing it that way will add a bit of latency but as long as things can progress in parallel, it will probably perform better than the current barrier. After all, it's not like we have selective FLUSH on actual devices anyway. Where the selective barriering can make difference is how it's handled in the IO scheduler and FS waiting for requests to finish and then issuing barrier achieves that quite alright and communicating the partitial ordering of requests to block layer wouldn't be much simpler than doing it in FS proper and there's also the problem of how to communicate or handle when one of the request in the partial ordering fails. So, would selective / more intelligent barrier be beneficial to filesystems or is the way things are just fine? Thanks.

Drive failure and ASUS

Gene Heskett — 2008-11-22T14:01:33

Greetings; The only way I can get this box to boot is to disconnect the data cable on a drive with 121 badblocks as somehow ASUS and JMicron-pata all seem to think its /dev/sda when hooked up, and it is no longer bootable. I'm presently booted from a sata drive on that interface, which this ASUS board has about 8 of. So I've booted with the data cable off, and hooked it up once booted. Unforch there seems to be no discovery of its presence. No /dev/sdd stuff was created when I plugged the data cable into the drive. The install is the August 2008 F8 respin and is uptodate. How can I make the system aware that it is now there? It has about 40 Gb of data I'd like to recover if I can. Thanks.

[PATCH] ide: add ->max_sectors field to struct ide_port_info

Bartlomiej Zolnierkiewicz — 2008-11-21T21:42:08

* Add ->max_sectors field to struct ide_port_info to allow host drivers to specify value used for hwif->rqsize (if smaller than the default). * Convert pdc202xx_old to use ->max_sectors and remove no longer needed IDE_HFLAG_RQSIZE_256 flag. There should be no functional changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz gmail.com> --- goes before "trm290: add IDE_HFLAG_TRM290 host flag" patch in pata-2.6 tree drivers/ide/ide-probe.c | 4 ++-- drivers/ide/pdc202xx_old.c | 9 +++++---- include/linux/ide.h | 5 +++-- 3 files changed, 10 insertions(+), 8 deletions(-) Index: b/drivers/ide/ide-probe.c =================================================================== --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c < at >< at > -1442,8 +1442,8 < at >< at > static void ide_init_port(ide_hwif_t *hw hwif->mate->serialized = hwif->serialized = 1; } -if (d->host_flags & IDE_HFLAG_RQSIZE_256) -hwif->rqsize = 256; +if (d->max_sectors) +hwif->rqsize = d->max_sectors; /* call chipset specific routine for each enabled port */ if (d->init_hwif) Index: b/drivers/ide/pdc202xx_old.c =================================================================== --- a/drivers/ide/pdc202xx_old.c +++ b/drivers/ide/pdc202xx_old.c < at >< at > -350,16 +350,17 < at >< at > static const struct ide_dma_ops pdc2026x .dma_timeout= pdc202xx_dma_timeout, }; -#define DECLARE_PDC2026X_DEV(udma, extra_flags) \ +#define DECLARE_PDC2026X_DEV(udma, sectors) \ { \ .name= DRV_NAME, \ .init_chipset= init_chipset_pdc202xx, \ .port_ops= &pdc2026x_port_ops, \ .dma_ops= &pdc2026x_dma_ops, \ -.host_flags= IDE_HFLAGS_PDC202XX | extra_flags, \ +.host_flags= IDE_HFLAGS_PDC202XX, \ .pio_mask= ATA_PIO4, \ .mwdma_mask= ATA_MWDMA2, \ .udma_mask= udma, \ +.max_sectors= sectors, \ } static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { < at >< at > -376,8 +377,8 < at >< at > static const struct ide_port_info pdc202 /* 1: PDC2026{2,3} */ DECLARE_PDC2026X_DEV(ATA_UDMA4, 0), -/* 2: PDC2026{5,7} */ -DECLARE_PDC2026X_DEV(ATA_UDMA5, IDE_HFLAG_RQSIZE_256), +/* 2: PDC2026{5,7}: UDMA5, limit LBA48 requests to 256 sectors */ +DECLARE_PDC2026X_DEV(ATA_UDMA5, 256), }; /** Index: b/include/linux/ide.h =================================================================== --- a/include/linux/ide.h +++ b/include/linux/ide.h < at >< at > -1365,8 +1365,6 < at >< at > enum { IDE_HFLAG_LEGACY_IRQS= (1 << 21), /* force use of legacy IRQs */ IDE_HFLAG_FORCE_LEGACY_IRQS= (1 << 22), -/* limit LBA48 requests to 256 sectors */ -IDE_HFLAG_RQSIZE_256= (1 << 23), /* use 32-bit I/O ops */ IDE_HFLAG_IO_32BIT= (1 << 24), /* unmask IRQs */ < at >< at > -1404,6 +1402,9 < at >< at > struct ide_port_info { ide_pci_enablebit_tenablebits[2]; hwif_chipset_tchipset; + +u16max_sectors;/* if < than the default one */ + u32host_flags; u8pio_mask; u8swdma_mask; -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH] amd74xx: workaround unreliable AltStatus register for nVidia controllers

Bartlomiej Zolnierkiewicz — 2008-11-21T21:38:50

It seems that on some nVidia controllers using AltStatus register can be unreliable so default to Status register if the PCI device is in Compatibility Mode. In order to achieve this: * Add ide_pci_is_in_compatibility_mode() inline helper to . * Add IDE_HFLAG_BROKEN_ALTSTATUS host flag and set it in amd74xx host driver for nVidia controllers in Compatibility Mode. * Teach actual_try_to_identify() and drive_is_ready() about the new flag. This fixes the regression caused by removal of CONFIG_IDEPCI_SHARE_IRQ config option in 2.6.25 and using AltStatus register unconditionally when available (kernel.org bug #11659). [ Moreover for CONFIG_IDEPCI_SHARE_IRQ=y (which is what most distributions/people use) it never worked correctly. ] Thanks to Remy LABENE for help with debugging the problem. More info at: http://bugzilla.kernel.org/show_bug.cgi?id=11659 Reported-by: Remy LABENE free.fr> Cc: Borislav Petkov googlemail.com> Signed-off-by: Bartlomiej Zolnierkiewicz gmail.com> --- This fix should be safe for both .28 and -stable. drivers/ide/amd74xx.c | 11 ++++++++++- drivers/ide/ide-iops.c | 3 ++- drivers/ide/ide-probe.c | 3 ++- include/linux/ide.h | 8 ++++++++ 4 files changed, 22 insertions(+), 3 deletions(-) Index: b/drivers/ide/amd74xx.c =================================================================== --- a/drivers/ide/amd74xx.c +++ b/drivers/ide/amd74xx.c < at >< at > -3,7 +3,7 < at >< at > * IDE driver for Linux. * * Copyright (c) 2000-2002 Vojtech Pavlik - * Copyright (c) 2007 Bartlomiej Zolnierkiewicz + * Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz * * Based on the work of: * Andre Hedrick < at >< at > -263,6 +263,15 < at >< at > static int __devinit amd74xx_probe(struc d.udma_mask = ATA_UDMA5; } +/* + * It seems that on some nVidia controllers using AltStatus + * register can be unreliable so default to Status register + * if the device is in Compatibility Mode. + */ +if (dev->vendor == PCI_VENDOR_ID_NVIDIA && + ide_pci_is_in_compatibility_mode(dev)) +d.host_flags |= IDE_HFLAG_BROKEN_ALTSTATUS; + printk(KERN_INFO "%s %s: UDMA%s controller\n", d.name, pci_name(dev), amd_dma[fls(d.udma_mask) - 1]); Index: b/drivers/ide/ide-iops.c =================================================================== --- a/drivers/ide/ide-iops.c +++ b/drivers/ide/ide-iops.c < at >< at > -468,7 +468,8 < at >< at > int drive_is_ready (ide_drive_t *drive) * an interrupt with another pci card/device. We make no assumptions * about possible isa-pnp and pci-pnp issues yet. */ -if (hwif->io_ports.ctl_addr) +if (hwif->io_ports.ctl_addr && + (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) stat = hwif->tp_ops->read_altstatus(hwif); else /* Note: this may clear a pending IRQ!! */ Index: b/drivers/ide/ide-probe.c =================================================================== --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c < at >< at > -266,7 +266,8 < at >< at > static int actual_try_to_identify (ide_d /* take a deep breath */ msleep(50); -if (io_ports->ctl_addr) { +if (io_ports->ctl_addr && + (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) { a = tp_ops->read_altstatus(hwif); s = tp_ops->read_status(hwif); if ((a ^ s) & ~ATA_IDX) Index: b/include/linux/ide.h =================================================================== --- a/include/linux/ide.h +++ b/include/linux/ide.h < at >< at > -1296,6 +1296,13 < at >< at > extern int __ide_pci_register_driver(str #define ide_pci_register_driver(d) pci_register_driver(d) #endif +static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev) +{ +if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) +return 1; +return 0; +} + void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, hw_regs_t *, hw_regs_t **); void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); < at >< at > -1375,6 +1382,7 < at >< at > enum { IDE_HFLAG_IO_32BIT= (1 << 24), /* unmask IRQs */ IDE_HFLAG_UNMASK_IRQS= (1 << 25), +IDE_HFLAG_BROKEN_ALTSTATUS= (1 << 26), /* serialize ports if DMA is possible (for sl82c105) */ IDE_HFLAG_SERIALIZE_DMA= (1 << 27), /* force host out of "simplex" mode */ -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH] ide: add SAMSUNG SP0822N with firmware WA100-10 to ivb_list[]

Bartlomiej Zolnierkiewicz — 2008-11-21T21:40:33

Should fix kernel.org bug #10225: http://bugzilla.kernel.org/show_bug.cgi?id=10225 Reported-by: Matthias B. web.de> Cc: Alan Cox lxorguk.ukuu.org.uk> Signed-off-by: Bartlomiej Zolnierkiewicz gmail.com> --- drivers/ide/ide-iops.c | 1 + 1 file changed, 1 insertion(+) Index: b/drivers/ide/ide-iops.c =================================================================== --- a/drivers/ide/ide-iops.c +++ b/drivers/ide/ide-iops.c < at >< at > -610,6 +610,7 < at >< at > static const struct drive_list_entry ivb { "TSSTcorp CDDVDW SH-S202N", "SB01"}, { "TSSTcorp CDDVDW SH-S202H", "SB00"}, { "TSSTcorp CDDVDW SH-S202H", "SB01"}, +{ "SAMSUNG SP0822N", "WA100-10"}, { NULL, NULL} }; -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH #upstraem-fixes] ata_piix: detect and clear spurious IRQs

Tejun Heo — 2008-11-21T04:13:06

The DMA_IRQ bit in the bmdma status register is always set when IDEIRQ is asserted allowing spurious IRQ detection. Detect spurious IRQs and clear them. This protects ata_piix against nobody-cared which gets reported not so rarely. Signed-off-by: Tejun Heo kernel.org> --- drivers/ata/ata_piix.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 8e37be1..b438edc 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c < at >< at > -922,6 +922,58 < at >< at > static int piix_sidpr_scr_read(struct ata_link *link, return 0; } +static irqreturn_t piix_interrupt(int irq, void *dev_instance) +{ +struct ata_host *host = dev_instance; +unsigned int i; +unsigned int handled = 0; +unsigned long flags; + +spin_lock_irqsave(&host->lock, flags); + +for (i = 0; i < host->n_ports; i++) { +struct ata_port *ap = host->ports[i]; +struct ata_queued_cmd *qc; +u8 host_stat; + +if (ata_port_is_dummy(ap)) +continue; + +qc = ata_qc_from_tag(ap, ap->link.active_tag); +if (qc && !(qc->tf.flags & ATA_TFLAG_POLLING)) { +handled |= ata_sff_host_intr(ap, qc); +continue; +} + +/* + * Control reaches here if HSM is not expecting IRQ. + * If the controller is actually asserting IRQ line, + * this will lead to nobody cared. Fortuantely, + * DMA_INTR of PIIX is set whenever IDEIRQ is set so + * it can be used to detect spurious IRQs. As the + * driver is not expecting IRQ at all, clearing IRQ + * here won't lead to loss of IRQ event. + */ +if (unlikely(!ap->ioaddr.bmdma_addr)) +continue; + +host_stat = ap->ops->bmdma_status(ap); +if (!(host_stat & ATA_DMA_INTR)) +continue; + +if (printk_ratelimit()) +ata_port_printk(ap, KERN_INFO, +"clearing spurious IRQ\n"); +ap->ops->sff_check_status(ap); +ap->ops->sff_irq_clear(ap); +handled |= 1; +} + +spin_unlock_irqrestore(&host->lock, flags); + +return IRQ_RETVAL(handled); +} + static int piix_sidpr_scr_write(struct ata_link *link, unsigned int reg, u32 val) { < at >< at > -1470,7 +1522,7 < at >< at > static int __devinit piix_init_one(struct pci_dev *pdev, } pci_set_master(pdev); -return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht); +return ata_pci_sff_activate_host(host, piix_interrupt, &piix_sht); } static int __init piix_init(void) -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH] ide: New libata driver for OCTEON SOC Compact Flash interface.

David Daney — 2008-11-21T02:24:37

As part of our efforts to get the Cavium OCTEON processor support merged (see: http://marc.info/?l=linux-mips&m=122704699515601), we have this CF driver for your consideration. Most OCTEON variants have *no* DMA or interrupt support on the CF interface so for these, only PIO is supported. Although if DMA is available, we do take advantage of it. The register definitions are part of the chip support patch set mentioned above, and are not included here. At this point I would like to get feedback on the patch and would expect that it would merge via the linux-mips tree along with the rest of the chip support. Thanks, Signed-off-by: David Daney caviumnetworks.com> --- drivers/ata/Kconfig | 9 + drivers/ata/Makefile | 1 + drivers/ata/pata_octeon_cf.c | 942 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 952 insertions(+), 0 deletions(-) diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 78fbec8..b59904b 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig < at >< at > -697,6 +697,15 < at >< at > config PATA_IXP4XX_CF If unsure, say N. +config PATA_OCTEON_CF +tristate "OCTEON Boot Bus Compact Flash support" +depends on CPU_CAVIUM_OCTEON +help + This option enables a polled compact flash driver for use with + compact flash cards attached to the OCTEON boot bus. + + If unsure, say N. + config PATA_SCC tristate "Toshiba's Cell Reference Set IDE support" depends on PCI && PPC_CELLEB diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 674965f..7f1ecf9 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile < at >< at > -69,6 +69,7 < at >< at > obj-$(CONFIG_PATA_IXP4XX_CF)+= pata_ixp4xx_cf.o obj-$(CONFIG_PATA_SCC)+= pata_scc.o obj-$(CONFIG_PATA_SCH)+= pata_sch.o obj-$(CONFIG_PATA_BF54X)+= pata_bf54x.o +obj-$(CONFIG_PATA_OCTEON_CF)+= pata_octeon_cf.o obj-$(CONFIG_PATA_PLATFORM)+= pata_platform.o obj-$(CONFIG_PATA_OF_PLATFORM)+= pata_of_platform.o obj-$(CONFIG_PATA_ICSIDE)+= pata_icside.o diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c new file mode 100644 index 0000000..e8712c0 --- /dev/null +++ b/drivers/ata/pata_octeon_cf.c < at >< at > -0,0 +1,942 < at >< at > +/* + * Driver for the Octeon bootbus compact flash. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005-2008 Cavium Networks + * Copyright (C) 2008 Wind River Systems + */ + +#include +#include +#include +#include +#include +#include + +#include + +#define DRV_NAME"pata_octeon_cf" +#define DRV_VERSION"2.1" + + +struct octeon_cf_port { +struct tasklet_struct delayed_irq_tasklet; +}; + +/* Timing multiple used for configuring the boot bus DMA engine */ +#define CF_DMA_TIMING_MULT4 + +static struct scsi_host_template octeon_cf_sht = { +ATA_PIO_SHT(DRV_NAME), +}; + +static int use_cf_dma = 1; + +/** + * Called to enable the use of DMA based on kernel command line. + */ +void octeon_cf_enable_dma(void) +{ +use_cf_dma = 1; +} + +static unsigned int div_roundup(unsigned int n, unsigned int d) +{ +return (n + d - 1) / d; +} + +/** + * Convert nanosecond based time to setting used in the + * boot bus timing register, based on timing multiple + */ +static unsigned int ns_to_tim_reg(int tim_mult, uint32_t nsecs) +{ +unsigned int val; + +/* + * Compute # of eclock periods to get desired duration in + * nanoseconds. + */ +val = div_roundup(nsecs * (octeon_get_clock_rate() / 1000000), + 1000); + +/* Factor in timing multiple, if not 1 */ +if (tim_mult != 1) +val = div_roundup(val, tim_mult); + +return val; +} + +/** + * Called after libata determines the needed PIO mode. This + * function programs the Octeon bootbus regions to support the + * timing requirements of the PIO mode. + * + * < at >ap: ATA port information + * < at >dev: ATA device + */ +static void octeon_cf_set_piomode(struct ata_port *ap, struct ata_device *dev) +{ +struct octeon_cf_data *ocd = ap->dev->platform_data; +cvmx_mio_boot_reg_timx_t mio_boot_reg_tim; +unsigned int cs = ocd->base_region; + +int use_iordy;/* Non zero to monitor the IORDY signal */ +int clocks_us;/* Number of clock cycles per microsec */ +/* These names are timing parameters from the ATA spec */ +int t1; +int t2; +int t2i; +int t4; +int t6; +int t6z; +/* + * PIO modes 0-4 all allow the device to deassert IORDY to slow down + * the host. + */ +use_iordy = 1; +/* Use the PIO mode to determine out timing parameters */ +switch (dev->pio_mode) { +case XFER_PIO_0: +t1 = 70; +t2 = 165; +t2i = 0; +t4 = 30; +t6 = 5; +t6z = 30; +break; +case XFER_PIO_1: +t1 = 50; +t2 = 125; +t2i = 0; +t4 = 20; +t6 = 5; +t6z = 30; +break; +case XFER_PIO_2: +t1 = 30; +t2 = 100; +t2i = 0; +t4 = 15; +t6 = 5; +t6z = 30; +break; +case XFER_PIO_3: +t1 = 30; +t2 = 80; +t2i = 70; +t4 = 10; +t6 = 5; +t6z = 30; +break; +case XFER_PIO_4: +t1 = 25; +t2 = 70; +t2i = 25; +t4 = 10; +t6 = 5; +t6z = 30; +break; +case XFER_PIO_5: +/* CF spec say IORDY should be ignored in PIO 5 and 6 */ +use_iordy = 0; +t1 = 15; +t2 = 65; +t2i = 25; +t4 = 5; +t6 = 5; +t6z = 20; +break; +case XFER_PIO_6: +/* CF spec say IORDY should be ignored in PIO 5 and 6 */ +use_iordy = 0; +t1 = 10; +t2 = 55; +t2i = 20; +t4 = 5; +t6 = 5; +t6z = 20; +break; +default: +BUG(); +} +clocks_us = (octeon_get_clock_rate() + (1000000 - 1)) / (1000000); + +t1 = (t1 * clocks_us) / 1000 / 2; +if (t1) +t1--; +t2 = (t2 * clocks_us) / 1000 / 2; +if (t2) +t2--; +t2i = (t2i * clocks_us) / 1000 / 2; +if (t2i) +t2i--; +t4 = (t4 * clocks_us) / 1000 / 2; +if (t4) +t4--; +t6 = (t6 * clocks_us) / 1000 / 2; +if (t6) +t6--; +t6z = (t6z * clocks_us) / 1000 / 2; +if (t6z) +t6z--; + +mio_boot_reg_tim.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_TIMX(cs)); +/* Disable page mode */ +mio_boot_reg_tim.s.pagem = 0; +/* Enable dynamic timing */ +mio_boot_reg_tim.s.waitm = use_iordy; +/* Pages are disabled */ +mio_boot_reg_tim.s.pages = 0; +/* We don't use multiplexed address mode */ +mio_boot_reg_tim.s.ale = 0; +/* Not used */ +mio_boot_reg_tim.s.page = 0; +/* Time after IORDY to coninue to assert the data */ +mio_boot_reg_tim.s.wait = 0; +/* Time after CE that signals stay valid */ +mio_boot_reg_tim.s.pause = t6z - t6; +/* How long to hold after a write */ +mio_boot_reg_tim.s.wr_hld = t4; +/* How long to wait after a read for device to tristate */ +mio_boot_reg_tim.s.rd_hld = t6; +/* How long write enable is asserted */ +mio_boot_reg_tim.s.we = t2; +/* How long read enable is asserted */ +mio_boot_reg_tim.s.oe = t2; +/* Time after CE that read/write starts */ +mio_boot_reg_tim.s.ce = 0; +/* Time before CE that address is valid */ +mio_boot_reg_tim.s.adr = 0; + +/* Program the bootbus region timing for the data port chip select. */ +cvmx_write_csr(CVMX_MIO_BOOT_REG_TIMX(cs), mio_boot_reg_tim.u64); +} + +static void octeon_cf_set_dmamode(struct ata_port *ap, struct ata_device *dev) +{ +struct octeon_cf_data *ocd = dev->link->ap->dev->platform_data; +cvmx_mio_boot_dma_timx_t dma_tim; +int oe_a; +int oe_n; +int dma_acks; +int dma_ackh; +int dma_arq; +int pause; +int To, Tkr, Td; +int tim_mult = 4; + +dma_tim.u64 = 0; + +dma_acks = 0;/*Ti */ + +/* not spec'ed, value in eclocks, not affected by tim_mult */ +dma_arq = 8; +pause = 25 - dma_arq * 1000 / +(octeon_get_clock_rate() / 1000000); /* Tz */ + +switch (dev->dma_mode) { +case XFER_MW_DMA_0: +dma_ackh = 20;/* Tj */ +To = 480; +Td = 215; +Tkr = 50; +break; +case XFER_MW_DMA_1: +dma_ackh = 5;/* Tj */ +To = 150; +Td = 80; +Tkr = 50; +break; +case XFER_MW_DMA_2: +dma_ackh = 5;/* Tj */ +To = 120; +Td = 70; +Tkr = 25; +break; +case XFER_MW_DMA_3: +dma_ackh = 5;/* Tj */ +To = 100; +Td = 65; +Tkr = 25; +break; +case XFER_MW_DMA_4: +dma_ackh = 5;/* Tj */ +To = 80; +Td = 55; +Tkr = 20; +break; +default: +BUG(); +} +/* Td (Seem to need more margin here.... */ +oe_a = Td + 20; +/* Tkr from cf spec, lengthened to meet To */ +oe_n = max(To - oe_a, Tkr); + +dma_tim.s.dmack_pi = 1; + +dma_tim.s.oe_n = ns_to_tim_reg(tim_mult, oe_n); +dma_tim.s.oe_a = ns_to_tim_reg(tim_mult, oe_a); + +dma_tim.s.dmack_s = ns_to_tim_reg(tim_mult, dma_acks); +dma_tim.s.dmack_h = ns_to_tim_reg(tim_mult, dma_ackh); + +dma_tim.s.dmarq = dma_arq; +dma_tim.s.pause = ns_to_tim_reg(tim_mult, pause); + +dma_tim.s.rd_dly = 0;/* Sample right on edge */ + +/* writes only */ +dma_tim.s.we_n = ns_to_tim_reg(tim_mult, oe_n); +dma_tim.s.we_a = ns_to_tim_reg(tim_mult, oe_a); + +#if 0 +pr_info("ns to ticks (mult %d) of %d is: %d\n", TIM_MULT, 60, + ns_to_tim_reg(60)); +pr_info("oe_n: %d, oe_a: %d, dmack_s: %d, dmack_h: " +"%d, dmarq: %d, pause: %d\n", +dma_tim.s.oe_n, dma_tim.s.oe_a, dma_tim.s.dmack_s, +dma_tim.s.dmack_h, dma_tim.s.dmarq, dma_tim.s.pause); +#endif +cvmx_write_csr(CVMX_MIO_BOOT_DMA_TIMX(ocd->dma_engine), + dma_tim.u64); + +} + +/** + * Handle an I/O request. + * + * < at >cf: Device to access + * < at >lba_sector: Starting sector + * < at >num_sectors: + * Number of sectors to transfer + * < at >buffer: Data buffer + * < at >write: Is the a write. Default to a read + */ +static unsigned int octeon_cf_data_xfer(struct ata_device *dev, +unsigned char *buffer, +unsigned int buflen, +int rw) +{ +struct ata_port *ap= dev->link->ap; +struct octeon_cf_data *ocd= ap->dev->platform_data; +void __iomem *data_addr= ap->ioaddr.data_addr; +unsigned int words; +unsigned int count; + +/* + * Odd lengths are not supported. We should always be a + * multiple of 512. + */ +BUG_ON(buflen & 1); +if (ocd->is16bit) { +words = buflen / 2; +if (rw) { +count = 16; +while (words--) { +iowrite16(*(uint16_t *)buffer, data_addr); +buffer += sizeof(uint16_t); +/* + * Every 16 writes do a read so the + * bootbus FIFO doesn't fill up. + */ +if (--count == 0) { +ioread8(ap->ioaddr.altstatus_addr); +count = 16; +} +} +} else { +while (words--) { +*(uint16_t *)buffer = ioread16(data_addr); +buffer += sizeof(uint16_t); +} +} +} else { +/* 8-bit */ +words = buflen; +if (rw) { +count = 16; +while (words--) { +iowrite8(*buffer, data_addr); +buffer++; +/* + * Every 16 writes do a read so the + * bootbus FIFO doesn't fill up. + */ +if (--count == 0) { +ioread8(ap->ioaddr.altstatus_addr); +count = 16; +} +} +} else +ioread8_rep(data_addr, buffer, words); +} +return buflen; +} + + +/** + * Read the taskfile for 16bit non-true_ide only. + */ +static void octeon_cf_tf_read16(struct ata_port *ap, struct ata_taskfile *tf) +{ +u16 blob; +/* The base of the registers is at ioaddr.data_addr. */ +void __iomem *base = ap->ioaddr.data_addr; + +blob = __raw_readw(base + 0xc); +tf->feature = blob >> 8; + +blob = __raw_readw(base + 2); +tf->nsect = blob & 0xff; +tf->lbal = blob >> 8; + +blob = __raw_readw(base + 4); +tf->lbam = blob & 0xff; +tf->lbah = blob >> 8; + +blob = __raw_readw(base + 6); +tf->device = blob && 8; +tf->command = blob >> 8; + +if (tf->flags & ATA_TFLAG_LBA48) { +if (likely(ap->ioaddr.ctl_addr)) { +iowrite8(tf->ctl | ATA_HOB, ap->ioaddr.ctl_addr); + +blob = __raw_readw(base + 0xc); +tf->hob_feature = blob >> 8; + +blob = __raw_readw(base + 2); +tf->hob_nsect = blob & 0xff; +tf->hob_lbal = blob >> 8; + +blob = __raw_readw(base + 4); +tf->hob_lbam = blob & 0xff; +tf->hob_lbah = blob >> 8; + +iowrite8(tf->ctl, ap->ioaddr.ctl_addr); +ap->last_ctl = tf->ctl; +} else +WARN_ON(1); +} +} + +static u8 octeon_cf_check_status16(struct ata_port *ap) +{ +u16 blob; +void __iomem *base = ap->ioaddr.data_addr; + +blob = __raw_readw(base + 6); +return blob >> 8; +} + +static int octeon_cf_softreset16(struct ata_link *link, unsigned int *classes, + unsigned long deadline) +{ +struct ata_port *ap = link->ap; +void __iomem *base = ap->ioaddr.data_addr; +int rc; +u8 err; + +DPRINTK("about to softreset\n"); +__raw_writew(ap->ctl, base + 0xe); +udelay(20); +__raw_writew(ap->ctl | ATA_SRST, base + 0xe); +udelay(20); +__raw_writew(ap->ctl, base + 0xe); + +rc = ata_sff_wait_after_reset(link, 1, deadline); +if (rc) { +ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); +return rc; +} + +/* determine by signature whether we have ATA or ATAPI devices */ +classes[0] = ata_sff_dev_classify(&link->device[0], 1, &err); +DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); +return 0; +} + +/** + * Load the taskfile for 16bit non-true_ide only. The device_addr is + * not loaded, we do this as part of octeon_cf_exec_command16. + */ +static void octeon_cf_tf_load16(struct ata_port *ap, +const struct ata_taskfile *tf) +{ +unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; +/* The base of the registers is at ioaddr.data_addr. */ +void __iomem *base = ap->ioaddr.data_addr; + +if (tf->ctl != ap->last_ctl) { +iowrite8(tf->ctl, ap->ioaddr.ctl_addr); +ap->last_ctl = tf->ctl; +ata_wait_idle(ap); +} +if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { +__raw_writew(tf->hob_feature << 8, base + 0xc); +__raw_writew(tf->hob_nsect | tf->hob_lbal << 8, base + 2); +__raw_writew(tf->hob_lbam | tf->hob_lbah << 8, base + 4); +VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", +tf->hob_feature, +tf->hob_nsect, +tf->hob_lbal, +tf->hob_lbam, +tf->hob_lbah); +} +if (is_addr) { +__raw_writew(tf->feature << 8, base + 0xc); +__raw_writew(tf->nsect | tf->lbal << 8, base + 2); +__raw_writew(tf->lbam | tf->lbah << 8, base + 4); +VPRINTK("feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", +tf->feature, +tf->nsect, +tf->lbal, +tf->lbam, +tf->lbah); +} +ata_wait_idle(ap); +} + + +static void octeon_cf_dev_select(struct ata_port *ap, unsigned int device) +{ +/* There is only one device, do nothing. */ +return; +} + +/** + * Issue ATA command to host controller. The device_addr is also sent + * as it must be written in a combined write with the command. + */ +static void octeon_cf_exec_command16(struct ata_port *ap, +const struct ata_taskfile *tf) +{ +/* The base of the registers is at ioaddr.data_addr. */ +void __iomem *base = ap->ioaddr.data_addr; +u16 blob; + +if (tf->flags & ATA_TFLAG_DEVICE) { +VPRINTK("device 0x%X\n", tf->device); +blob = tf->device; +} else +blob = 0; + +DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); +blob |= (tf->command << 8); +__raw_writew(blob, base + 6); + + +ata_wait_idle(ap); +} + +static u8 octeon_cf_irq_on(struct ata_port *ap) +{ +return 0; +} +static void octeon_cf_irq_clear(struct ata_port *ap) +{ +struct octeon_cf_data *ocd = ap->dev->platform_data; +cvmx_mio_boot_dma_intx_t mio_boot_dma_int; +DPRINTK("ENTER\n"); + +mio_boot_dma_int.u64 = 0; + +/* Disable the interrupt. */ +cvmx_write_csr(CVMX_MIO_BOOT_DMA_INT_ENX(ocd->dma_engine), + mio_boot_dma_int.u64); + +/* Clear the DMA complete status. */ +mio_boot_dma_int.s.done = 1; +cvmx_write_csr(CVMX_MIO_BOOT_DMA_INTX(ocd->dma_engine), + mio_boot_dma_int.u64); + +} + +/** + * Get ready for a dma operation. We do nothing, as all DMA + * operations are taken care of in octeon_cf_bmdma_start. + */ +void octeon_cf_qc_prep(struct ata_queued_cmd *qc) +{ +} + +void octeon_cf_bmdma_setup(struct ata_queued_cmd *qc) +{ +struct ata_port *ap = qc->ap; +DPRINTK("ENTER\n"); +/* issue r/w command */ +qc->cursg = qc->sg; +ap->ops->sff_exec_command(ap, &qc->tf); +} +/** + * Start a DMA transfer that was already setup + * + * < at >qc: Information about the DMA + */ +static void octeon_cf_bmdma_start(struct ata_queued_cmd *qc) +{ +struct octeon_cf_data *ocd = qc->ap->dev->platform_data; +cvmx_mio_boot_dma_cfgx_t mio_boot_dma_cfg; +cvmx_mio_boot_dma_intx_t mio_boot_dma_int; +struct scatterlist *sg; + +VPRINTK("%d scatterlists\n", qc->n_elem); + +/* Get the scatter list entry we need to DMA into */ +sg = qc->cursg; +BUG_ON(!sg); + +/* + * Clear the DMA complete status. + */ +mio_boot_dma_int.u64 = 0; +mio_boot_dma_int.s.done = 1; +cvmx_write_csr(CVMX_MIO_BOOT_DMA_INTX(ocd->dma_engine), + mio_boot_dma_int.u64); + +/* Enable the interrupt. */ +cvmx_write_csr(CVMX_MIO_BOOT_DMA_INT_ENX(ocd->dma_engine), + mio_boot_dma_int.u64); + + +/* Set the direction of the DMA */ +mio_boot_dma_cfg.u64 = 0; +mio_boot_dma_cfg.s.en = 1; +mio_boot_dma_cfg.s.rw = ((qc->tf.flags & ATA_TFLAG_WRITE) != 0); + +/* + * Don't stop the DMA if the device deasserts DMARQ. Many compact + * flashes deassert DMARQ for a short time between sectors. Instead of + * stoppng and restarting the DMA, we'll let the hardware do it. If the + * DMA is really stopped early due to an error condition, a later + * timeout will force us to stop. + */ +mio_boot_dma_cfg.s.clr = 0; + +/* Size is specified in 16bit words and minus one notation */ +mio_boot_dma_cfg.s.size = sg_dma_len(sg) / 2 - 1; + +/* We need to swap the high and low bytes of every 16 bits */ +mio_boot_dma_cfg.s.swap8 = 1; + +mio_boot_dma_cfg.s.adr = sg_dma_address(sg); + +VPRINTK("%s %d bytes address=%p\n", +(mio_boot_dma_cfg.s.rw) ? "write" : "read", sg->length, +(void *)(unsigned long)mio_boot_dma_cfg.s.adr); + +cvmx_write_csr(CVMX_MIO_BOOT_DMA_CFGX(ocd->dma_engine), + mio_boot_dma_cfg.u64); +} + +/** + * Get the status of the DMA engine. The results of this function + * must emulate the BMDMA engine expected by libata. + * + * < at >ap: ATA port to check status on + * + * Returns BMDMA status bits + */ +static uint8_t octeon_cf_bmdma_status(struct ata_port *ap) +{ +struct octeon_cf_data *ocd = ap->dev->platform_data; +cvmx_mio_boot_dma_intx_t mio_boot_dma_int; +cvmx_mio_boot_dma_cfgx_t mio_boot_dma_cfg; +uint8_t result = 0; + +mio_boot_dma_int.u64 = +cvmx_read_csr(CVMX_MIO_BOOT_DMA_INTX(ocd->dma_engine)); +if (mio_boot_dma_int.s.done) +result |= ATA_DMA_INTR; + +mio_boot_dma_cfg.u64 = +cvmx_read_csr(CVMX_MIO_BOOT_DMA_CFGX(ocd->dma_engine)); +if (mio_boot_dma_cfg.s.en) +result |= ATA_DMA_ACTIVE; +else if (mio_boot_dma_cfg.s.size != 0xfffff) +result |= ATA_DMA_ERR; + +VPRINTK("%s %s %s\n", +(result & ATA_DMA_INTR) ? "INTRQ" : "", +(result & ATA_DMA_ACTIVE) ? "Active" : "", +(result & ATA_DMA_ERR) ? "ERR" : ""); + +return result; +} + +/** + * Stop a DMA that is in progress + * + * < at >qc: Information about the DMA + */ +static void octeon_cf_bmdma_stop(struct ata_queued_cmd *qc) +{ +struct octeon_cf_data *ocd = qc->ap->dev->platform_data; +cvmx_mio_boot_dma_cfgx_t mio_boot_dma_cfg; +cvmx_mio_boot_dma_intx_t mio_boot_dma_int; + +DPRINTK("ENTER\n"); + +/* Clear out the DMA config */ +mio_boot_dma_cfg.u64 = 0; +mio_boot_dma_cfg.s.size = -1; +cvmx_write_csr(CVMX_MIO_BOOT_DMA_CFGX(ocd->dma_engine), + mio_boot_dma_cfg.u64); + +mio_boot_dma_int.u64 = 0; +/* Disable the interrupt. */ +cvmx_write_csr(CVMX_MIO_BOOT_DMA_INT_ENX(ocd->dma_engine), + mio_boot_dma_int.u64); + +/* Clear the DMA complete status */ +mio_boot_dma_int.s.done = 1; +cvmx_write_csr(CVMX_MIO_BOOT_DMA_INTX(ocd->dma_engine), + mio_boot_dma_int.u64); + +} + +/** + * Check if any queued commands have more DMAs, if so start the next + * transfer, else do standard handling. + */ +irqreturn_t octeon_cf_interrupt(int irq, void *dev_instance) +{ +struct ata_host *host = dev_instance; +struct octeon_cf_port *cf_port; +int i; +unsigned int handled = 0; +unsigned long flags; + +spin_lock_irqsave(&host->lock, flags); + +DPRINTK("ENTER\n"); +for (i = 0; i < host->n_ports; i++) { +struct ata_port *ap; +struct ata_queued_cmd *qc; + +ap = host->ports[i]; +if (!ap || (ap->flags & ATA_FLAG_DISABLED)) +continue; + +qc = ata_qc_from_tag(ap, ap->link.active_tag); +if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && +(qc->flags & ATA_QCFLAG_ACTIVE)) { +u8 status = octeon_cf_bmdma_status(ap); +if ((status & ATA_DMA_INTR) + && !(status & ATA_DMA_ACTIVE) + && !sg_is_last(qc->cursg)) { +qc->cursg = sg_next(qc->cursg); +handled = 1; +octeon_cf_bmdma_start(qc); +} else { +status = ioread8(ap->ioaddr.altstatus_addr); +if (status & ATA_BUSY) { +/* + * We are busy, try to handle + * it later. This is the DMA + * finished interrupt, and it + * could take a little while + * for the card to be ready + * for more commands. + */ +cf_port = (struct octeon_cf_port *)ap->private_data; +tasklet_schedule(&cf_port->delayed_irq_tasklet); +handled = 1; +} else +handled |= ata_sff_host_intr(ap, qc); +} +} +} +spin_unlock_irqrestore(&host->lock, flags); +DPRINTK("EXIT\n"); +return IRQ_RETVAL(handled); +} + +static void octeon_cf_delayed_irq(unsigned long data) +{ +struct ata_port *ap = (struct ata_port *)data; +struct octeon_cf_port *cf_port; +struct ata_host *host = ap->host; +struct ata_queued_cmd *qc; +unsigned long flags; +u8 status; + +cf_port = (struct octeon_cf_port *)ap->private_data; + +spin_lock_irqsave(&host->lock, flags); + +status = ioread8(ap->ioaddr.altstatus_addr); +if (status & ATA_BUSY) { +/* Still busy, try again. */ +cf_port = (struct octeon_cf_port *)ap->private_data; +tasklet_schedule(&cf_port->delayed_irq_tasklet); +goto out; +} + +qc = ata_qc_from_tag(ap, ap->link.active_tag); +if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && + (qc->flags & ATA_QCFLAG_ACTIVE)) +ata_sff_host_intr(ap, qc); +out: +spin_unlock_irqrestore(&host->lock, flags); +} + +static struct ata_port_operations octeon_cf_ops = { +.inherits= &ata_sff_port_ops, +.qc_prep= octeon_cf_qc_prep, +.sff_dev_select= octeon_cf_dev_select, +.sff_data_xfer= octeon_cf_data_xfer, +.sff_irq_on= octeon_cf_irq_on, +.sff_irq_clear= octeon_cf_irq_clear, +.bmdma_setup= octeon_cf_bmdma_setup, +.bmdma_start= octeon_cf_bmdma_start, +.bmdma_stop= octeon_cf_bmdma_stop, +.bmdma_status= octeon_cf_bmdma_status, +.cable_detect= ata_cable_40wire, +.set_piomode= octeon_cf_set_piomode, +.set_dmamode= octeon_cf_set_dmamode, +}; + +static int __devinit octeon_cf_probe(struct platform_device *pdev) +{ +struct resource *res_cs0, *res_cs1; + +void __iomem *cs0; +void __iomem *cs1; +struct ata_host *host; +struct ata_port *ap; +struct octeon_cf_data *ocd; +int irq = 0; +irq_handler_t irq_handler = NULL; +void __iomem *base; +int is_true_ide = 0; +struct octeon_cf_port *cf_port; + +res_cs0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); +res_cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); + +if (!res_cs0 || !res_cs1) +return -EINVAL; + +ocd = pdev->dev.platform_data; + +cs0 = devm_ioremap_nocache(&pdev->dev, res_cs0->start, + res_cs0->end - res_cs0->start + 1); +cs1 = devm_ioremap_nocache(&pdev->dev, res_cs1->start, + res_cs0->end - res_cs1->start + 1); + +if (!cs0 || !cs1) +return -ENOMEM; + +cf_port = kzalloc(sizeof(*cf_port), GFP_KERNEL); +if (!cf_port) +return -ENOMEM; + +/* Determine from availability of DMA if IDE mode or not */ +if (ocd->dma_engine >= 0) +is_true_ide = 1; + +/* allocate host */ +host = ata_host_alloc(&pdev->dev, 1); +if (!host) +return -ENOMEM; + +ap = host->ports[0]; +ap->private_data = cf_port; +ap->ops = &octeon_cf_ops; +ap->pio_mask = 0x7f; /* Support PIO 0-6 */ +ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY + | ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING; + +tasklet_init(&cf_port->delayed_irq_tasklet, octeon_cf_delayed_irq, + (unsigned long)ap); + +base = cs0 + ocd->base_region_bias; +if (!ocd->is16bit) { +ap->ioaddr.cmd_addr= base + ATA_REG_CMD; +ap->ioaddr.data_addr= base + ATA_REG_DATA; +ap->ioaddr.error_addr= base + ATA_REG_ERR; +ap->ioaddr.feature_addr= base + ATA_REG_FEATURE; +ap->ioaddr.nsect_addr= base + ATA_REG_NSECT; +ap->ioaddr.lbal_addr= base + ATA_REG_LBAL; +ap->ioaddr.lbam_addr= base + ATA_REG_LBAM; +ap->ioaddr.lbah_addr= base + ATA_REG_LBAH; +ap->ioaddr.device_addr= base + ATA_REG_DEVICE; +ap->ioaddr.status_addr= base + ATA_REG_STATUS; +ap->ioaddr.command_addr= base + ATA_REG_CMD; +ap->ioaddr.altstatus_addr = base + 0xe; +ap->ioaddr.ctl_addr= base + 0xe; +} else if (is_true_ide) { +ap->ioaddr.cmd_addr= base + (ATA_REG_CMD << 1) + 1; +ap->ioaddr.data_addr= base + (ATA_REG_DATA << 1); +ap->ioaddr.error_addr= base + (ATA_REG_ERR << 1) + 1; +ap->ioaddr.feature_addr= base + (ATA_REG_FEATURE << 1) + 1; +ap->ioaddr.nsect_addr= base + (ATA_REG_NSECT << 1) + 1; +ap->ioaddr.lbal_addr= base + (ATA_REG_LBAL << 1) + 1; +ap->ioaddr.lbam_addr= base + (ATA_REG_LBAM << 1) + 1; +ap->ioaddr.lbah_addr= base + (ATA_REG_LBAH << 1) + 1; +ap->ioaddr.device_addr= base + (ATA_REG_DEVICE << 1) + 1; +ap->ioaddr.status_addr= base + (ATA_REG_STATUS << 1) + 1; +ap->ioaddr.command_addr= base + (ATA_REG_CMD << 1) + 1; +ap->ioaddr.altstatus_addr = cs1 + (6 << 1) + 1; +ap->ioaddr.ctl_addr= cs1 + (6 << 1) + 1; +if (use_cf_dma) { +ap->mwdma_mask= 0x1f;/* Support Multiword DMA 0-4 */ +irq = platform_get_irq(pdev, 0); +irq_handler = octeon_cf_interrupt; +} +} else { +/* 16 bit but not true_ide */ +octeon_cf_ops.softreset= octeon_cf_softreset16; +octeon_cf_ops.sff_check_status= octeon_cf_check_status16; +octeon_cf_ops.sff_tf_read= octeon_cf_tf_read16; +octeon_cf_ops.sff_tf_load= octeon_cf_tf_load16; +octeon_cf_ops.sff_exec_command= octeon_cf_exec_command16; + +ap->ioaddr.data_addr= base + ATA_REG_DATA; +ap->ioaddr.nsect_addr= base + ATA_REG_NSECT; +ap->ioaddr.lbal_addr= base + ATA_REG_LBAL; +ap->ioaddr.ctl_addr= base + 0xe; +ap->ioaddr.altstatus_addr = base + 0xe; +} + +ata_port_desc(ap, "cmd %p ctl %p", base, ap->ioaddr.ctl_addr); + + +dev_printk(KERN_INFO, &pdev->dev, + DRV_NAME " version " DRV_VERSION" %d bit%s.\n", + (ocd->is16bit) ? 16 : 8, + (is_true_ide) ? ", ide" : ""); + + +return ata_host_activate(host, irq, irq_handler, 0, &octeon_cf_sht); +} + +static struct platform_driver octeon_cf_driver = { +.probe= octeon_cf_probe, +.driver= { +.name= "octeon-cf", +.owner= THIS_MODULE, +}, +}; + +static int __init octeon_cf_init(void) +{ +pr_info(DRV_NAME ": OCTEON bootbus compact flash driver\n"); + +return platform_driver_register(&octeon_cf_driver); +} + + +MODULE_AUTHOR("David Daney caviumnetworks.com>"); +MODULE_DESCRIPTION("low-level driver for Cavium OCTEON Compact Flash PATA"); +MODULE_LICENSE("GPL"); +MODULE_VERSION(DRV_VERSION); +MODULE_ALIAS("platform:" DRV_NAME); + +module_init(octeon_cf_init); -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH] ata: Remove inline attribute from ata_sff_host_intr()

David Daney — 2008-11-21T00:39:03

ata: Remove inline attribute from ata_sff_host_intr() ata_sff_host_intr is a public function, it should not be declared inline. Signed-off-by: David Daney caviumnetworks.com> --- drivers/ata/libata-sff.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c index 9033d16..73d7dbb 100644 --- a/drivers/ata/libata-sff.c +++ b/drivers/ata/libata-sff.c < at >< at > -1542,8 +1542,8 < at >< at > bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc) *RETURNS: *One if interrupt was handled, zero if not (shared irq). */ -inline unsigned int ata_sff_host_intr(struct ata_port *ap, - struct ata_queued_cmd *qc) +unsigned int ata_sff_host_intr(struct ata_port *ap, + struct ata_queued_cmd *qc) { struct ata_eh_info *ehi = &ap->link.eh_info; u8 status, host_stat = 0; -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

PATA timeouts on old thinkpad

Russell King — 2008-11-21T00:25:21

Hi, Last weekend I upgraded my old Thinkpad from Fedora Core 2 to F9 (a 2.6.9 kernel to a 2.6.25 kernel). The old 2.6.9 kernel was using the IDE drivers, and there have been no issues with IDE on this hardware until this upgrade. With 2.6.25, I'm randomly seeing: ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x2 frozen ata1.00: cmd ca/00:02:ba:75:05/00:00:00:00:00/e0 tag 0 dma 1024 out res 40/00:03:00:00:00/00:00:00:00:00/b0 Emask 0x4 (timeout) ata1.00: status: { DRDY } ata1: soft resetting link ata1.00: configured for UDMA/33 ata1.01: configured for MWDMA1 ata1.00: configured for UDMA/33 ata1.01: configured for MWDMA1 ata1: EH complete sd 0:0:0:0: [sda] 8007552 512-byte hardware sectors (4100 MB) sd 0:0:0:0: [sda] Write Protect is off sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 0:0:0:0: [sda] 8007552 512-byte hardware sectors (4100 MB) sd 0:0:0:0: [sda] Write Protect is off sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA I've killed off the hald thread responsible for polling the CD drive on ata1.01 just in case it's somehow provoking this, but the timeout continues to happen. There doesn't seem to be any way of predicting these timeouts - it may be as little as half an hour, or as long as a couple of days. boot messages follow: Initializing cgroup subsys cpuset Initializing cgroup subsys cpu Linux version 2.6.25-14.fc9.i586 (mockbuild< at >) (gcc version 4.3.0 20080428 (Red Hat 4.3.0-8) (GCC) ) #1 SMP Thu May 1 05:49:25 EDT 2008 BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 000000000009fc00 (usable) BIOS-e820: 000000000009fc00 - 00000000000a0000 (reserved) BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 0000000003fd0000 (usable) BIOS-e820: 0000000003fd0000 - 0000000003fdf000 (ACPI data) BIOS-e820: 0000000003fdf000 - 0000000003fe0000 (ACPI NVS) BIOS-e820: 00000000fffe0000 - 0000000100000000 (reserved) 0MB HIGHMEM available. 63MB LOWMEM available. Scan SMP from c0000000 for 1024 bytes. Scan SMP from c009fc00 for 1024 bytes. Scan SMP from c00f0000 for 65536 bytes. Scan SMP from c009fc00 for 1024 bytes. Using x86 segment limits to approximate NX protection Entering add_active_range(0, 0, 16336) 0 entries of 256 used Zone PFN ranges: DMA 0 -> 4096 Normal 4096 -> 16336 HighMem 16336 -> 16336 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0 -> 16336 On node 0 totalpages: 16336 DMA zone: 32 pages used for memmap DMA zone: 0 pages reserved DMA zone: 4064 pages, LIFO batch:0 Normal zone: 95 pages used for memmap Normal zone: 12145 pages, LIFO batch:1 HighMem zone: 0 pages used for memmap Movable zone: 0 pages used for memmap DMI 2.0 present. Using APIC driver default ACPI Error (tbxfroot-0218): A valid RSDP was not found [20070126] Allocating PCI resources starting at 10000000 (gap: 03fe0000:fc000000) PM: Registered nosave memory: 000000000009f000 - 00000000000a0000 PM: Registered nosave memory: 00000000000a0000 - 00000000000f0000 PM: Registered nosave memory: 00000000000f0000 - 0000000000100000 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16209 Kernel command line: ro root=/dev/sda2 No local APIC present or hardware disabled mapped APIC to ffffb000 (0108b000) Initializing CPU#0 CPU 0 irqstacks, hard=c07ba000 soft=c079a000 PID hash table entries: 256 (order: 8, 1024 bytes) Detected 232.102 MHz processor. Console: colour VGA+ 80x25 console [tty0] enabled Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) Memory: 57200k/65344k available (2240k kernel code, 7732k reserved, 1121k data, 284k init, 0k highmem) virtual kernel memory layout: fixmap : 0xffc52000 - 0xfffff000 (3764 kB) pkmap : 0xff400000 - 0xff800000 (4096 kB) vmalloc : 0xc4800000 - 0xff3fe000 ( 939 MB) lowmem : 0xc0000000 - 0xc3fd0000 ( 63 MB) .init : 0xc0750000 - 0xc0797000 ( 284 kB) .data : 0xc0630178 - 0xc0748800 (1121 kB) .text : 0xc0400000 - 0xc0630178 (2240 kB) Checking if this processor honours the WP bit even in supervisor mode...Ok. CPA: page pool initialized 1 of 1 pages preallocated SLUB: Genslabs=12, HWalign=32, Order=0-1, MinObjects=4, CPUs=1, Nodes=1 Calibrating delay using timer specific routine.. 465.42 BogoMIPS (lpj=232713) Security Framework initialized SELinux: Initializing. SELinux: Starting in permissive mode selinux_register_security: Registering secondary module capability Capability LSM initialized as secondary Mount-cache hash table entries: 512 Initializing cgroup subsys ns Initializing cgroup subsys cpuacct Intel Pentium with F0 0F bug - workaround enabled. Compat vDSO mapped to ffffe000. Checking 'hlt' instruction... OK. SMP alternatives: switching to UP code Freeing SMP alternatives: 20k freed ACPI: Core revision 20070126 ACPI Exception (tbxface-0629): AE_NO_ACPI_TABLES, While loading namespace from ACPI tables [20070126] ACPI: Unable to load the System Description Tables CPU0: Intel Mobile Pentium MMX stepping 01 SMP motherboard not detected. Local APIC not detected. Using dummy APIC emulation. Brought up 1 CPUs sizeof(vma)=84 bytes sizeof(page)=32 bytes sizeof(inode)=340 bytes sizeof(dentry)=132 bytes sizeof(ext3inode)=492 bytes sizeof(buffer_head)=56 bytes sizeof(skbuff)=176 bytes sizeof(task_struct)=3712 bytes CPU0 attaching sched-domain: domain 0: span 00000001 groups: 00000001 net_namespace: 548 bytes Booting paravirtualized kernel on bare hardware Time: 20:26:17 Date: 11/16/08 NET: Registered protocol family 16 No dock devices found. PCI: PCI BIOS revision 2.10 entry at 0xfd880, last bus=0 PCI: Using configuration type 1 Setting up standard PCI resources ACPI: Interpreter disabled. Linux Plug and Play Support v0.97 (c) Adam Belay pnp: PnP ACPI: disabled usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb PCI: Probing PCI hardware PCI: Probing PCI hardware (bus 00) * Found PM-Timer Bug on the chipset. Due to workarounds for a bug, * this clock source is slow. Consider trying other clock sources pci 0000:00:06.3: quirk: region ef00-ef3f claimed by PIIX4 ACPI pci 0000:00:06.3: quirk: region efa0-efaf claimed by PIIX4 SMB pci 0000:00:06.3: PIIX4 devres C PIO at 15e8-15ef pci 0000:00:06.3: PIIX4 devres E PIO at 0538-053f pci 0000:00:06.3: PIIX4 devres I PIO at 002e-002f PCI: Using IRQ router PIIX/ICH [8086/7110] at 0000:00:06.0 PCI: setting IRQ 11 as level-triggered PCI: Found IRQ 11 for device 0000:00:02.0 PCI: Sharing IRQ 11 with 0000:00:03.0 PCI: Found IRQ 11 for device 0000:00:02.1 NetLabel: Initializing NetLabel: domain hash size = 128 NetLabel: protocols = UNLABELED CIPSOv4 NetLabel: unlabeled traffic allowed by default PCI: Bus 1, cardbus bridge: 0000:00:02.0 IO window: 0x00001000-0x000010ff IO window: 0x00001400-0x000014ff PREFETCH window: 0x10000000-0x13ffffff MEM window: 0x14000000-0x17ffffff PCI: Bus 5, cardbus bridge: 0000:00:02.1 IO window: 0x00001800-0x000018ff IO window: 0x00001c00-0x00001cff PREFETCH window: 0x18000000-0x1bffffff MEM window: 0x1c000000-0x1fffffff PCI: Found IRQ 11 for device 0000:00:02.0 PCI: Sharing IRQ 11 with 0000:00:03.0 PCI: Found IRQ 11 for device 0000:00:02.1 NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 2, 16384 bytes) TCP bind hash table entries: 2048 (order: 2, 16384 bytes) TCP: Hash tables configured (established 2048 bind 2048) TCP reno registered checking if image is initramfs... it is Freeing initrd memory: 2581k freed IBM machine detected. Enabling interrupts during APM calls. apm: BIOS version 1.2 Flags 0x03 (Driver version 1.16ac) audit: initializing netlink socket (disabled) type=2000 audit(1226867180.298:1): initialized Total HugeTLB memory allocated, 0 VFS: Disk quotas dquot_6.5.1 Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) SELinux: Registering netfilter hooks Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered io scheduler cfq registered (default) pci 0000:00:00.0: Limiting direct PCI/PCI transfers pci 0000:00:03.0: Boot video device pci_hotplug: PCI Hot Plug PCI Core version: 0.5 isapnp: Scanning for PnP cards... isapnp: No Plug & Play device found Non-volatile memory driver v1.2 Linux agpgart interface v0.103 Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a NS16550A brd: module loaded input: Macintosh mouse button emulation as /devices/virtual/input/input0 Yenta: CardBus bridge found at 0000:00:02.0 [1014:0092] Yenta: Using CSCINT to route CSC interrupts to PCI Yenta: Routing CardBus interrupts to PCI Yenta TI: socket 0000:00:02.0, mfunc 0xfba97543, devctl 0x62 Yenta: ISA IRQ mask 0x00b8, PCI irq 11 Socket status: 30000006 Yenta: CardBus bridge found at 0000:00:02.1 [1014:0092] Yenta: Using CSCINT to route CSC interrupts to PCI Yenta: Routing CardBus interrupts to PCI Yenta TI: socket 0000:00:02.1, mfunc 0xfba97543, devctl 0x62 Yenta: ISA IRQ mask 0x00b8, PCI irq 11 Socket status: 30000020 PNP: No PS/2 controller found. Probing ports directly. serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input1 cpuidle: using governor ladder cpuidle: using governor menu usbcore: registered new interface driver hiddev usbcore: registered new interface driver usbhid drivers/hid/usbhid/hid-core.c: v2.6:USB HID core driver TCP cubic registered Initializing XFRM netlink socket NET: Registered protocol family 1 NET: Registered protocol family 17 Using IPI No-Shortcut mode registered taskstats version 1 Magic number: 0:729:447 hash matches drivers/base/power/main.c:222 Freeing unused kernel memory: 284k freed Write protecting the kernel read-only data: 908k pccard: CardBus card inserted into slot 1 SCSI subsystem initialized Driver 'sd' needs updating - please use bus_type methods libata version 3.00 loaded. ata_piix 0000:00:06.1: version 2.12 scsi0 : ata_piix scsi1 : ata_piix ata1: PATA max UDMA/33 cmd 0x1f0 ctl 0x3f6 bmdma 0xfcf0 irq 14 ata2: PATA max UDMA/33 cmd 0x170 ctl 0x376 bmdma 0xfcf8 irq 15 ata1.00: ATA-3: IBM-DTCA-24090, TC6IAB4A, max UDMA/33 ata1.00: 8007552 sectors, multi 16: LBA ata1.01: ATAPI: SANYO CRD-S372B, 1.24I, max MWDMA1 ata1.00: configured for UDMA/33 ata1.01: configured for MWDMA1 ata1.00: configured for UDMA/33 ata1.01: configured for MWDMA1 ata1: EH complete ata2: port disabled. ignoring. scsi 0:0:0:0: Direct-Access ATA IBM-DTCA-24090 TC6I PQ: 0 ANSI: 5 sd 0:0:0:0: [sda] 8007552 512-byte hardware sectors (4100 MB) sd 0:0:0:0: [sda] Write Protect is off sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 0:0:0:0: [sda] 8007552 512-byte hardware sectors (4100 MB) sd 0:0:0:0: [sda] Write Protect is off sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda4 < sda5 sda6 sda7 sda8 > sd 0:0:0:0: [sda] Attached SCSI disk scsi 0:0:1:0: CD-ROM SANYO CRD-S372B 1.24 PQ: 0 ANSI: 5 IBM TrackPoint firmware: 0x06, buttons: 2/3 input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/input/input2 ohci_hcd: 2006 August 04 USB 1.1 'Open' Host Controller (OHCI) Driver USB Universal Host Controller Interface driver v3.0 PCI: Found IRQ 11 for device 0000:00:06.2 uhci_hcd 0000:00:06.2: UHCI Host Controller uhci_hcd 0000:00:06.2: new USB bus registered, assigned bus number 1 uhci_hcd 0000:00:06.2: irq 11, io base 0x00009000 usb usb1: configuration #1 chosen from 1 choice hub 1-0:1.0: USB hub found hub 1-0:1.0: 2 ports detected usb usb1: New USB device found, idVendor=1d6b, idProduct=0001 usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb1: Product: UHCI Host Controller usb usb1: Manufacturer: Linux 2.6.25-14.fc9.i586 uhci_hcd usb usb1: SerialNumber: 0000:00:06.2 Driver 'sr' needs updating - please use bus_type methods sr0: scsi3-mmc drive: 8x/24x xa/form2 cdda tray Uniform CD-ROM driver Revision: 3.20 sr 0:0:1:0: Attached scsi CD-ROM sr0 sd 0:0:0:0: Attached scsi generic sg0 type 0 sr 0:0:1:0: Attached scsi generic sg1 type 5 cs: IO port probe 0x210-0x21f: clean. cs: IO port probe 0x170-0x177: clean. cs: IO port probe 0xc00-0xcff: clean. cs: IO port probe 0x300-0x4ff: excluding 0x330-0x337 0x388-0x38f 0x4d0-0x4d7 cs: IO port probe 0xa00-0xaff: clean. cs: IO port probe 0x210-0x21f: clean. cs: IO port probe 0x170-0x177: clean. cs: IO port probe 0xc00-0xcff: clean. cs: IO port probe 0x300-0x4ff: excluding 0x330-0x337 0x388-0x38f 0x4d0-0x4d7 cs: IO port probe 0xa00-0xaff: clean. PCI: Enabling device 0000:05:00.0 (0000 -> 0003) 3c59x: Donald Becker and others. 0000:05:00.0: 3Com PCI 3CCFE575BT Cyclone CardBus at c4836000. PCI: Setting latency timer of device 0000:05:00.0 to 64 input: PC Speaker as /devices/platform/pcspkr/input/input3 piix4_smbus 0000:00:06.3: Found 0000:00:06.3 device piix4_smbus 0000:00:06.3: IBM system detected; this module may corrupt your serial eeprom! Refusing to load module! piix4_smbus: probe of 0000:00:06.3 failed with error -1 device-mapper: uevent: version 1.0.3 device-mapper: ioctl: 4.13.0-ioctl (2007-10-18) initialised: dm-devel< at >redhat.com

[PATCH 00/03] ide misc leftovers

Borislav Petkov — 2008-11-20T05:41:20

Hi Bart, here is Linus' reworked ide-floppy reduce-stack-usage patch. It has been tested here on current pata tree with your latest 3 patches adding the per-device request queue locks. Along with that are 2 small cleanups. drivers/ide/ide-cd.c | 8 +++++ drivers/ide/ide-cd.h | 8 ----- drivers/ide/ide-floppy.c | 26 +++++++++--------- drivers/ide/ide-floppy_ioctl.c | 58 +++++++++++++++++++-------------------- include/linux/ide.h | 48 ++++++++++++++++---------------- 5 files changed, 73 insertions(+), 75 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo< at >vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Oops/Warning report for the week of November 19th, 2008

Arjan van de Ven — 2008-11-19T16:01:06

This week, a total of 4488 oopses and warnings have been reported, compared to 3926 reports in the previous week. (Reports prior to 2.6.26 have been omitted in collecting the top 10) I'd like to point specifically at numbers 7 and 8 this week, they are new in the top 10 out of nowhere... Per file statistics 463external/virtualbox/module 399kernel/power/main.c 324drivers/net/r8169.c 235fs/jbd/journal.c 164drivers/net/sis900.c 152drivers/parport/procfs.c 150drivers/ata/libata-sff.c 99drivers/net/wireless/iwlwifi/iwl-tx.c 97drivers/base/power/main.c 90net/sched/sch_generic.c 77drivers/net/wireless/iwlwifi/iwl-3945-rs.c 75kernel/timer.c Fix availble ------------ Rank 4: journal_update_superblock (warning) Reported 239 times (6187 total reports) Likely caused by the user removing a USB stick while mounted Fix available in the -mm tree This warning was last seen in version 2.6.27.5, and first seen in 2.6.24-rc6-git1. More info: http://www.kerneloops.org/searchweek.php?search=journal_update_superblock Rank 6: parport_device_proc_register (warning) Reported 143 times (5957 total reports) Duplicate /proc registration in the parport driver Alan has a patch that fixes most cases This warning was last seen in version 2.6.27-rc7-git1, and first seen in 2.6.24-rc5. More info: http://www.kerneloops.org/searchweek.php?search=parport_device_proc_register Rank 14: ext3_commit_super (warning) Reported 45 times (1555 total reports) Likely caused by the user removing a USB stick while mounted A fix for this issue is in the -mm tree This warning was last seen in version 2.6.27.6, and first seen in 2.6.24. More info: http://www.kerneloops.org/searchweek.php?search=ext3_commit_super Not yet fixed ------------- Rank 1: VBoxDrvLinuxIOCtl (warning) Reported 460 times (747 total reports) [external] bug in the VirtualBox drivers This warning was last seen in version 2.6.28-rc3, and first seen in 2.6.25.11. More info: http://www.kerneloops.org/searchweek.php?search=VBoxDrvLinuxIOCtl Rank 2: suspend_test_finish (warning) Suspend resume test finds drivers that take too long. Linus merged a patch to show which driver it was recently. Reported 408 times (874 total reports) This warning was last seen in version 2.6.28-rc1, and first seen in 2.6.27-rc0-git14. More info: http://www.kerneloops.org/searchweek.php?search=suspend_test_finish Rank 3: dev_watchdog(r8169) (network timeout) Reported 326 times (1113 total reports) This driver has been consistently high in the reports This timeout was last seen in version 2.6.28-rc2-git7, and first seen in 2.6.26.6. More info: http://www.kerneloops.org/searchweek.php?search=dev_watchdog(r8169) Rank 5: dev_watchdog(sis900) (warning) Reported 166 times (1337 total reports) This warning was last seen in version 2.6.27.5, and first seen in 2.6.26-rc4-git2. More info: http://www.kerneloops.org/searchweek.php?search=dev_watchdog(sis900) Rank 7: __atapi_pio_bytes (warning) Reported 108 times This is a new entry this week that started showing up This warning was last seen in version 2.6.27.5, and first seen in 2.6.27.4. More info: http://www.kerneloops.org/searchweek.php?search=__atapi_pio_bytes Rank 8: iwl_tx_cmd_complete (warning) Reported 99 times (240 total reports) This appears to be a recent regression in the iwlwifi driver This warning was last seen in version 2.6.28-rc4, and first seen in 2.6.27-rc9. More info: http://www.kerneloops.org/searchweek.php?search=iwl_tx_cmd_complete Rank 10: rs_get_rate (warning) Reported 78 times (894 total reports) Bug in the Intel IWL wireless drivers This warning was last seen in version 2.6.27.5, and first seen in 2.6.25-rc2-git5. More info: http://www.kerneloops.org/searchweek.php?search=rs_get_rate Rank 11: run_timer_softirq (soft lockup) Reported 62 times (834 total reports) The hope is that the timer rework in 2.6.28 fixes these This oops was last seen in version 2.6.27.5, and first seen in 2.6.25. More info: http://www.kerneloops.org/searchweek.php?search=run_timer_softirq Rank 12: device_pm_add (warning) Reported 61 times (840 total reports) This got "fixed" by removing the warning This warning was last seen in version 2.6.27-rc4, and first seen in 2.6.26-rc5. More info: http://www.kerneloops.org/searchweek.php?search=device_pm_add Rank 13: dev_watchdog(cdc_ether) (oops) Reported 59 times (206 total reports) This oops was last seen in version 2.6.27.6, and first seen in 2.6.26.6. More info: http://www.kerneloops.org/searchweek.php?search=dev_watchdog(cdc_ether)

PHP購物車資料庫網站專案

周佳政 — 2008-11-19T04:55:30

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