http://blog.gmane.org/gmane.comp.graphics.opengraphics hourly 1 1901-01-01T00:00+00:00 http://gmane.org/img/gmane-25t.png http://gmane.org http://comments.gmane.org/gmane.comp.graphics.opengraphics/9523 <pre>I know graphics architecture, and I know how to do all the math. But, oddly, I've never actually used a 3D API like OpenGL, Direct3D or Java3D. Well, I'm trying to write a demo for a paper I'm presenting at HPCA, and I've run into something odd. I was hoping some with actual front-end experience might be able to help me. I figured since this is a graphics mailing list, this wouldn't be horribly off topic. I'm using Java3D to render a scene with lots of translucent planes. If I make everything opaque, it's fine, because it's doing Z culling. But I'm finding that the rendering order isn't near-to-far, as I expected, but something perhaps related to the order in which I created the scene elements. As a result, when I turn on alpha blending, it looks horrible. I'm starting to worry that what I'm going to have to do is do all my coordinate transforms up-front (rather than create a transform group and transform the group), then sort by Z order, then add them to the scene (and by trial and error determine whether it renders first-to-last or last-to-first). But I'm wondering if there isn't a better way. Also, this makes me wonder... if you're a game designer, and you want translucency, does the game engine have to order the scene from back to front so that the alpha blending happens in the right order? Or is Java3D stupid and Direct3D and OpenGL handle this more intelligently? Thanks! </pre> Timothy Normand Miller 2012-01-18T02:31:29 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9520 <pre>Now that opengraphics.org has been transferred to Yann, we'd like to offer "&lt; at &gt;opengraphics.org" email addresses. For now, just forwarding. Should we make this open to just anyone? Or should we take nominations for people who have been long-time contributors, so that there's some specialness or exclusivity to it? :) </pre> Timothy Normand Miller 2011-11-23T16:56:28 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9517 <pre>With my Ph.D. and family taking up most of my time right now, I haven't gotten to work on OGP much. But I haven't forgotten about it. For my consulting work, I had to learn Java to write a cross-platform app. Separately, just as a way to further develop my skill, I wrote this unrelated program: https://sourceforge.net/projects/minuteman/ That's gotten me set up to work on what I REALLY wanted to do, which is an IDE for chip design. I mentioned this a long time ago. One of the problems with coding HDLs is the massive amount of error-prone coding you have to do just to stitch modules together. Get one wire the wrong size, and you get misbehavior that causes to develop more gray hairs. If this could be done graphically, we could save a lot of time and pain. There are also lots of "standard" modules that can be just pasted in and hooked up (fifes and various types of pipeline stage templates come to mind). I don't get much time to work on it, so I haven't gotten very far. But here's a screenshot: http://www.cse.ohio-state.edu/~millerti/HIDE-screenshot.png When I have it to a point where it's really worth looking at, I'll check the project into Sourceforge. </pre> Timothy Normand Miller 2011-11-16T21:02:27 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9515 <pre>We're having some problem with our registrar, and the opengraphics.org domain is going to expire. Would anyone be willing to re-register the domain with another registrar after that? </pre> Timothy Normand Miller 2011-11-16T05:51:52 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9512 <pre>We need a new wiki maintainer/editor. Would someone be willing to do some minor edits and spam removal while we're in a holding pattern? I'll have my Ph.D. done early next year, and Andre should have his project going sooner or later. So it'll pick up again. I've also been doing some circuit design on the side here and there. So OGP isn't dead, but prominent members have been pulled in too many directions for the time being. Thanks. </pre> Timothy Normand Miller 2011-10-03T16:36:00 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9505 <pre>How important are denormalized floats in GPUs? For graphics, I would expect very little. For GPGPU, it might matter. The reason I ask pertains to floating point multiplies. If you want to multiply by denormalized numbers, then the number of bits you have to process may be more. Let's think about what kinds of results you can get from a multiply and how this applies to shifting. If you multiply any two denormalized numbers, you'll get an underflow simply because of the exponent. If you multiply any two normalized numbers, then the smallest result (ignoring the exponent) is 1.0, requiring no shift or adjustment to the exponent. The largest result you can get is 3.999..., which requires the exponent (the sum of the operand exponents) to be increased by 1 and the mantissa to be shifted right by 1. (But to be clear, since these are 24-bit numbers, their product is 47 bits, and you have to discard the lower 23 bits (with rounding) to get back to 24. Then you may shift some more.) If you multiply a normalized number by a denormalized number, then things get complicated. To get the most accurate possible result, you have to look at all 47 bits of the raw product and attempt to shift left to normalize. For OGP, we care more about graphics, so we could just not bother. If we get a denormal, we special-case it or feed the pipeline so that it naturally gives us a zero result. Sugestions? Thoughts? On a related note, I was reading about modern CPU handling of denormalized floats. On Nehalem and most other processors, denormalized numbers cause the FPU to drop to microcode, making operations hundreds of times slower. On Sandy Bridge, there is no such penalty. (One of the many interesting enhancements from Sandy Bridge that Intel's enigmatic marketing department decided not to take advantage of.) </pre> Timothy Normand Miller 2011-08-25T19:55:14 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9497 <pre>it looks like xilinx may have laid the golden goose - can i ask people here to help evaluate this: http://www.xilinx.com/products/silicon-devices/epp/zynq-7000/index.htm that's an incredible combination of a state-of-the-art FPGA, about the same capabilities of a Spartan 3 4000, with an on-board 800mhz Dual-Core Cortex A9. the existing interfaces include some quite basic ones that should be expected - USB2, I2C, CAN-bus, RS232 and so on, but then also include 2 Gigabit Ethernet and, in the case of the 7030 and 7040, multi-lanes of PCI-e (between 4 for the smaller versions at 468 pins, and 12 for the absolute largest 900-pin monster) now, the possibilities for this kind of combination are very, very exciting. 1) as there are no proprietary hard macro cells such as 3D Graphics or MPEG engines, the CPU will undoubtedly be FSF Hardware-Endorsement Compliant. 2) (someone please check!) i believe that the capabilities of the 7030 version should be sufficient to take over from the Spartan 3 4000, meaning that it could, in combination with the NEON instruction set, actually be the next OGP hardware IC 3) with some care on the design, i believe it may be possible to create a module which is, itself, a stand-alone computer yet that exact same module could also plug into an OGP PCI-e card. so, the irony is that if you ever got fed up with the amount of power that the desktop computer into which an OGP module using the Zynq-7000 was plugged, you could take that module out and use the module *as* the desktop computer :) i'll do up some block diagrams and post them later, but i wanted to ask: would something like this be of interest to anyone (hybrid multi-purpose module)?  and, if so, what would you be prepared to pay, to make sure it happened?  let's assume it comes with 1gb of DDR3 ECC RAM. l. </pre> Luke Kenneth Casson Leighton 2011-08-20T17:32:23 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9482 <pre>For those who are not in open-hardware list.. I haven't received any response in three weeks :) Hi all, I would like to ask for suggestions about my idea for a modular (FPGA) development system. As I am designing new devices and the resources for the prototype are not always known, it is hard to decide how much is enough (of gates, ram, ram type, etc). I know that the design can be tested on development boards, but I am doing quite specific things and in a way that I try to get the shape of the thing first and code it later. And the limiting factor of a development kit is that it has usually only one slot for extension. As a result, I came to an idea of a very modular development system - where each building block can be replaced or multiplied for higher parallelism. Basically I take an FPGA, and put around it four plugs - which mate to little boards serving as interconnect. The device boards have just one plug (the same as an fpga). The plugs are board-to-board ones, with 80 terminals and the reason for use of that much plugs is: 1) fpga board can be reused in custom backplane 2) interconnect can be direct or with series resistors 3) boards are in one plane, allowing infinite extension To make the system user friendly when used in large scale, each board contains a microprocessor (and optional flash) which does these tasks: a) provides board identification data (s/n, model, wiring) b) identification of neighbor tiles c) command routing in a grid of connected tiles d) power on/off e) fpga reinitialization f) initialization hold when tiles were changed g) sideband communication (1wire/serial/i2c/spi) to chips The (g) point is important as it can be used to modify registers or access parameters in a channel independent from the developed application. When not needed, interfacing can be tri-stated and the control is on the application. From the identification data, it is possible to create a template for the developer with vhdl entities, so the development is quicker by not using the pin-editor. The interface is made in a way that the adjacent tiles can be inserted in a JTAG chain without use of jumpers. The whole system is then controlled from a special board, featuring an JTAG and management interface to a PC via USB. I was thinking about powering the system with 12V/2A (for switch mode psu's) and 5V/1A (for low noise LDOs), with separate management power (3.3V). The devices usually provide the interface voltage to the fpga side (vccio). There are 48 i/o signals per interface, grouped 16-8-8-16 and to be routed in pairs for differential signaling. Low pin count devices and low speed devices can be connected e.g. to a break-out board. The basic unit is 60x60 mm, with near 40mm wide connector, usually the 10mm border is used for the interface plug. Does anybody have questions or suggestions what to change? Or know a system which already has these properties? Thanks, Daniel </pre> Ing. Daniel Rozsnyó 2011-08-18T15:22:18 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9477 <pre>Hello everyone, I'd like to ask you how remote the possibility is of totally cost-free (free as in beer), open source hardware, just like in FOSS. Now, I know that there are communities focused on the business model aspects of OSH, but I'd also very much appreciate the opinions of engineers, manufacturers and developers from various projects. Thanks in advance, Ilias K. Yet another CS graduate </pre> Ilias K. 2011-08-18T02:03:53 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9472 <pre>hey, all, does anyone know the SVN repository still works or not? suppose it should be this one: https://svn.suug.ch/repos/opengraphics/main thanks, /xiaohan </pre> Ma, Xiaohan 2011-08-15T05:32:07 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9464 <pre>Hi, is the rasterizer as described in open_graphics_outline.pdf implemented? I'm aware of ogp/trunk/rtl/ogengine/rasterizer but I can't see code that shows how to communicate with the device. I would like to draw some lines on the screen. Regards, Martin </pre> Martin Kielhorn 2011-06-28T17:06:49 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9454 <pre>Hi list, is it possible to synchronise the drawing process to the vsync cycle of the graphics card from user level? Or should I try to modify driver/linux/ogp_skel.c to my needs? I want to have a program that consecutive draws numbers on the framebuffer, so that every frame displays the following integer. Then I want to use a camera to capture these images. I had a really hard time when I tried to do this with Nvidia or ATI cards and I think I still haven't solved it. Regards, Martin </pre> Martin Kielhorn 2011-06-28T10:35:59 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9450 <pre>Hi, I have a problem in the sense that the 1280x1024-32&lt; at &gt;60Hz mode isn't really 60Hz. The screen says the VSYNC rate is 47Hz. The Samsung screen actually displays the test picture, but the ForthDD display that I need to get running, doesn't work. Hopefully someone on this list can shed some light on this. I uploaded two screenshots of a tool that came with the ForthDD display http://imgur.com/a/a4f6p The top one is with the Nvidia card and the bottom one with the open graphics hardware. The OGD1 tool prints this: Requested clock = 216180000 Actual clock = 214285680 (difference = 1894320) That means the actual clock is 0.8% off, that doesn't explain the 47Hz VSYNC rate that the screens report Appart from the frequencies I see differences in the IFM_PIX_SYS_RATIO and the tick at 'h+ sync'. This is the output of oga1-vide-test: cyberpower:/opt/ogp/bin# ./oga1-vid-test --busid 0b:1.0 oga1_i2c_get_edid: Reading EDID for top head. manufacturer ID = "FDD" product=4868 sn=16777216 (2002 week 16) EDID version 1.3 Display is digital Digital interface: DVI Color Bit Depth is undefined image size 32x24 display gama 1.000000 Power management: Color encoding : RGB 4:4:4:4 &amp; YCrCb 4:4:4 Features: (default GTF supported) Chromaticity Coordinates: Red: 280:15c 0.625000:0.339844 Green: 129:26c 0.290039:0.605469 Blue: 09a:048 0.150391:0.070312 White: 122:130 0.283203:0.296875 Established Timings: Standard Timing: 0: 1280x1024 &lt; at &gt; 60 Hz 1: 1280x1024 &lt; at &gt; 75 Hz 2: 1280x1024 &lt; at &gt; 85 Hz 3: 1024x768 &lt; at &gt; 85 Hz Descriptor 0: pixel clock = 108090 KHz H active 1280 H blanking 408 V active 1024 V blanking 42 H sync offset 48 H sync width 112 V sync offset 1 V sync width 3 H image size 320mm V image size 240mm H border 0 V border 0 flags 1e Descriptor 1: (FF) Serial Number ;=?A Descriptor 2: (FE) ASCII string SXGA I/F Descriptor 3: (FE) ASCII string SXGA 00 ff ff ff ff ff ff 00 18 84 04 13 00 00 00 01 0c 10 01 03 81 20 18 00 09 04 88 a0 57 4a 9b 26 WJ &amp; 12 48 4c 00 00 00 81 80 81 8f 81 99 61 59 01 01 HL aY 01 01 01 01 01 01 39 2a 00 98 51 00 2a 40 30 70 9* Q *&lt; at &gt;0p 13 00 40 f0 10 00 00 1e 00 00 00 ff 00 3b 3d 3f &lt; at &gt; ;=? 41 0b 0a 0a 0a 0a 0a 0a 0a 0a 00 00 00 fe 00 53 A S 58 47 41 20 49 2f 46 0a 20 20 20 20 00 00 00 fe XGA I/F 00 53 58 47 41 0a 20 20 20 20 20 20 20 20 00 62 SXGA b oga1_i2c_get_edid: Reading EDID for bottom head. oga1_i2c_get_edid: failed to read byte 0. Looking for mode: ddc Requested clock = 216180000 Actual clock = 214285680 (difference = 1894320) Dividers = sel:1 pre:35 post:1 Setting Up DVI on top head. oga1_dvi_init_single_link: pixel clock = 108090000 Loading Video Program on top head (1280x1024&lt; at &gt;60). start=0x8000000 pitch=1280 hres=1280, hfp=48, hsync=112, hbp=248 [408] vres=1024, vfp=1, vsync=3, vbp=38 [42] pix-clock=108090000 digital hsync-low vsync-high oga1_set_video_mode: digital 1 dvi_sl 1 vid_mode 5 oga1_set_video_mode: pixel_info = d output_mode = 1 00987654 00123456 I checked that the nvidia tool reports exactly the same EDID information. </pre> Martin Kielhorn 2011-06-27T10:10:30 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9447 <pre>Hi, here I document my first steps with the OGD1 board. My setup: I am interested in an application where every second frame of a graphics card is captured by a camera. The camera is triggered by the VSYNC signal of the graphics card and the exposure time is approximately 15ms. I use a cheap logic analyzer to verify that the trigger pulses are correct. The graphics card is connected to a ferro electric liquid crystal display (http://www.forthdd.com, ca. 3000 USD, WXGA R3, 1280x768, 60 Hz) which acts like a normal digital LCD screen with DVI but displays each frame as 24 black and white bit planes. My motivation: I tried to control the display with the proprietary Linux drivers of a Nvidia GeForce 9600 GT as well as an ATI Mobility Radeon HD 4200 and ran into problems with sync to vblank. I always observe image tearing, no matter what I try. My goal is to understand enough of the OGD1 to produce animations without image tearing. Installation: First I had to find an old graphics card and scavanged its panel because our OGD1 came without one. Then I placed the OGD1 into a PCI slot next to the Geforce 9600 GT. Its a tight fit because the OGD1 has some extra PCI-X that hang over the PCI slot. Fortunately the motherboard has enough space behind the PCI slot. This is what the output of 'lspci' for the OGD1 card: lspci -vv 0b:01.0 VGA compatible controller: Tech-Source Device 0000 (prog-if 00 [VGA controller]) Subsystem: Tech-Source Device 0000 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=slow &gt;TAbort- &lt;TAbort- &lt;MAbort- &gt;SERR- &lt;PERR- INTx- Interrupt: pin A routed to IRQ 5 Region 0: Memory at dffc0000 (32-bit, prefetchable) [disabled] [size=256K] Region 1: Memory at c0000000 (32-bit, prefetchable) [disabled] [size=256M] Expansion ROM at d0000000 [disabled] [size=128K] Then I checked out the projects repository: svn co svn://svn.opengraphics.org/ogp I was able to compile the programs in ogp/trunk/tools/oga1_diag. I tried to run regtest_xp10 but got the error "Cannot get list of legal device IDs". This error was due to a missing file. I got rid of it by doing echo "1227 1227" &gt; ogp/trunk/tools/oga1_diag/vendorids.ini Now the regtest_xp10 program seems to work: martin&lt; at &gt;cyberpower:~/src/ogp/trunk/tools/oga1_diag$ sudo ./regtest_xp10 0b:01.0 Vendor ID: 0x1227 SubVendor ID: 0x1227 Mapped reg space phy=0xdffc0000, size=0x40000, virt=0x7fe75a6c5000 Mapped mem phy=0xc0000000, size=0x10000000, virt=0x7fe74990b000 0x7fe75a6c5000 262144, 0x7fe74990b000 268435456 Test Register Read = deadbeaf Than I ran the following program, which crashed the computer. martin&lt; at &gt;cyberpower:~/src/ogp/trunk/tools/oga1_diag$ sudo ./vid_test 0b:01.0 Vendor ID: 0x1227 SubVendor ID: 0x1227 Mapped reg space phy=0xdffc0000, size=0x40000, virt=0x7f27b0634000 Mapped mem phy=0xc0000000, size=0x10000000, virt=0x7f279f87a000 0x7f27b0634000 262144, 0x7f279f87a000 268435456 Reading EDID for Top Head. 00 ff ff ff ff ff ff 00 18 84 04 13 00 00 00 01 0c 10 01 03 81 20 18 00 09 04 88 a0 57 4a 9b 26 12 48 4c 00 00 00 81 80 81 8f 81 99 61 59 01 01 01 01 01 01 01 01 39 2a 00 98 51 00 2a 40 30 70 13 00 40 f0 10 00 00 1e 00 00 00 ff 00 3b 3d 3f 41 0b 0a 0a 0a 0a 0a 0a 0a 0a 00 00 00 fe 00 53 58 47 41 20 49 2f 46 0a 20 20 20 20 00 00 00 fe 00 53 58 47 41 0a 20 20 20 20 20 20 20 20 00 62 Reading EDID for Bottom Head. ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Unfortunately I'm not anywhere near the computer, so I have to stop now. I'm excited to see if I can get the OGD1 to work. The results so far seem quite promising. Regards, Martin </pre> Martin Kielhorn 2011-06-25T01:14:28 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9443 <pre>Hi, is it possible to use the OGD1 board in a system with PCI express? Can anyone recommend an adapter from PCI-e to PCI-x. </pre> Martin Kielhorn 2011-06-20T11:33:13 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9441 <pre>There are still 12 OGD1 boards that remain "in stock." Since some of the original production run have been sold, we need to hold onto a few for warranty purposes. But basically, we can lend and sell most of the rest. We made these cards so that people could use them, preferably for projects that help the cause of Open Graphics and Open Hardware in general. So let's see if we can avoid having them sit on the shelf. They're available for purchase for $750. And if you can make a case regarding past and/or future contributions to the community, then you can petition to have one "lent" to you. BTW, Michael Dexter will make the final decisions on who gets a card. If you want one, keep your application concise. I'd like suggestions on how we might reach the right people. Obviously, if you're on this mailing list, you have some advantages. </pre> Timothy Normand Miller 2011-06-17T17:23:53 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9433 <pre>Hi, I have a problem. If you can help that would be of great help. I'm an undergraduate student. I'm implementing pci protocol for my project in the uni. Aim: My pcb has to communicate with a pcb (contains Intel microcontroller + pci bridge) via pci protocol. In my pcb the microcontroller is Renesas (V850) and it doesn't have a pci controller. I did not use any standalone pci controllers in my pcb. I do not know if it's possible to implement the pci config space registers in my microcontroller. I do not have DeviceID and I suppose I can use any random number. Also, the Intel pcb is not reprogrammable. All I have to do now is to implement config space in my device and power on and check if the device is getting detected. For this the Master (Intel pcb) has to read the config space and send IDSEL signal. I'm going through the verilog code of the admin in this forum. The verilog code given in Opencores forum is very complicated and I'm not using wishbone. I want to map the device to memory space and did not understand the exact implementation of BAR. Can you please give a snippet of code for implementing the config space? Thanks &amp; regards S Jamadhagni </pre> Sanjeev Jamadhagni 2011-05-29T18:29:52 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9432 <pre>Hello, I think you guys have done an amazing work but the opengraphics project is looking stagnant, maybe dead. I have experience making engineering products and sooner or later you always need the same thing: someone buying your products. It seems you have very good engineers working on a hard problem but you dismissed the "marketing" thing, so I'm going to put out here some ideas about what could make ogp to success. I know ogp is your baby but please don't feel bad about this email, but as the feedback it is. As much as people like me like the idea behind ogp nobody I know could justify spending money on it because it does better than anyone else ...err... nothing. I know what you are thinking: We are competing with Nvidia or AMD, we can't be better than them!! but yes you can be better the same way that Andruino is better than anybody else in what it does. Ogp had tried to compete doing fixed pipeline OpenGL, this is not even the present, it is past, every single GPU maker is making it more and more flexible with OpenCL and shaders; OGL ES eliminates fixed functions altogether. And it represents years of hard work nobody notices until they try to replicate it. Once you are done you could play doom with it...but today everybody has installed a proprietary card that works so much better, nouveau drivers are starting to work well with 3D support(they had already done the most difficult work so they will work very well on the coming months). Marketting talk(engineering guys hate this): The first thing a company needs to find is a niche she can serve better than anybody else, a concrete need that being open she could satisfy while either Nvidia, Intel or AMD couldn't, and that is what ogp could thrive doing. About the rest, well, forget about it, it will come when you can serve your niche and evolve. What could you do? First pick a levered play field. If you compete pick something new that any company is new at. I suggest a very basic OpenCL implementation with a very basic OpenGL support for vertex and pixel buffers, no shader support(OpenCL can do whatever shaders can) . 90% of OpenGL is going to become obsolete in the near future. Nvidia, AMD and OpenVK are kings on games, so focus on the market of "doing something useful with a GPU" for companies, Universities or individuals that open source is unrivaled for. Linux is used on phones or TVs for a reason, you can do whatever you want with it without messing with NDAs, trade secrets, politics, or asking permission. Governments and companies love it because it eliminates friction(time, resources) and cost and improves privacy and security(they know what is executing in the computer and they can fix it their selves). You have already done a lot of the necessary work. You do not need to make the Opencl kernel functions yourself, if you create a basic OpenCL implementation that does simple operations on buffers someone else will fill the gaps(people only use a few of them, and they are easy(but boring and takes time,so it is ideal work for the community to do) to do). Something as simple as that is terrible useful if it is open, even as simple as adding multiplying and subtracting and dividing numbers. I have used FPGAs for that, but they had terrible support for Linux and mac, and were very rigid. But please create something useful for something, even if it small or incomplete, or the company and all the effort you had done will die. Today from my perspective ogp does not look useful for any real application. The only thing that is fixed in current GPUs is vertex rasterisation so ogp could be the only GPU that lets you program it on the FPGA. Make it your strength not your weakness, let people mess with it. One size doesn't fill all in reality, companies like CAD software makers or movie studios need to control exactly whatever they draw on the screen-picture so they control the quality. On some cases they could win orders of magnitude of performance if they control it too as the usual GPU default approach uses brute force subdivision and filtering, and they know how to program shaders so OpenCL is very easy for them to use(and they can reuse their own code). Don't try to compete in what makes graphic cards vendors great, focus on what you already have and use for your advantage, like the FPGA flexibility. OpenCL support for Linux or macOSX is not that great, for Nvidia you have Parallel Nsight only for Visual Studio. You can make ogp great for people that wants parallel processing for speech, image or video recognition and generation, robot control or sensibility(like parallel touch info) just adding OpenCL... but does not want all the overhead the graphic card brings, maybe even easily deactivating the visual output if not needed in the application. If an openhardware solution exist, someone will create a good program to debug the GPU kernels that today is a mess because GPU info is proprietary. If you ask companies like google I bet they already have a lot of parallel problems to solve, and they are interested in controlling it with hardware they could tune their selves like they do with linux Android with the GPU. They have the money that you need so much so it could be a good idea partnering with them. Bye </pre> Jose Hevia 2011-05-26T20:37:45 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9429 <pre>Dear OGP members, Andre Pouliot and I have been strugging with the problem of how to make the OGP productive again. The OGP has made a lot of accomplishments, but activity has been dead for quite a while now. We believe that part of the problem has been how we tried to go about funding development. It was all wrong, because we shot too high with OGD1, and we couldn't afford to go into production until after interest had waned considerably. Some serious restructuring is necessary, and we've been working on a plan for that. In short, we need a way to create cash flow to fund hardware production, and we believe we have come up with a solution that includes every contributor in both the design and economic aspects. We will spread out the cost burden, spread out the profit among contributors, and invest in less ambitious projects, with broader appeal. At the moment, the plan is about 75% baked, and we want to make sure it's very clear and logical before we publish it. For that, we'd like some feedback from a small number of people who would be willing to look at it in confidence. Once it's finalized, we'll publish it. The next problem is that we need a web site upon which we can implement some of the automated aspects of this plan. Here, we lack expertise. Even before that, we will need to have the front page up, with basic information. So, in short, we're asking for these kinds of volunteers: - Planners and architects willing to carefully consider the plan we're writing up and assist with expressing it well. - Web designers willing to construct and maintain the web site, ultimately implementing the heart of the plan in software. BTW, we need a small number at first to look at the plan. We need to avoid having too many cooks in the kitchen. We want an idea that's good, not one that's perfect. Too much feedback, and it'll never get off the ground. That's why we're not publishing openly early. </pre> Timothy Normand Miller 2011-05-16T19:02:18 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9428 <pre>Due to the recent increase in spam, the wiki has had a tweak regarding passwords. Existing passwords will not be affected, though you may notice it when you update an expired password. We will keep an eye on things and adjust as we need to. thanks JHB ps Due to my time restrictions, we could do with a volunteer to assist the current wiki admin. </pre> Josephblack 2011-05-15T11:17:14 http://comments.gmane.org/gmane.comp.graphics.opengraphics/9425 <pre>Looks like some folks are trying to build an open source CPU. Is this just for the extremists, or are commercial CPUs insufficiently documented?  I haven't heard of any problems. http://hardware.slashdot.org/story/11/04/30/172214/Help-Build-the-Worlds-First-Community-Funded-CPU-ASIC The problem area is GPU video decoding.  AMD/ATI has yet to release any docs on UVD, and judging from Bridgman's postings I don't expect any anytime soon, if ever.  :-( So, what's going on regarding the OGC project? </pre> Dieter BSD 2011-04-30T20:01:21 Search the mailing list at Gmane query http://search.gmane.org/?group=$group=gmane.comp.graphics.opengraphics