gmane.comp.boot-loaders.u-boot

[PATCH] Kirkwood: declare mpp config static and const

Michael Walle — 2012-05-26T00:27:01

Change the prototype of kirkwood_mpp_conf() from
  void kirkwood_mpp_conf(u32 *mpp_list)
to
  void kirkwood_mpp_conf(const u32 *mpp_list)

Now we can declare the kwmpp_config static and const where possible.

Signed-off-by: Michael Walle <michael< at >walle.cc>
Cc: Prafulla Wadaskar <prafulla< at >marvell.com>
Cc: Simon Guinot <simon.guinot< at >sequanux.org>
Cc: Jason Cooper <u-boot< at >lakedaemon.net>
Cc: Siddarth Gore <gores< at >marvell.com>
Cc: Eric Cooper <ecc< at >cmu.edu>
Cc: Stefan Herbrechtsmeier <stefan< at >code.herbrechtsmeier.net>
Cc: Valentin Longchamp <valentin.longchamp< at >keymile.com>
---

This was spotted by Mike in an earlier patch series (Kirkwood: add lschlv2
and lsxhl board support). Declaring the mpp_config static avoids generating
the array on the stack.
This was compile tested on all kirkwood boards and tested on the lschlv2.


 arch/arm/cpu/arm926ejs/kirkwood/mpp.c           |    2 +-
 arch/arm/include/asm/arch-kirkwood/mpp.h        |    2 +-
 board/LaCie/net2big_v2/net2big_v2.c             |    2 +-
 board/LaCie/netspace_v2/netspace_v2.c           |    2 +-
 board/Marvell/dreamplug/dreamplug.c             |    2 +-
 board/Marvell/guruplug/guruplug.c               |    2 +-
 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c |    2 +-
 board/Marvell/openrd/openrd.c                   |    2 +-
 board/Marvell/rd6281a/rd6281a.c                 |    2 +-
 board/Marvell/sheevaplug/sheevaplug.c           |    2 +-
 board/Seagate/dockstar/dockstar.c               |    2 +-
 board/buffalo/lsxl/lsxl.c                       |    2 +-
 board/d-link/dns325/dns325.c                    |    2 +-
 board/keymile/km_arm/km_arm.c                   |    2 +-
 14 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
index 3da6c98..838f6bf 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
< at >< at > -31,7 +31,7 < at >< at > static u32 kirkwood_variant(void)
 #define MPP_CTRL(i)(KW_MPP_BASE + (i* 4))
 #define MPP_NR_REGS(1 + MPP_MAX/8)
 
-void kirkwood_mpp_conf(u32 *mpp_list)
+void kirkwood_mpp_conf(const u32 *mpp_list)
 {
 u32 mpp_ctrl[MPP_NR_REGS];
 unsigned int variant_mask;
diff --git a/arch/arm/include/asm/arch-kirkwood/mpp.h b/arch/arm/include/asm/arch-kirkwood/mpp.h
index b3c090e..54ec89f 100644
--- a/arch/arm/include/asm/arch-kirkwood/mpp.h
+++ b/arch/arm/include/asm/arch-kirkwood/mpp.h
< at >< at > -312,6 +312,6 < at >< at >
 
 #define MPP_MAX49
 
-void kirkwood_mpp_conf(unsigned int *mpp_list);
+void kirkwood_mpp_conf(const unsigned int *mpp_list);
 
 #endif
diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c
index d0b4adf..3437e82 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
< at >< at > -39,7 +39,7 < at >< at > int board_early_init_f(void)
 NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_SPI_SCn,
 MPP1_SPI_MOSI,
 MPP2_SPI_SCK,
diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c
index fbf020f..66f8f89 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
< at >< at > -39,7 +39,7 < at >< at > int board_early_init_f(void)
 NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_SPI_SCn,
 MPP1_SPI_MOSI,
 MPP2_SPI_SCK,
diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c
index 31b73c9..e446735 100644
--- a/board/Marvell/dreamplug/dreamplug.c
+++ b/board/Marvell/dreamplug/dreamplug.c
< at >< at > -46,7 +46,7 < at >< at > int board_early_init_f(void)
 DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_SPI_SCn,/* SPI Flash */
 MPP1_SPI_MOSI,
 MPP2_SPI_SCK,
diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
index 057c558..d30b2fe 100644
--- a/board/Marvell/guruplug/guruplug.c
+++ b/board/Marvell/guruplug/guruplug.c
< at >< at > -43,7 +43,7 < at >< at > int board_early_init_f(void)
 GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_NF_IO2,
 MPP1_NF_IO3,
 MPP2_NF_IO4,
diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
index 4c41f3b..66077e7 100644
--- a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
+++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
< at >< at > -45,7 +45,7 < at >< at > int board_early_init_f(void)
 MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_SPI_SCn,
 MPP1_SPI_MOSI,
 MPP2_SPI_SCK,
diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c
index 2a10e69..6291eab 100644
--- a/board/Marvell/openrd/openrd.c
+++ b/board/Marvell/openrd/openrd.c
< at >< at > -48,7 +48,7 < at >< at > int board_early_init_f(void)
 OPENRD_OE_LOW, OPENRD_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_NF_IO2,
 MPP1_NF_IO3,
 MPP2_NF_IO4,
diff --git a/board/Marvell/rd6281a/rd6281a.c b/board/Marvell/rd6281a/rd6281a.c
index 9c768bf..760aba4 100644
--- a/board/Marvell/rd6281a/rd6281a.c
+++ b/board/Marvell/rd6281a/rd6281a.c
< at >< at > -44,7 +44,7 < at >< at > int board_early_init_f(void)
 RD6281A_OE_LOW, RD6281A_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_NF_IO2,
 MPP1_NF_IO3,
 MPP2_NF_IO4,
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c
index 71e6793..868a6ed 100644
--- a/board/Marvell/sheevaplug/sheevaplug.c
+++ b/board/Marvell/sheevaplug/sheevaplug.c
< at >< at > -43,7 +43,7 < at >< at > int board_early_init_f(void)
 SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_NF_IO2,
 MPP1_NF_IO3,
 MPP2_NF_IO4,
diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c
index 38473e5..d191653 100644
--- a/board/Seagate/dockstar/dockstar.c
+++ b/board/Seagate/dockstar/dockstar.c
< at >< at > -47,7 +47,7 < at >< at > int board_early_init_f(void)
 DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_NF_IO2,
 MPP1_NF_IO3,
 MPP2_NF_IO4,
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index 5d9b7bc..2a0f399 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
< at >< at > -76,7 +76,7 < at >< at > int board_early_init_f(void)
  * Multi-Purpose Pins Functionality configuration
  * These strappings are taken from the original vendor uboot port.
  */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_SPI_SCn,
 MPP1_SPI_MOSI,
 MPP2_SPI_SCK,
diff --git a/board/d-link/dns325/dns325.c b/board/d-link/dns325/dns325.c
index 990d79f..b3fd4a4 100644
--- a/board/d-link/dns325/dns325.c
+++ b/board/d-link/dns325/dns325.c
< at >< at > -44,7 +44,7 < at >< at > int board_early_init_f(void)
 DNS325_OE_LOW, DNS325_OE_HIGH);
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static const u32 kwmpp_config[] = {
 MPP0_NF_IO2,
 MPP1_NF_IO3,
 MPP2_NF_IO4,
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 9e9940c..e12e978 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
< at >< at > -53,7 +53,7 < at >< at > DECLARE_GLOBAL_DATA_PTR;
 #define MASK_RBI_DEFECT_160x01
 
 /* Multi-Purpose Pins Functionality configuration */
-u32 kwmpp_config[] = {
+static u32 kwmpp_config[] = {
 MPP0_NF_IO2,
 MPP1_NF_IO3,
 MPP2_NF_IO4,

[PATCH v6 0/3] Kirkwood: add lschlv2 and lsxhl boardsupport

Michael Walle — 2012-05-25T23:43:12

Changes:
v6:
 - remove dead code in Makefile
 - use eth_{g,s}etenv_enetaddr() instead of 
   eth_{g,s}etenv_enetaddr_by_index() since index is always 0

v5:
 - combine patchset again. the "net: *" patches should be individually
   acked by net custodian
 - make features configurable at compile time (CONFIG_RANDOM_MACADDR and
   CONFIG_SETENV_ENETADDR_BY_INDEX)
 - remove unused variable in boards/buffalo/lsxl.c
 - fix potential compiler warning "too many arguments for format"
 - new patch which fixes eth_getenv_enetaddr_by_index() and eth_mac_skip()
 - change initial seed of rand() to 1
 - enable CONFIG_API and CONFIG_CMD_ELF for lsxl boards

v4:
 - typo fixes (thanks Mike)
 - seed all 46bits of the generated ethernet address (suggested by Mike)
 - split patchset (generic net helpers and lsxl support)
 - fix typo in bootcmd_hdd
 - removed board/buffalo/lsxl/config.mk patch from patchset

v3:
 - add "Kirkwood:" prefix to patch subject
 - moved board/buffalo/lsxl/config.mk to an own patch, so it can be
   separately acked/naked ;)
 - removed any hardcoding, that is the mac address is now automatically
   generated (random, locally administered) and the IP settings are
   fetched with DHCP/BOOTP.
 - add detailed comments to every configuration line in kwbimage.cfg
 - add comments in MPP configuration about GPIO usage
 - removed lschlv2 ramboot
 - use short board ident string
 - small cleanups

v2:
 - add to buffalo vendor directory instead of Marvell
 - add both boards to MAINTAINERS
 - don't define values for feature macros
 - use tab for vertical alignment
 - remove static network configuration, instead introduce a rescue mode
 - add some convenience scripts
 - small cleanups

Michael Walle (3):
  lib: add rand() function
  net: add helper to generate random mac address
  Kirkwood: add lschlv2 and lsxhl board support

 MAINTAINERS                           |    5 +
 board/buffalo/lsxl/Makefile           |   44 +++++
 board/buffalo/lsxl/kwbimage-lschl.cfg |  229 +++++++++++++++++++++++++
 board/buffalo/lsxl/kwbimage-lsxhl.cfg |  229 +++++++++++++++++++++++++
 board/buffalo/lsxl/lsxl.c             |  302 +++++++++++++++++++++++++++++++++
 board/buffalo/lsxl/lsxl.h             |   75 ++++++++
 boards.cfg                            |    2 +
 include/common.h                      |    6 +
 include/configs/lsxl.h                |  181 ++++++++++++++++++++
 include/net.h                         |   17 ++
 lib/Makefile                          |    1 +
 lib/rand.c                            |   43 +++++
 net/eth.c                             |   22 +++
 13 files changed, 1156 insertions(+), 0 deletions(-)
 create mode 100644 board/buffalo/lsxl/Makefile
 create mode 100644 board/buffalo/lsxl/kwbimage-lschl.cfg
 create mode 100644 board/buffalo/lsxl/kwbimage-lsxhl.cfg
 create mode 100644 board/buffalo/lsxl/lsxl.c
 create mode 100644 board/buffalo/lsxl/lsxl.h
 create mode 100644 include/configs/lsxl.h
 create mode 100644 lib/rand.c

[PATCH v4 1/3] Add run_command_list() to run a list ofcommands

Simon Glass — 2012-05-25T20:22:01

This new function runs a list of commands separated by semicolon or newline.
We move this out of cmd_source so that it can be used by other code. The
PXE code also uses the new function.

Suggested-by: Michael Walle <michael< at >walle.cc>
Signed-off-by: Simon Glass <sjg< at >chromium.org>
---
Changes in v3:
- Added a few more comments on the need for malloc()
- Change PXE's printf() to a debug()
- Fix bug in built-in run_command()
- Fix commit message to mention ; and \n
- Move run_command_list() comment to header file

Changes in v4:
- Remove length param from run_command_list() call in PXE

 common/cmd_pxe.c    |   20 ++----------
 common/cmd_source.c |   49 +----------------------------
 common/main.c       |   85 +++++++++++++++++++++++++++++++++++++++++++++++++++
 include/common.h    |   13 ++++++++
 4 files changed, 102 insertions(+), 65 deletions(-)

diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index b3c1f67..55d1c05 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
< at >< at > -515,33 +515,19 < at >< at > static void label_print(void *data)
  */
 static int label_localboot(struct pxe_label *label)
 {
-char *localcmd, *dupcmd;
-int ret;
+char *localcmd;
 
 localcmd = from_env("localcmd");
 
 if (!localcmd)
 return -ENOENT;
 
-/*
- * dup the command to avoid any issues with the version of it existing
- * in the environment changing during the execution of the command.
- */
-dupcmd = strdup(localcmd);
-
-if (!dupcmd)
-return -ENOMEM;
-
 if (label->append)
 setenv("bootargs", label->append);
 
-printf("running: %s\n", dupcmd);
-
-ret = run_command(dupcmd, 0);
+debug("running: %s\n", localcmd);
 
-free(dupcmd);
-
-return ret;
+return run_command_list(localcmd, -1, 0);
 }
 
 /*
diff --git a/common/cmd_source.c b/common/cmd_source.c
index 32fff5c..c4cde98 100644
--- a/common/cmd_source.c
+++ b/common/cmd_source.c
< at >< at > -39,9 +39,6 < at >< at >
 #if defined(CONFIG_8xx)
 #include <mpc8xx.h>
 #endif
-#ifdef CONFIG_SYS_HUSH_PARSER
-#include <hush.h>
-#endif
 
 int
 source (ulong addr, const char *fit_uname)
< at >< at > -49,8 +46,6 < at >< at > source (ulong addr, const char *fit_uname)
 ulonglen;
 image_header_t*hdr;
 ulong*data;
-char*cmd;
-intrcode = 0;
 intverify;
 #if defined(CONFIG_FIT)
 const void*fit_hdr;
< at >< at > -151,49 +146,7 < at >< at > source (ulong addr, const char *fit_uname)
 }
 
 debug ("** Script length: %ld\n", len);
-
-if ((cmd = malloc (len + 1)) == NULL) {
-return 1;
-}
-
-/* make sure cmd is null terminated */
-memmove (cmd, (char *)data, len);
-*(cmd + len) = 0;
-
-#ifdef CONFIG_SYS_HUSH_PARSER /*?? */
-rcode = parse_string_outer (cmd, FLAG_PARSE_SEMICOLON);
-#else
-{
-char *line = cmd;
-char *next = cmd;
-
-/*
- * break into individual lines,
- * and execute each line;
- * terminate on error.
- */
-while (*next) {
-if (*next == '\n') {
-*next = '\0';
-/* run only non-empty commands */
-if (*line) {
-debug ("** exec: \"%s\"\n",
-line);
-if (run_command(line, 0) < 0) {
-rcode = 1;
-break;
-}
-}
-line = next + 1;
-}
-++next;
-}
-if (rcode == 0 && *line)
-rcode = (run_command(line, 0) >= 0);
-}
-#endif
-free (cmd);
-return rcode;
+return run_command_list((char *)data, len, 0);
 }
 
 /**************************************************/
diff --git a/common/main.c b/common/main.c
index a933357..d96ba0a 100644
--- a/common/main.c
+++ b/common/main.c
< at >< at > -30,6 +30,7 < at >< at >
 #include <common.h>
 #include <watchdog.h>
 #include <command.h>
+#include <malloc.h>
 #include <version.h>
 #ifdef CONFIG_MODEM_SUPPORT
 #include <malloc.h>/* for free() prototype */
< at >< at > -1373,6 +1374,90 < at >< at > int run_command(const char *cmd, int flag)
 #endif
 }
 
+#ifndef CONFIG_SYS_HUSH_PARSER
+/**
+ * Execute a list of command separated by ; or \n using the built-in parser.
+ *
+ * This function cannot take a const char * for the command, since if it
+ * finds newlines in the string, it replaces them with \0.
+ *
+ * < at >param cmdString containing list of commands
+ * < at >param flagExecution flags (CMD_FLAG_...)
+ * < at >return 0 on success, or != 0 on error.
+ */
+static int builtin_run_command_list(char *cmd, int flag)
+{
+char *line, *next;
+int rcode = 0;
+
+/*
+ * Break into individual lines, and execute each line; terminate on
+ * error.
+ */
+line = next = cmd;
+while (*next) {
+if (*next == '\n') {
+*next = '\0';
+/* run only non-empty commands */
+if (*line) {
+debug("** exec: \"%s\"\n", line);
+if (builtin_run_command(line, 0) < 0) {
+rcode = 1;
+break;
+}
+}
+line = next + 1;
+}
+++next;
+}
+if (rcode == 0 && *line)
+rcode = (builtin_run_command(line, 0) >= 0);
+
+return rcode;
+}
+#endif
+
+int run_command_list(const char *cmd, int len, int flag)
+{
+int need_buff = 1;
+char *buff = (char *)cmd;/* cast away const */
+int rcode = 0;
+
+if (len == -1) {
+len = strlen(cmd);
+#ifdef CONFIG_SYS_HUSH_PARSER
+/* hush will never change our string */
+need_buff = 0;
+#else
+/* the built-in parser will change our string if it sees \n */
+need_buff = strchr(cmd, '\n') != NULL;
+#endif
+}
+if (need_buff) {
+buff = malloc(len + 1);
+if (!buff)
+return 1;
+memcpy(buff, cmd, len);
+buff[len] = '\0';
+}
+#ifdef CONFIG_SYS_HUSH_PARSER
+rcode = parse_string_outer(buff, FLAG_PARSE_SEMICOLON);
+#else
+/*
+ * This function will overwrite any \n it sees with a \0, which
+ * is why it can't work with a const char *. Here we are making
+ * using of internal knowledge of this function, to avoid always
+ * doing a malloc() which is actually required only in a case that
+ * is pretty rare.
+ */
+rcode = builtin_run_command_list(buff, flag);
+if (need_buff)
+free(buff);
+#endif
+
+return rcode;
+}
+
 /****************************************************************************/
 
 #if defined(CONFIG_CMD_RUN)
diff --git a/include/common.h b/include/common.h
index 8564a65..48c6abe 100644
--- a/include/common.h
+++ b/include/common.h
< at >< at > -286,6 +286,19 < at >< at > intprint_buffer (ulong addr, void* data, uint width, uint count, uint linelen);
 /* common/main.c */
 voidmain_loop(void);
 int run_command(const char *cmd, int flag);
+
+/**
+ * Run a list of commands separated by ; or even \0
+ *
+ * Note that if 'len' is not -1, then the command does not need to be nul
+ * terminated, Memory will be allocated for the command in that case.
+ *
+ * < at >param cmdList of commands to run, each separated bu semicolon
+ * < at >param lenLength of commands excluding terminator if known (-1 if not)
+ * < at >param flagExecution flags (CMD_FLAG_...)
+ * < at >return 0 on success, or != 0 on error.
+ */
+int run_command_list(const char *cmd, int len, int flag);
 intreadline(const char *const prompt);
 intreadline_into_buffer(const char *const prompt, char *buffer,
 int timeout);

Please pull u-boot-ti/master

Tom Rini — 2012-05-25T15:02:47

Hello,

The following changes since commit 2ca4a209a5b961ad1be8782c68dabe326d77dfaf:

  OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer (2012-05-15 08:31:41 +0200)

are available in the git repository at:

  git://git.denx.de/u-boot-ti.git master

for you to fetch changes up to aa54ece4e24f6ddd14914ca8c0c02ce5f279020e:

  cm-t35: print PCB revision information (2012-05-25 07:58:41 -0700)

----------------------------------------------------------------
Heiko Schocher (1):
      arm,davinci: update for enbw_cmc board

Igor Grinberg (1):
      cm-t35: reduce the environment size

Lokesh Vutla (7):
      OMAP5: Adding correct Control id code for OMAP5430
      OMAP5: ADD chip detection for OMAP5432 SOC
      OMAP5: Configure the io settings for omap5432 uevm board
      OMAP5: ADD precalculated timings for ddr3
      OMAP5: EMIF: Add support for DDR3 device
      OMAP5: DPLL core lock for OMAP5432
      OMAP5: Change voltages for omap5432

Nikita Kiryanov (3):
      cm-t35: fix incorrect BOARD_REV_SIZE value
      cm-t35: fix legacy board revision representation
      cm-t35: print PCB revision information

SRICHARAN R (5):
      ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections.
      ARM: OMAP5: dmm: Create a tiler trap section.
      ARM: OMAP5: Align memory used for testing to the power of 2
      ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.
      ARM: OMAP4: Correct the lpddr2 io settings register value.

Thomas Weber (1):
      omap4/5: Use CPUDIR for .lds script

Tom Rini (10):
      am33xx: Do not call init_timer twice
      Revert "I2C: OMAP: detect more devices when probing an i2c bus"
      am335x: Correct i2c sysc offset
      am33xx: Fill in more cm_wkuppll / cm_perpll
      am33xx: Fix i2c sampling rate typo
      omap24xx_i2c: Add AM33XX support
      OMAP3 Beagle: Set BOOTDELAY to 3
      omap3evm: Set BOOTDELAY to 3
      omap3_beagle: Add CONFIG_CMD_ASKENV
      omap3evm: Add CONFIG_CMD_ASKENV

Troy Kisky (1):
      DaVinci: fix ddr2 vtp i/o calibration

 arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S |    7 +-
 arch/arm/cpu/armv7/am33xx/board.c              |   30 +-
 arch/arm/cpu/armv7/omap-common/clocks-common.c |    8 +-
 arch/arm/cpu/armv7/omap-common/emif-common.c   |  121 ++++++++-
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |   20 +-
 arch/arm/cpu/armv7/omap4/hwinit.c              |    5 +
 arch/arm/cpu/armv7/omap4/sdram_elpida.c        |    1 +
 arch/arm/cpu/armv7/omap5/clocks.c              |   31 ++-
 arch/arm/cpu/armv7/omap5/hwinit.c              |  123 +++++++--
 arch/arm/cpu/armv7/omap5/sdram.c               |   56 +++-
 arch/arm/include/asm/arch-am33xx/cpu.h         |   42 ++-
 arch/arm/include/asm/arch-am33xx/i2c.h         |    8 +-
 arch/arm/include/asm/arch-omap4/clocks.h       |    5 +
 arch/arm/include/asm/arch-omap4/omap.h         |    2 +-
 arch/arm/include/asm/arch-omap5/clocks.h       |   15 +
 arch/arm/include/asm/arch-omap5/omap.h         |   20 +-
 arch/arm/include/asm/emif.h                    |   50 +++-
 arch/arm/include/asm/omap_common.h             |    1 +
 board/cm_t35/cm_t35.c                          |   33 +++
 board/cm_t35/eeprom.c                          |   26 +-
 board/cm_t35/eeprom.h                          |    5 +
 board/enbw/enbw_cmc/enbw_cmc.c                 |  347 ++++++++++++++++++++++--
 board/ti/am335x/evm.c                          |   13 +-
 doc/README.switch_config                       |   25 ++
 drivers/i2c/omap24xx_i2c.c                     |   46 +++-
 include/configs/cm_t35.h                       |    3 +-
 include/configs/enbw_cmc.h                     |   20 +-
 include/configs/omap3_beagle.h                 |    4 +-
 include/configs/omap3_evm.h                    |    4 +-
 include/configs/omap4_common.h                 |    2 +-
 include/configs/omap5_evm.h                    |    2 +-
 31 files changed, 922 insertions(+), 153 deletions(-)
 create mode 100644 doc/README.switch_config

With this, I'm considering anything that's not a bugfix to existing code
(that's in my custodial area) to be for the 'next' branch and not for
the v2012.07 release (since we're a little bit past the official merge
window closing).

[PATCH v2 1/7] tegra: Rework Tamonten support

Thierry Reding — 2012-05-25T13:46:22

This commit uses the common Tegra board implementation instead of
duplicating a lot of the code. In addition, the Plutux and Medcom
specific board files can be removed as the MMC/SD setup is common
among all Tamonten-based boards.

Signed-off-by: Thierry Reding <thierry.reding< at >avionic-design.de>
---
Changes in v2:
- new patch

 board/avionic-design/common/tamonten.c |   49 +++++---------------------------
 board/avionic-design/common/tamonten.h |   32 ---------------------
 board/avionic-design/medcom/Makefile   |    6 ++--
 board/avionic-design/medcom/medcom.c   |   45 -----------------------------
 board/avionic-design/plutux/Makefile   |    6 ++--
 board/avionic-design/plutux/plutux.c   |   45 -----------------------------
 6 files changed, 13 insertions(+), 170 deletions(-)
 delete mode 100644 board/avionic-design/common/tamonten.h
 delete mode 100644 board/avionic-design/medcom/medcom.c
 delete mode 100644 board/avionic-design/plutux/plutux.c

diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
index f23b657..d9ecd23 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
< at >< at > -1,7 +1,7 < at >< at >
 /*
  *  (C) Copyright 2010,2011
  *  NVIDIA Corporation <www.nvidia.com>
- *  (C) Copyright 2011
+ *  (C) Copyright 2011-2012
  *  Avionic Design GmbH <www.avionic-design.de>
  *
  * See file CREDITS for list of people who contributed to this
< at >< at > -36,25 +36,17 < at >< at >
 #include <asm/arch/pinmux.h>
 #include <asm/arch/uart.h>
 #include <asm/arch/mmc.h>
-#include "tamonten.h"
 
 #ifdef CONFIG_TEGRA2_MMC
 #include <mmc.h>
 #endif
 
-DECLARE_GLOBAL_DATA_PTR;
-
-const struct tegra2_sysinfo sysinfo = {
-CONFIG_TEGRA2_BOARD_STRING
-};
-
 /*
- * Routine: timer_init
- * Description: init the timestamp and lastinc value
+ * Routine: gpio_config_uart
+ * Description: Does nothing on Tamonten - no conflict w/SPI.
  */
-int timer_init(void)
+void gpio_config_uart(void)
 {
-return 0;
 }
 
 #ifdef CONFIG_TEGRA2_MMC
< at >< at > -65,46 +57,19 < at >< at > int timer_init(void)
 static void pin_mux_mmc(void)
 {
 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
+/* for CD GPIO PH2 */
+pinmux_tristate_disable(PINGRP_ATD);
 }
-#endif
-
-/*
- * Routine: board_init
- * Description: Early hardware init.
- */
-int board_init(void)
-{
-clock_init();
-clock_verify();
-
-/* boot param addr */
-gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
 
-return 0;
-}
-
-#ifdef CONFIG_TEGRA2_MMC
 /* this is a weak define that we are overriding */
 int board_mmc_init(bd_t *bd)
 {
-debug("board_mmc_init called\n");
 /* Enable muxes, etc. for SDMMC controllers */
 pin_mux_mmc();
-gpio_config_mmc();
 
-debug("board_mmc_init: init eMMC\n");
-/* init dev 0, eMMC chip, with 4-bit bus */
+/* init dev 0, SD slot, with 4-bit bus */
 tegra2_mmc_init(0, 4, -1, GPIO_PH2);
 
 return 0;
 }
 #endif
-
-#ifdef CONFIG_BOARD_EARLY_INIT_F
-int board_early_init_f(void)
-{
-/* Initialize selected UARTs */
-board_init_uart_f();
-return 0;
-}
-#endif /* EARLY_INIT */
diff --git a/board/avionic-design/common/tamonten.h b/board/avionic-design/common/tamonten.h
deleted file mode 100644
index 0e60b0f..0000000
--- a/board/avionic-design/common/tamonten.h
+++ /dev/null
< at >< at > -1,32 +0,0 < at >< at >
-/*
- *  (C) Copyright 2010,2011
- *  NVIDIA Corporation <www.nvidia.com>
- *  (C) Copyright 2011
- *  Avionic Design GmbH <www.avionic-design.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _TAMONTEN_H_
-#define _TAMONTEN_H_
-
-void tegra2_start(void);
-void gpio_config_mmc(void);
-
-#endif /* TAMONTEN_H */
diff --git a/board/avionic-design/medcom/Makefile b/board/avionic-design/medcom/Makefile
index b0c318c..d96d043 100644
--- a/board/avionic-design/medcom/Makefile
+++ b/board/avionic-design/medcom/Makefile
< at >< at > -1,7 +1,7 < at >< at >
 #
 #  (C) Copyright 2010,2011
 #  NVIDIA Corporation <www.nvidia.com>
-#  (C) Copyright 2011
+#  (C) Copyright 2011,2012
 #  Avionic Design GmbH <www.avionic-design.de>
 #
 #  See file CREDITS for list of people who contributed to this
< at >< at > -26,12 +26,12 < at >< at >
 include $(TOPDIR)/config.mk
 
 ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
+$(shell mkdir -p $(obj)../common $(obj)../../nvidia/common)
 endif
 
 LIB= $(obj)lib$(BOARD).o
 
-COBJS:= $(BOARD).o
+COBJS:= ../../nvidia/common/board.o
 COBJS+= ../common/tamonten.o
 
 SRCS:= $(COBJS:.o=.c)
diff --git a/board/avionic-design/medcom/medcom.c b/board/avionic-design/medcom/medcom.c
deleted file mode 100644
index 42c8094..0000000
--- a/board/avionic-design/medcom/medcom.c
+++ /dev/null
< at >< at > -1,45 +0,0 < at >< at >
-/*
- *  (C) Copyright 2010,2011
- *  NVIDIA Corporation <www.nvidia.com>
- *  (C) Copyright 2011
- *  Avionic Design GmbH <www.avionic-design.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-#include <asm/arch/tegra2.h>
-#ifdef CONFIG_TEGRA2_MMC
-#include <mmc.h>
-#endif
-
-#ifdef CONFIG_TEGRA2_MMC
-/*
- * Routine: gpio_config_mmc
- * Description: Set GPIOs for SD card
- */
-void gpio_config_mmc(void)
-{
-/* configure pin as input for card detect */
-gpio_request(GPIO_PH2, "SD4 CD");
-gpio_direction_input(GPIO_PH2);
-}
-#endif
diff --git a/board/avionic-design/plutux/Makefile b/board/avionic-design/plutux/Makefile
index b0c318c..d96d043 100644
--- a/board/avionic-design/plutux/Makefile
+++ b/board/avionic-design/plutux/Makefile
< at >< at > -1,7 +1,7 < at >< at >
 #
 #  (C) Copyright 2010,2011
 #  NVIDIA Corporation <www.nvidia.com>
-#  (C) Copyright 2011
+#  (C) Copyright 2011,2012
 #  Avionic Design GmbH <www.avionic-design.de>
 #
 #  See file CREDITS for list of people who contributed to this
< at >< at > -26,12 +26,12 < at >< at >
 include $(TOPDIR)/config.mk
 
 ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
+$(shell mkdir -p $(obj)../common $(obj)../../nvidia/common)
 endif
 
 LIB= $(obj)lib$(BOARD).o
 
-COBJS:= $(BOARD).o
+COBJS:= ../../nvidia/common/board.o
 COBJS+= ../common/tamonten.o
 
 SRCS:= $(COBJS:.o=.c)
diff --git a/board/avionic-design/plutux/plutux.c b/board/avionic-design/plutux/plutux.c
deleted file mode 100644
index 42c8094..0000000
--- a/board/avionic-design/plutux/plutux.c
+++ /dev/null
< at >< at > -1,45 +0,0 < at >< at >
-/*
- *  (C) Copyright 2010,2011
- *  NVIDIA Corporation <www.nvidia.com>
- *  (C) Copyright 2011
- *  Avionic Design GmbH <www.avionic-design.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-#include <asm/arch/tegra2.h>
-#ifdef CONFIG_TEGRA2_MMC
-#include <mmc.h>
-#endif
-
-#ifdef CONFIG_TEGRA2_MMC
-/*
- * Routine: gpio_config_mmc
- * Description: Set GPIOs for SD card
- */
-void gpio_config_mmc(void)
-{
-/* configure pin as input for card detect */
-gpio_request(GPIO_PH2, "SD4 CD");
-gpio_direction_input(GPIO_PH2);
-}
-#endif

[PATCH] MPC8xxx: Define cache ops for USB

Marek Vasut — 2012-05-25T12:24:32

This patch conditionally defines flush_dcache_range() and
invalidate_dcache_range() on MPC8xxx, to avoid EHCI complaining,
resulting in the following output:

$ ARCH=powerpc CROSS_COMPILE=powerpc-linux-gnu- ./MAKEALL MPC8572DS
Configuring for MPC8572DS board...
make: *** [u-boot] Error 1
powerpc-linux-gnu-size: './u-boot': No such file
e1000.c: In function ‘e1000_initialize’:
e1000.c:5264:13: warning: assignment from incompatible pointer type [enabled by default]
tsec.c: In function ‘tsec_initialize’:
tsec.c:638:12: warning: assignment from incompatible pointer type [enabled by default]
drivers/usb/host/libusb_host.o: In function `ehci_td_buffer':
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:186: undefined reference to `flush_dcache_range'
drivers/usb/host/libusb_host.o: In function `ehci_submit_async':
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:346: undefined reference to `flush_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:348: undefined reference to `flush_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:349: undefined reference to `flush_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:372: undefined reference to `invalidate_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:374: undefined reference to `invalidate_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:376: undefined reference to `invalidate_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:386: undefined reference to `invalidate_dcache_range'
make: *** [u-boot] Error 1

--------------------- SUMMARY ----------------------------
Boards compiled: 1
Boards with errors: 1 ( MPC8572DS )
----------------------------------------------------------

Signed-off-by: Marek Vasut <marex< at >denx.de>
Cc: Wolfgang Denk <wd< at >denx.de>
Cc: Anatolij Gustschin <agust< at >denx.de>
---
 arch/powerpc/cpu/mpc83xx/Makefile |    3 +++
 arch/powerpc/cpu/mpc83xx/cache.c  |   33 +++++++++++++++++++++++++++++++++
 arch/powerpc/cpu/mpc85xx/Makefile |    3 +++
 arch/powerpc/cpu/mpc85xx/cache.c  |   33 +++++++++++++++++++++++++++++++++
 4 files changed, 72 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc83xx/cache.c
 create mode 100644 arch/powerpc/cpu/mpc85xx/cache.c

diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index b5c499d..012ab6b 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
< at >< at > -41,6 +41,9 < at >< at > COBJS-$(CONFIG_PCI) += pci.o
 COBJS-$(CONFIG_PCIE) += pcie.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
 
+# Stub implementations of cache management functions for USB
+COBJS-$(CONFIG_USB_EHCI) += cache.o
+
 ifdef CONFIG_FSL_DDR2
 COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
 else
diff --git a/arch/powerpc/cpu/mpc83xx/cache.c b/arch/powerpc/cpu/mpc83xx/cache.c
new file mode 100644
index 0000000..2a08b65
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/cache.c
< at >< at > -0,0 +1,33 < at >< at >
+/*
+ * Copyright (C) 2012 Marek Vasut <marex< at >denx.de>
+ *
+ * This file contains stub implementation of
+ *   invalidate_dcache_range()
+ *   flush_dcache_range()
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+}
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 058d609..c512b33 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
< at >< at > -129,6 +129,9 < at >< at > COBJS+= speed.o
 COBJS+= tlb.o
 COBJS+= traps.o
 
+# Stub implementations of cache management functions for USB
+COBJS-$(CONFIG_USB_EHCI) += cache.o
+
 SRCS:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 START:= $(addprefix $(obj),$(START))
diff --git a/arch/powerpc/cpu/mpc85xx/cache.c b/arch/powerpc/cpu/mpc85xx/cache.c
new file mode 100644
index 0000000..2a08b65
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/cache.c
< at >< at > -0,0 +1,33 < at >< at >
+/*
+ * Copyright (C) 2012 Marek Vasut <marex< at >denx.de>
+ *
+ * This file contains stub implementation of
+ *   invalidate_dcache_range()
+ *   flush_dcache_range()
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+}

[PATCH 0/9] arm/km: bugfixes and small corrections

Holger Brunck — 2012-05-25T11:57:12

This patchseris extracts the bugfixes and minor adaptions of the already
posted patchserie http://lists.denx.de/pipermail/u-boot/2012-May/124413.html
as requested.

There are now changes in the patches compared to the previous serie.

cc: Prafulla Wadaskar <prafulla< at >marvell.com>
cc: Holger Brunck <holger.brunck< at >keymile.com>
cc: Valentin Longchamp <valentin.longchamp< at >keymile.com>

Holger Brunck (7):
  arm/km: add board type to boards.cfg
  arm/km: add piggy mac adress offset for mgcoge3un
  arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE
  arm/km: use ARRAY_SIZE macro
  arm/km: fix wrong comment in SDRAM config for mgcoge3un
  arm/km: change maintainer for mgcoge3un
  arm/km: remove CONFIG_RESET_PHY_R

Valentin Longchamp (2):
  arm/km: enable mii cmd
  km_arm: use filesize for erase in update command

 MAINTAINERS                               |    2 +-
 board/keymile/km_arm/km_arm.c             |    2 +-
 board/keymile/km_arm/kwbimage-memphis.cfg |    2 +-
 boards.cfg                                |    4 ++--
 include/configs/km/km_arm.h               |    8 ++++----
 include/configs/km_kirkwood.h             |    4 ++--
 include/configs/mgcoge3un.h               |    1 +
 7 files changed, 12 insertions(+), 11 deletions(-)

[PATCH 0/4] EXYNOS: Add support for MSHCI driver

Rajeshwari Shinde — 2012-05-25T11:53:14

This patch enables the MSHCI driver support for EXYNOS5.

Rajeshwari Shinde (4):
  EXYNOS: MSHCI: Add clock for EXYNOS5
  EXYNOS5: PINMUX: Add pinmux for SDMMC4
  EXYNOS: Add base address for MSHCI
  EXYNOS5: Enable support for MSHCI

This patchset is based on following patches:
"EXYNOS5: PINMUX: Added default pinumx settings"
"EXYNOS: SMDK5250: Enable the pinmux setup"
"PMIC: MAX77686: Add support for MAX77686"
"PMIC: SMDK5250: Enable MAX77686 pmic chip"
"EXYNOS5: Enable I2C support"
 arch/arm/cpu/armv7/exynos/clock.c      |   94 ++++++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/exynos/pinmux.c     |   24 ++++++---
 arch/arm/include/asm/arch-exynos/clk.h |    4 ++
 arch/arm/include/asm/arch-exynos/cpu.h |    3 +
 board/samsung/smdk5250/smdk5250.c      |    3 +
 include/configs/smdk5250.h             |    1 +
 6 files changed, 122 insertions(+), 7 deletions(-)

[PATCH] MMC: MSHCI: Add MSHCI driver

Rajeshwari Shinde — 2012-05-25T11:51:00

Add MSHCI driver support and resgister description for same.

Signed-off-by: Alim Akhtar <alim.akhtar< at >samsung.com>
Signed-off-by: Terry Lambert <tlambert< at >chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s< at >samsung.com>
---
 arch/arm/include/asm/arch-exynos/mshc.h |  174 ++++++++++
 drivers/mmc/Makefile                    |    1 +
 drivers/mmc/exynos_mshc.c               |  553 +++++++++++++++++++++++++++++++
 3 files changed, 728 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-exynos/mshc.h
 create mode 100644 drivers/mmc/exynos_mshc.c

diff --git a/arch/arm/include/asm/arch-exynos/mshc.h b/arch/arm/include/asm/arch-exynos/mshc.h
new file mode 100644
index 0000000..7226619
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/mshc.h
< at >< at > -0,0 +1,174 < at >< at >
+/*
+ * (C) Copyright 2012 SAMSUNG Electronics
+ * Abhilash Kesavan <a.kesavan< at >samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+#ifndef __ASM_ARCH_COMMON_MSHC_H
+#define __ASM_ARCH_COMMON_MSHC_H
+
+#include <asm/arch/pinmux.h>
+#ifndef __ASSEMBLY__
+struct mshci_host {
+struct exynos_mshci*reg;/* Mapped address */
+unsigned intclock;/* Current clock in MHz */
+enum periph_idperipheral;
+};
+
+struct exynos_mshci {
+unsigned intctrl;
+unsigned intpwren;
+unsigned intclkdiv;
+unsigned intclksrc;
+unsigned intclkena;
+unsigned inttmout;
+unsigned intctype;
+unsigned intblksiz;
+unsigned intbytcnt;
+unsigned intintmask;
+unsigned intcmdarg;
+unsigned intcmd;
+unsigned intresp0;
+unsigned intresp1;
+unsigned intresp2;
+unsigned intresp3;
+unsigned intmintsts;
+unsigned intrintsts;
+unsigned intstatus;
+unsigned intfifoth;
+unsigned intcdetect;
+unsigned intwrtprt;
+unsigned intgpio;
+unsigned inttcbcnt;
+unsigned inttbbcnt;
+unsigned intdebnce;
+unsigned intusrid;
+unsigned intverid;
+unsigned inthcon;
+unsigned intuhs_reg;
+unsigned intrst_n;
+unsigned charreserved1[4];
+unsigned intbmod;
+unsigned intpldmnd;
+unsigned intdbaddr;
+unsigned intidsts;
+unsigned intidinten;
+unsigned intdscaddr;
+unsigned intbufaddr;
+unsigned intclksel;
+unsigned charreserved2[460];
+unsigned intcardthrctl;
+};
+
+/*
+ * Struct idma
+ * Holds the descriptor list
+ */
+struct mshci_idmac {
+u32des0;
+u32des1;
+u32des2;
+u32des3;
+};
+
+/*  Control Register  Register */
+#define CTRL_RESET(0x1 << 0)
+#define FIFO_RESET(0x1 << 1)
+#define DMA_RESET(0x1 << 2)
+#define DMA_ENABLE(0x1 << 5)
+#define SEND_AS_CCSD(0x1 << 10)
+#define ENABLE_IDMAC    (0x1 << 25)
+
+/*  Power Enable Register */
+#define POWER_ENABLE(0x1 << 0)
+
+/*  Clock Enable Register */
+#define CLK_ENABLE(0x1 << 0)
+#define CLK_DISABLE(0x0 << 0)
+
+/* Timeout Register */
+#define TMOUT_MAX0xffffffff
+
+/*  Card Type Register */
+#define PORT0_CARD_WIDTH10
+#define PORT0_CARD_WIDTH4(0x1 << 0)
+#define PORT0_CARD_WIDTH8(0x1 << 16)
+
+/*  Interrupt Mask Register */
+#define INTMSK_ALL0xffffffff
+#define INTMSK_RE(0x1 << 1)
+#define INTMSK_CDONE(0x1 << 2)
+#define INTMSK_DTO(0x1 << 3)
+#define INTMSK_DCRC(0x1 << 7)
+#define INTMSK_RTO(0x1 << 8)
+#define INTMSK_DRTO(0x1 << 9)
+#define INTMSK_HTO(0x1 << 10)
+#define INTMSK_FRUN(0x1 << 11)
+#define INTMSK_HLE(0x1 << 12)
+#define INTMSK_SBE(0x1 << 13)
+#define INTMSK_ACD(0x1 << 14)
+#define INTMSK_EBE(0x1 << 15)
+
+/* Command Register */
+#define CMD_RESP_EXP_BIT(0x1 << 6)
+#define CMD_RESP_LENGTH_BIT(0x1 << 7)
+#define CMD_CHECK_CRC_BIT(0x1 << 8)
+#define CMD_DATA_EXP_BIT(0x1 << 9)
+#define CMD_RW_BIT(0x1 << 10)
+#define CMD_SENT_AUTO_STOP_BIT(0x1 << 12)
+#define CMD_WAIT_PRV_DAT_BIT(0x1 << 13)
+#define CMD_SEND_CLK_ONLY(0x1 << 21)
+#define CMD_USE_HOLD_REG(0x1 << 29)
+#define CMD_STRT_BIT(0x1 << 31)
+#define CMD_ONLY_CLK(CMD_STRT_BIT | CMD_SEND_CLK_ONLY | \
+CMD_WAIT_PRV_DAT_BIT)
+
+/*  Raw Interrupt Register */
+#define DATA_ERR(INTMSK_EBE | INTMSK_SBE | INTMSK_HLE |\
+INTMSK_FRUN | INTMSK_EBE | INTMSK_DCRC)
+#define DATA_TOUT(INTMSK_HTO | INTMSK_DRTO)
+
+/*  Status Register */
+#define DATA_BUSY(0x1 << 9)
+
+/*  FIFO Threshold Watermark Register */
+#define TX_WMARK(0xFFF << 0)
+#define RX_WMARK(0xFFF << 16)
+#define MSIZE_MASK(0x7 << 28)
+
+/* DW DMA Mutiple Transaction Size */
+#define MSIZE_8(2 << 28)
+
+/*  Bus Mode Register */
+#define BMOD_IDMAC_RESET(0x1 << 0)
+#define BMOD_IDMAC_FB(0x1 << 1)
+#define BMOD_IDMAC_ENABLE(0x1 << 7)
+
+/* IDMAC bits */
+#define MSHCI_IDMAC_OWN(0x1 << 31)
+#define MSHCI_IDMAC_CH(0x1 << 4)
+#define MSHCI_IDMAC_FS(0x1 << 3)
+#define MSHCI_IDMAC_LD(0x1 << 2)
+
+#define MAX_MSHCI_CLOCK52000000 /* Max limit is 52MHz */
+#define MIN_MSHCI_CLOCK400000 /* Lower limit is 400KHz */
+#define COMMAND_TIMEOUT10000
+#define TIMEOUT_MS100
+
+int exynos_mshci_init(enum periph_id periph_id, int bus_width);
+
+#endif
+#endif
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index c245352..84e2d6a 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
< at >< at > -27,6 +27,7 < at >< at > LIB:= $(obj)libmmc.o
 
 COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o
 COBJS-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
+COBJS-$(CONFIG_EXYNOS_MSHCI) += exynos_mshc.o
 COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
 COBJS-$(CONFIG_FTSDC010) += ftsdc010_esdhc.o
 COBJS-$(CONFIG_GENERIC_MMC) += mmc.o
diff --git a/drivers/mmc/exynos_mshc.c b/drivers/mmc/exynos_mshc.c
new file mode 100644
index 0000000..eb133c0
--- /dev/null
+++ b/drivers/mmc/exynos_mshc.c
< at >< at > -0,0 +1,553 < at >< at >
+/*
+ * (C) Copyright 2012 Samsung Electronics Co. Ltd
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/mshc.h>
+#include <asm/arch/pinmux.h>
+
+/* support 4 mmc hosts */
+enum {
+MAX_MMC_HOSTS= 4
+};
+
+static struct mmc mshci_dev[MAX_MMC_HOSTS];
+static struct mshci_host mshci_host[MAX_MMC_HOSTS];
+static int num_devs;
+
+/* Struct to hold mshci register and bus width */
+struct mshci_config {
+struct exynos_mshci *reg; /* registers address in physical memory */
+int bus_width; /* bus width */
+int removable; /* removable device? */
+enum periph_id periph_id; /* Peripheral ID for this peripheral */
+};
+
+/**
+ * Set bits of MSHCI host control register.
+ *
+ * < at >param hostMSHCI host
+ * < at >param bitsbits to be set
+ * < at >return 0 on success, -1 on failure
+ */
+static int mshci_setbits(struct mshci_host *host, unsigned int bits)
+{
+ulong start;
+
+setbits_le32(&host->reg->ctrl, bits);
+
+start = get_timer(0);
+while (readl(&host->reg->ctrl) & bits) {
+if (get_timer(start) > TIMEOUT_MS) {
+debug("Set bits failed\n");
+return -1;
+}
+}
+
+return 0;
+}
+
+/**
+ * Reset MSHCI host control register.
+ *
+ * < at >param hostMSHCI host
+ * < at >return 0 on success, -1 on failure
+ */
+static int mshci_reset_all(struct mshci_host *host)
+{
+ulong start;
+
+/*
+* Before we reset ciu check the DATA0 line.  If it is low and
+* we resets the ciu then we might see some errors.
+*/
+start = get_timer(0);
+while (readl(&host->reg->status) & DATA_BUSY) {
+if (get_timer(start) > TIMEOUT_MS) {
+debug("Controller did not release"
+"data0 before ciu reset\n");
+return -1;
+}
+}
+
+if (mshci_setbits(host, CTRL_RESET)) {
+debug("Fail to reset card.\n");
+return -1;
+}
+if (mshci_setbits(host, FIFO_RESET)) {
+debug("Fail to reset fifo.\n");
+return -1;
+}
+if (mshci_setbits(host, DMA_RESET)) {
+debug("Fail to reset dma.\n");
+return -1;
+}
+
+return 0;
+}
+
+static void mshci_set_mdma_desc(u8 *desc_vir, u8 *desc_phy,
+unsigned int des0, unsigned int des1, unsigned int des2)
+{
+struct mshci_idmac *desc = (struct mshci_idmac *)desc_vir;
+
+desc->des0 = des0;
+desc->des1 = des1;
+desc->des2 = des2;
+desc->des3 = (unsigned int)desc_phy + sizeof(struct mshci_idmac);
+}
+
+static int mshci_prepare_data(struct mshci_host *host, struct mmc_data *data)
+{
+unsigned int i;
+unsigned int data_cnt;
+unsigned int des_flag;
+unsigned int blksz;
+static struct mshci_idmac idmac_desc[0x10000];
+struct mshci_idmac *pdesc_dmac;
+
+if (mshci_setbits(host, FIFO_RESET)) {
+debug("Fail to reset FIFO\n");
+return -1;
+}
+
+pdesc_dmac = idmac_desc;
+blksz = data->blocksize;
+data_cnt = data->blocks;
+
+for  (i = 0;; i++) {
+des_flag = (MSHCI_IDMAC_OWN | MSHCI_IDMAC_CH);
+des_flag |= (i == 0) ? MSHCI_IDMAC_FS : 0;
+if (data_cnt <= 8) {
+des_flag |= MSHCI_IDMAC_LD;
+mshci_set_mdma_desc((u8 *)pdesc_dmac,
+(u8 *)virt_to_phys(pdesc_dmac),
+des_flag, blksz * data_cnt,
+(unsigned int)(virt_to_phys(data->dest)) +
+(unsigned int)(i * 0x1000));
+break;
+}
+/* max transfer size is 4KB per descriptor */
+mshci_set_mdma_desc((u8 *)pdesc_dmac,
+(u8 *)virt_to_phys(pdesc_dmac),
+des_flag, blksz * 8,
+virt_to_phys(data->dest) +
+(unsigned int)(i * 0x1000));
+
+data_cnt -= 8;
+pdesc_dmac++;
+}
+
+writel((unsigned int)virt_to_phys(idmac_desc), &host->reg->dbaddr);
+
+/* enable the Internal DMA Controller */
+setbits_le32(&host->reg->ctrl, ENABLE_IDMAC | DMA_ENABLE);
+setbits_le32(&host->reg->bmod, BMOD_IDMAC_ENABLE | BMOD_IDMAC_FB);
+
+writel(data->blocksize, &host->reg->blksiz);
+writel(data->blocksize * data->blocks, &host->reg->bytcnt);
+
+return 0;
+}
+
+static int mshci_set_transfer_mode(struct mshci_host *host,
+struct mmc_data *data)
+{
+int mode = CMD_DATA_EXP_BIT;
+
+if (data->blocks > 1)
+mode |= CMD_SENT_AUTO_STOP_BIT;
+if (data->flags & MMC_DATA_WRITE)
+mode |= CMD_RW_BIT;
+
+return mode;
+}
+
+/*
+ * Sends a command out on the bus.
+ *
+ * < at >param mmcmmc device
+ * < at >param cmdmmc_cmd to be sent on bus
+ * < at >param datammc data to be sent (optional)
+ *
+ * < at >returnreturn 0 if ok, else -1
+ */
+static int exynos_mshci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
+struct mmc_data *data)
+{
+struct mshci_host *host = mmc->priv;
+
+int flags = 0, i;
+unsigned int mask;
+ulong start;
+
+/*
+* We shouldn't wait for data inihibit for stop commands, even
+* though they might use busy signaling
+*/
+start = get_timer(0);
+while (readl(&host->reg->status) & DATA_BUSY) {
+if (get_timer(start) > COMMAND_TIMEOUT) {
+debug("timeout on data busy\n");
+return -1;
+}
+}
+
+if (readl(&host->reg->rintsts)) {
+if ((readl(&host->reg->rintsts) &
+(INTMSK_CDONE | INTMSK_ACD)) == 0)
+debug("there are pending interrupts 0x%x\n",
+readl(&host->reg->rintsts));
+}
+/* It clears all pending interrupts before sending a command*/
+writel(INTMSK_ALL, &host->reg->rintsts);
+
+if (data) {
+if (mshci_prepare_data(host, data)) {
+debug("fail to prepare data\n");
+return -1;
+}
+}
+
+writel(cmd->cmdarg, &host->reg->cmdarg);
+
+if (data)
+flags = mshci_set_transfer_mode(host, data);
+
+if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
+/* this is out of SD spec */
+return -1;
+
+if (cmd->resp_type & MMC_RSP_PRESENT) {
+flags |= CMD_RESP_EXP_BIT;
+if (cmd->resp_type & MMC_RSP_136)
+flags |= CMD_RESP_LENGTH_BIT;
+}
+
+if (cmd->resp_type & MMC_RSP_CRC)
+flags |= CMD_CHECK_CRC_BIT;
+flags |= (cmd->cmdidx | CMD_STRT_BIT | CMD_USE_HOLD_REG |
+CMD_WAIT_PRV_DAT_BIT);
+
+mask = readl(&host->reg->cmd);
+if (mask & CMD_STRT_BIT)
+debug("cmd busy, current cmd: %d", cmd->cmdidx);
+
+writel(flags, &host->reg->cmd);
+/* wait for command complete by busy waiting. */
+for (i = 0; i < COMMAND_TIMEOUT; i++) {
+mask = readl(&host->reg->rintsts);
+if (mask & INTMSK_CDONE) {
+if (!data)
+writel(mask, &host->reg->rintsts);
+break;
+}
+}
+/* timeout for command complete. */
+if (COMMAND_TIMEOUT == i) {
+debug("timeout waiting for status update\n");
+return TIMEOUT;
+}
+
+if (mask & INTMSK_RTO) {
+if (((cmd->cmdidx == 8 || cmd->cmdidx == 41 ||
+cmd->cmdidx == 55)) == 0) {
+debug("response timeout error: 0x%x cmd: %d\n",
+mask, cmd->cmdidx);
+}
+return TIMEOUT;
+} else if (mask & INTMSK_RE) {
+debug("response error: 0x%x cmd: %d\n", mask, cmd->cmdidx);
+return -1;
+}
+if (cmd->resp_type & MMC_RSP_PRESENT) {
+if (cmd->resp_type & MMC_RSP_136) {
+/* CRC is stripped so we need to do some shifting. */
+cmd->response[0] = readl(&host->reg->resp3);
+cmd->response[1] = readl(&host->reg->resp2);
+cmd->response[2] = readl(&host->reg->resp1);
+cmd->response[3] = readl(&host->reg->resp0);
+} else {
+cmd->response[0] = readl(&host->reg->resp0);
+debug("\tcmd->response[0]: 0x%08x\n", cmd->response[0]);
+}
+}
+
+if (data) {
+while (!(mask & (DATA_ERR | DATA_TOUT | INTMSK_DTO)))
+mask = readl(&host->reg->rintsts);
+writel(mask, &host->reg->rintsts);
+if (mask & (DATA_ERR | DATA_TOUT)) {
+debug("error during transfer: 0x%x\n", mask);
+/* make sure disable IDMAC and IDMAC_Interrupts */
+writel((readl(&host->reg->ctrl) &
+~(DMA_ENABLE | ENABLE_IDMAC)), &host->reg->ctrl);
+/* mask all interrupt source of IDMAC */
+writel(0, &host->reg->idinten);
+return -1;
+} else if (mask & INTMSK_DTO) {
+debug("mshci dma interrupt end\n");
+} else {
+debug("unexpected condition 0x%x\n", mask);
+}
+/* make sure disable IDMAC and IDMAC_Interrupts */
+writel((readl(&host->reg->ctrl) & ~(DMA_ENABLE | ENABLE_IDMAC)),
+&host->reg->ctrl);
+/* mask all interrupt source of IDMAC */
+writel(0, &host->reg->idinten);
+}
+
+udelay(100);
+
+return 0;
+}
+
+/*
+ * ON/OFF host controller clock
+ *
+ * < at >param hostpointer to mshci_host
+ * < at >param valto enable/disable clock
+ */
+static void mshci_clock_onoff(struct mshci_host *host, int val)
+{
+
+if (val) {
+writel(CLK_ENABLE, &host->reg->clkena);
+writel(0, &host->reg->cmd);
+writel(CMD_ONLY_CLK, &host->reg->cmd);
+} else {
+writel(CLK_DISABLE, &host->reg->clkena);
+writel(0, &host->reg->cmd);
+writel(CMD_ONLY_CLK, &host->reg->cmd);
+}
+}
+
+/*
+ * change host controller clock
+ *
+ * < at >param hostpointer to mshci_host
+ * < at >param clockrequest clock
+ *
+ */
+static void mshci_change_clock(struct mshci_host *host, uint clock)
+{
+int div;
+u32 sclk_mshc;
+
+if (clock == host->clock)
+return;
+
+/* If Input clock is higher than maximum mshc clock */
+if (clock > MAX_MSHCI_CLOCK) {
+debug("Input clock is too high\n");
+clock = MAX_MSHCI_CLOCK;
+}
+
+/* disable the clock before changing it */
+mshci_clock_onoff(host, CLK_DISABLE);
+
+/* get the clock division */
+if (host->peripheral == PERIPH_ID_SDMMC4)
+sclk_mshc = get_mshci_clk_div(host->peripheral) / 2;
+else
+sclk_mshc = get_mshci_clk_div(host->peripheral) / 4;
+
+/* CLKDIV */
+for (div = 1 ; div <= 0xff; div++) {
+if ((sclk_mshc / (2 * div)) <= clock) {
+writel(div, &host->reg->clkdiv);
+break;
+}
+}
+
+writel(0, &host->reg->cmd);
+writel(CMD_ONLY_CLK, &host->reg->cmd);
+
+writel(readl(&host->reg->cmd) & (~CMD_SEND_CLK_ONLY),
+&host->reg->cmd);
+
+mshci_clock_onoff(host, CLK_ENABLE);
+host->clock = clock;
+}
+
+/*
+ * Set ios for host controller clock
+ *
+ * This sets the card bus width and clksel
+ */
+static void exynos_mshci_set_ios(struct mmc *mmc)
+{
+struct mshci_host *host = mmc->priv;
+
+debug("bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock);
+
+if (mmc->clock > 0)
+mshci_change_clock(host, mmc->clock);
+
+if (mmc->bus_width == 8)
+writel(PORT0_CARD_WIDTH8, &host->reg->ctype);
+else if (mmc->bus_width == 4)
+writel(PORT0_CARD_WIDTH4, &host->reg->ctype);
+else
+writel(PORT0_CARD_WIDTH1, &host->reg->ctype);
+
+if (host->peripheral == PERIPH_ID_SDMMC0)
+writel(0x03030001, &host->reg->clksel);
+if (host->peripheral == PERIPH_ID_SDMMC2)
+writel(0x03020001, &host->reg->clksel);
+if (host->peripheral == PERIPH_ID_SDMMC4)
+writel(0x00020001, &host->reg->clksel);
+}
+
+/*
+ * Fifo init for host controller
+ */
+static void mshci_fifo_init(struct mshci_host *host)
+{
+int fifo_val, fifo_depth, fifo_threshold;
+
+fifo_val = readl(&host->reg->fifoth);
+
+fifo_depth = 0x80;
+fifo_threshold = fifo_depth / 2;
+
+fifo_val &= ~(RX_WMARK | TX_WMARK | MSIZE_MASK);
+fifo_val |= (fifo_threshold | (fifo_threshold << 16) | MSIZE_8);
+writel(fifo_val, &host->reg->fifoth);
+}
+
+
+static void mshci_init(struct mshci_host *host)
+{
+/* power on the card */
+writel(POWER_ENABLE, &host->reg->pwren);
+
+mshci_reset_all(host);
+mshci_fifo_init(host);
+
+/* clear all pending interrupts */
+writel(INTMSK_ALL, &host->reg->rintsts);
+
+/* interrupts are not used, disable all */
+writel(0, &host->reg->intmask);
+}
+
+static int exynos_mshci_initialize(struct mmc *mmc)
+{
+struct mshci_host *host = (struct mshci_host *)mmc->priv;
+unsigned int ier;
+
+mshci_init(host);
+
+/* enumerate at 400KHz */
+mshci_change_clock(host, MIN_MSHCI_CLOCK);
+
+/* set auto stop command */
+ier = readl(&host->reg->ctrl);
+ier |= SEND_AS_CCSD;
+writel(ier, &host->reg->ctrl);
+
+/* set 1bit card mode */
+writel(PORT0_CARD_WIDTH1, &host->reg->ctype);
+
+writel(0xfffff, &host->reg->debnce);
+
+/* set bus mode register for IDMAC */
+writel(BMOD_IDMAC_RESET, &host->reg->bmod);
+
+writel(0x0, &host->reg->idinten);
+
+/* set the max timeout for data and response */
+writel(TMOUT_MAX, &host->reg->tmout);
+
+return 0;
+}
+
+static int mshci_initialize(struct mshci_config *config)
+{
+struct mshci_host *mmc_host;
+struct mmc *mmc;
+
+if (num_devs == MAX_MMC_HOSTS) {
+debug("%s: Too many hosts\n", __func__);
+return -1;
+}
+
+/* set the clock for mshci controller */
+if (set_mshci_clk_div(config->periph_id)) {
+debug("clock_set_mshci failed\n");
+return -1;
+}
+
+mmc = &mshci_dev[num_devs];
+mmc_host = &mshci_host[num_devs];
+
+sprintf(mmc->name, "EXYNOS MSHCI%d", num_devs);
+num_devs++;
+
+mmc->priv = mmc_host;
+mmc->send_cmd = exynos_mshci_send_command;
+mmc->set_ios = exynos_mshci_set_ios;
+mmc->init = exynos_mshci_initialize;
+
+mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+mmc->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
+
+if (config->bus_width == 8)
+mmc->host_caps |= MMC_MODE_8BIT;
+else
+mmc->host_caps |= MMC_MODE_4BIT;
+
+mmc->f_min = MIN_MSHCI_CLOCK;
+mmc->f_max = MAX_MSHCI_CLOCK;
+
+exynos_pinmux_config(config->periph_id,
+config->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : 0);
+
+mmc_host->clock = 0;
+mmc_host->reg =  config->reg;
+mmc_host->peripheral =  config->periph_id;
+mmc->b_max = 1;
+mmc_register(mmc);
+mmc->block_dev.removable = config->removable;
+debug("exynos_mshci: periph_id=%d, width=%d, reg=%p\n",
+      config->periph_id, config->bus_width, config->reg);
+
+return 0;
+}
+
+int exynos_mshci_init(enum periph_id periph_id, int bus_width)
+{
+struct mshci_config config;
+int ret = 0;
+config.bus_width = bus_width;
+config.reg = (struct exynos_mshci *)samsung_get_base_mshci();
+config.periph_id = periph_id;
+config.removable = 1;
+if (mshci_initialize(&config)) {
+debug("%s: Failed to init MSHCI\n", __func__);
+ret = -1;
+}
+return ret;
+}

[PATCH 1/2] avr32:grasshopper: fix PHY initialisation

Andreas Bießmann — 2012-05-25T10:29:32

Signed-off-by: Andreas Bießmann <andreas.devel< at >googlemail.com>
---
 board/in-circuit/grasshopper/grasshopper.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/board/in-circuit/grasshopper/grasshopper.c b/board/in-circuit/grasshopper/grasshopper.c
index 475a759..222fe43 100644
--- a/board/in-circuit/grasshopper/grasshopper.c
+++ b/board/in-circuit/grasshopper/grasshopper.c
< at >< at > -72,6 +72,13 < at >< at > int board_early_init_f(void)
 portmux_enable_usart0(PORTMUX_DRIVE_MIN);
 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
 #if defined(CONFIG_MACB)
+/* set PHY reset and pwrdown to low */
+portmux_select_gpio(PORTMUX_PORT_B, (1 << 29) | (1 << 30),
+PORTMUX_DIR_OUTPUT | PORTMUX_INIT_LOW);
+udelay(100);
+/* release PHYs reset */
+gpio_set_value(GPIO_PIN_PB(29), 1);
+
 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
 #endif

[PATCH 1/7] env_mmc: align buffers usingALLOC_CACHE_ALIGN_BUFFER

Stephen Warren — 2012-05-24T21:38:33

From: Stephen Warren <swarren< at >nvidia.com>

This allows MMC drivers to perform cache flusing on the bufffers
without issue.

Signed-off-by: Stephen Warren <swarren< at >nvidia.com>
Cc: Andy Fleming <afleming< at >gmail.com>
---
 common/env_mmc.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/common/env_mmc.c b/common/env_mmc.c
index 0c58ae1..be2f2be 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
< at >< at > -95,7 +95,7 < at >< at > static inline int write_env(struct mmc *mmc, unsigned long size,
 
 int saveenv(void)
 {
-env_tenv_new;
+ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
 ssize_tlen;
 char*res;
 struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
< at >< at > -104,16 +104,16 < at >< at > int saveenv(void)
 if (init_mmc_for_env(mmc) || mmc_get_env_addr(mmc, &offset))
 return 1;
 
-res = (char *)&env_new.data;
+res = (char *)&env_new->data;
 len = hexport_r(&env_htab, '\0', &res, ENV_SIZE, 0, NULL);
 if (len < 0) {
 error("Cannot export environment: errno = %d\n", errno);
 return 1;
 }
 
-env_new.crc = crc32(0, env_new.data, ENV_SIZE);
+env_new->crc = crc32(0, &env_new->data[0], ENV_SIZE);
 printf("Writing to MMC(%d)... ", CONFIG_SYS_MMC_ENV_DEV);
-if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)&env_new)) {
+if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
 puts("failed\n");
 return 1;
 }
< at >< at > -140,7 +140,7 < at >< at > static inline int read_env(struct mmc *mmc, unsigned long size,
 void env_relocate_spec(void)
 {
 #if !defined(ENV_IS_EMBEDDED)
-char buf[CONFIG_ENV_SIZE];
+ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
 struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
 u32 offset;

[PATCH 0/4] cm-t35 updates and non-critical fixes

Igor Grinberg — 2012-05-24T14:01:20

This patch set fixes various board revsion related issues,
adds the PCB revision information printing and reduces the
environment size.

Igor Grinberg (1):
  cm-t35: reduce the environment size

Nikita Kiryanov (3):
  cm-t35: fix incorrect BOARD_REV_SIZE value
  cm-t35: fix legacy board revision representation
  cm-t35: print PCB revision information

 board/cm_t35/cm_t35.c    |   22 ++++++++++++++++++++++
 board/cm_t35/eeprom.c    |   26 ++++++++++++++++----------
 board/cm_t35/eeprom.h    |    5 +++++
 include/configs/cm_t35.h |    3 +--
 4 files changed, 44 insertions(+), 12 deletions(-)

malloc failing in U-Boot

Sandeep Kumar — 2012-05-24T12:22:33

Hi Everyone,

I am facing some issue while using malloc on my system.
The "malloc" always fails even if I try to do malloc for 1 byte.
Did anyone faced the issue. Any kind of pointer will be very helpful.
I am getting the following error after enabling the "DEBUG".

dlmalloc.c:1656: do_check_chunk: Assertion `(char*)p >= sbrk_base' failed.
resetting ...

Following are a few debug prints:

U-Boot 2011.12 (May 24 2012 - 17:34:38)

U-Boot code: 60800020 -> 60824304  BSS: -> 60858D4C
monitor len: 00058D2C
ramsize: 20000000
TLB table at: 7fff0000
Top of RAM usable for U-Boot at: 7fff0000
Reserving 355k for U-Boot at: 7ff97000
Reserving 640k for malloc() at: 7fef7000
Reserving 32 Bytes for Board Info at: 7fef6fe0
Reserving 120 Bytes for Global Data at: 7fef6f68
New Stack Pointer is: 7fef6f58
RAM Configuration:
Bank #0: 60000000 512 MiB
Bank #1: 80000000 512 MiB
relocation Offset is: 1f796fe0
WARNING: Caches not enabled
monitor flash len: 00028344

Reagrds,
Sandeep
<PRE><font size="2" face="calibri" color="blue">The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material.If you are not the intended recipient of this message please do not read, copy, use or disclose this communication and notify the sender immediately.It should be noted that any review, retransmission, dissemination or other use of, or taking action or reliance upon, this information by persons or entities other than the intended recipient is prohibited.</PRE>

[PATCH 0/7] common/lcd cleanup

Igor Grinberg — 2012-05-24T11:42:37

From: Nikita Kiryanov <nikita< at >compulab.co.il>

This patch series attempts to simplify #ifdef complexity in common/lcd.c. It 
preceeds my future work of adding splash screen support for omap.

It was compile tested on Arm and PowerPC using MAKEALL, and is dependant on the
following patches:
http://patchwork.ozlabs.org/patch/155491/
http://patchwork.ozlabs.org/patch/155492/
http://patchwork.ozlabs.org/patch/155493/
http://patchwork.ozlabs.org/patch/158179/

checkpatch reports warnings on some of the patches:
0001: line over 80 chars
Since the original line was over 80 characters already, and there's no
good way of shortening it, I left it over 80 chars.
0006: WARNING: use of volatile is usually wrong
Since 'volatile' was in the original code I left it in the patch as
well.

Nikita Kiryanov (7):
  common lcd: minor coding style changes
  common lcd: simplify #ifdefs
  common lcd: simplify bitmap_plot
  common lcd: simplify lcd_logo
  common lcd: simplify lcd_display
  common lcd: simplify core functions
  common lcd: simplify lcd_display_bitmap

 common/lcd.c |  422 +++++++++++++++++++++++++++++++---------------------------
 1 files changed, 226 insertions(+), 196 deletions(-)

[PATCH] ARM: OMAP4: Correct the lpddr2 io settingsregister value.

R Sricharan — 2012-05-24T10:30:25

To meet certain timing requirements on the lpddr2 cmd and data phy
interfaces ,lpddr iopads have to be configured as differential buffers
and a Vref has to be internally generated and provided to these buffers.

Correcting the above settings here.

Signed-off-by: R Sricharan <r.sricharan< at >ti.com>
---
Verified this on OMAP4 panda using mtest.

 arch/arm/include/asm/arch-omap4/omap.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 47c5883..03bd923 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
< at >< at > -112,7 +112,7 < at >< at >
 #define CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER0x9E9E9E9E
 #define CONTROL_LPDDR2IO_SLEW_315PS_DRV12_PULL_DOWN0x7C7C7C7C
 #define LPDDR2IO_GR10_WD_MASK(3 << 17)
-#define CONTROL_LPDDR2IO_3_VAL0xA0888C00
+#define CONTROL_LPDDR2IO_3_VAL0xA0888C0F
 
 /* CONTROL_EFUSE_2 */
 #define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_10x00ffc000

[PATCH 1/3] tegra: usb: Add USB support to Tamonten boards

Thierry Reding — 2012-05-24T07:04:45

This adds basic USB support for port 0. Device tree support is needed to
initialize the USB EHCI and will be added in a subsequent patch.

Signed-off-by: Thierry Reding <thierry.reding< at >avionic-design.de>
---
 board/avionic-design/common/tamonten.c |   11 +++++++++++
 board/avionic-design/common/tamonten.h |    2 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
index f23b657..794d90a 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
< at >< at > -68,6 +68,12 < at >< at > static void pin_mux_mmc(void)
 }
 #endif
 
+static void pin_mux_usb_default(void)
+{
+}
+
+void pin_mux_usb(void) __attribute__((weak, alias("pin_mux_usb_default")));
+
 /*
  * Routine: board_init
  * Description: Early hardware init.
< at >< at > -80,6 +86,11 < at >< at > int board_init(void)
 /* boot param addr */
 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
 
+#ifdef CONFIG_USB_EHCI_TEGRA
+pin_mux_usb();
+board_usb_init(gd->fdt_blob);
+#endif
+
 return 0;
 }
 
diff --git a/board/avionic-design/common/tamonten.h b/board/avionic-design/common/tamonten.h
index 0e60b0f..ee101b7 100644
--- a/board/avionic-design/common/tamonten.h
+++ b/board/avionic-design/common/tamonten.h
< at >< at > -26,7 +26,7 < at >< at >
 #ifndef _TAMONTEN_H_
 #define _TAMONTEN_H_
 
-void tegra2_start(void);
 void gpio_config_mmc(void);
+void pin_mux_usb(void);
 
 #endif /* TAMONTEN_H */

[PATCH] tegra: Implement oscillator frequency detection

Thierry Reding — 2012-05-24T07:03:13

Upon reset, the CRC_OSC_CTRL register defaults to a 13 MHz oscillator
input frequency. With Lucas' recent commit b8cb519 ("tegra2: trivially
enable 13 mhz crystal frequency) applied, this breaks on hardware that
provides a different frequency.

The Tegra clock and reset controller provides a means to detect the
input frequency by counting the number of oscillator periods within a
given number of 32 kHz periods. This commit introduces a function,
clock_detect_osc_freq(), which performs this calibration and programs
the CRC_OSC_CTRL accordingly.

This code is loosely based on the Linux kernel Tegra2 clock code.

Signed-off-by: Thierry Reding <thierry.reding< at >avionic-design.de>
---
 arch/arm/cpu/armv7/tegra2/ap20.c           |    2 ++
 arch/arm/cpu/armv7/tegra2/clock.c          |   42 ++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-tegra2/clk_rst.h |    9 ++++++
 arch/arm/include/asm/arch-tegra2/clock.h   |    3 ++
 4 files changed, 56 insertions(+)

diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index 698bfd0..150c713 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
< at >< at > -351,6 +351,8 < at >< at > void tegra2_start(void)
 /* not reached */
 }
 
+clock_detect_osc_freq();
+
 /* Init PMC scratch memory */
 init_pmc_scratch();
 
diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra2/clock.c
index ccad351..77aefbc 100644
--- a/arch/arm/cpu/armv7/tegra2/clock.c
+++ b/arch/arm/cpu/armv7/tegra2/clock.c
< at >< at > -396,6 +396,48 < at >< at > static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {
 NONE(CRAM2),
 };
 
+void clock_detect_osc_freq(void)
+{
+struct clk_rst_ctlr *clkrst =
+(struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+enum clock_osc_freq frequency = CLOCK_OSC_FREQ_COUNT;
+unsigned int periods;
+u32 value;
+
+/* start OSC frequency detection */
+value = OSC_FREQ_DET_TRIGGER | REF_CLK_WIN_CFG(1);
+writel(value, &clkrst->crc_osc_freq_det);
+
+/* wait for detection to complete */
+do {
+value = readl(&clkrst->crc_osc_freq_det_stat);
+if (!(value & OSC_FREQ_DET_BUSY))
+break;
+} while (1);
+
+periods = (value & OSC_FREQ_DET_CNT_MASK) >> OSC_FREQ_DET_CNT_SHIFT;
+
+if (periods >= 732 - 3 && periods <= 732 + 3)
+frequency = CLOCK_OSC_FREQ_12_0;
+else if (periods >= 794 - 3 && periods <= 794 + 3)
+frequency = CLOCK_OSC_FREQ_13_0;
+else if (periods >= 1172 - 3 && periods <= 1172 + 3)
+frequency = CLOCK_OSC_FREQ_19_2;
+else if (periods >= 1587 - 3 && periods <= 1587 + 3)
+frequency = CLOCK_OSC_FREQ_26_0;
+
+/*
+ * Configure oscillator frequency. If the measured frequency isn't
+ * among those supported, keep the default and hope for the best.
+ */
+if (frequency >= CLOCK_OSC_FREQ_COUNT) {
+value = readl(&clkrst->crc_osc_ctrl);
+value &= ~OSC_FREQ_MASK;
+value |= frequency << OSC_FREQ_SHIFT;
+writel(value, &clkrst->crc_osc_ctrl);
+}
+}
+
 /*
  * Get the oscillator frequency, from the corresponding hardware configuration
  * field.
diff --git a/arch/arm/include/asm/arch-tegra2/clk_rst.h b/arch/arm/include/asm/arch-tegra2/clk_rst.h
index 8c3be91..66ca3ff 100644
--- a/arch/arm/include/asm/arch-tegra2/clk_rst.h
+++ b/arch/arm/include/asm/arch-tegra2/clk_rst.h
< at >< at > -128,6 +128,15 < at >< at > struct clk_rst_ctlr {
 #define OSC_XOBP_SHIFT1
 #define OSC_XOBP_MASK(1U << OSC_XOBP_SHIFT)
 
+/* CLK_RST_CONTROLLER_OSC_FREQ_DET_0 */
+#define OSC_FREQ_DET_TRIGGER(1 << 31)
+#define REF_CLK_WIN_CFG(x)((x) & 0xf)
+
+/* CLK_RST_CONTROLLER_OSC_FREQ_DET_STATUS_0 */
+#define OSC_FREQ_DET_BUSY(1 << 31)
+#define OSC_FREQ_DET_CNT_SHIFT0
+#define OSC_FREQ_DET_CNT_MASK(0xffff << OSC_FREQ_DET_CNT_SHIFT)
+
 /*
  * CLK_RST_CONTROLLER_CLK_SOURCE_x_OUT_0 - the mask here is normally 8 bits
  * but can be 16. We could use knowledge we have to restrict the mask in
diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra2/clock.h
index 1d3ae38..a86db42 100644
--- a/arch/arm/include/asm/arch-tegra2/clock.h
+++ b/arch/arm/include/asm/arch-tegra2/clock.h
< at >< at > -192,6 +192,9 < at >< at > enum periph_id {
 /* PLL stabilization delay in usec */
 #define CLOCK_PLL_STABLE_DELAY_US 300
 
+/* detects the oscillator clock frequency */
+void clock_detect_osc_freq(void);
+
 /* return the current oscillator clock frequency */
 enum clock_osc_freq clock_get_osc_freq(void);

[PATCH V5 RESEND 0/3] mtd/NAND: Support for FSMC controller

Amit Virdi — 2012-05-24T05:28:09

This patchset adds support for ST's FSMC controller. In the current u-boot, a
SPEAr specific driver exists for FSMC controller.  This patchset adds a full
fledged driver that can be used across multiple platforms and removes the
obsolete SPEAr specific driver.

V4 -> V5
 - Dropped the patch that defined change_bit as wrapper over __change_bit and,
   instead, defined logic to correct bit errors without using __change_bit

V3 -> V4
 - Removed local_irq_save and local_irq_restore calls from change_bit wrapper
 - Report the total bit flips, including that of ECC, to the upper layers
 - Replace change_bit calls for err_idx's 0th and 1st bit with "^= 3" operation

V2 -> V3
 - Implemented timeout during hardware ecc read
 - Used __attribute__ ((aligned(2))) instead of using array of U16
 - Removed unnecessary enum

V1 -> V2
 - Defined CONFIG_SYS_NAND_SELF_INIT and did the related changes
 - Modified the error index calculation process
 - Modified newly erased page read algorithm
 - Initialized the badblockbits index to 7
 - Improved fsmc_bch8_correct_data() implementation

Vipin KUMAR (3):
  mtd/NAND: Add FSMC driver support
  SPEAr: Configure FSMC driver for NAND interface
  mtd/NAND: Remove obsolete SPEAr specific NAND drivers

 arch/arm/include/asm/arch-spear/hardware.h |    8 +-
 arch/arm/include/asm/arch-spear/spr_nand.h |   57 ----
 board/spear/spear300/spear300.c            |   14 +-
 board/spear/spear310/spear310.c            |   14 +-
 board/spear/spear320/spear320.c            |   13 +-
 board/spear/spear600/spear600.c            |   14 +-
 drivers/mtd/nand/Makefile                  |    1 +
 drivers/mtd/nand/fsmc_nand.c               |  487 ++++++++++++++++++++++++++++
 drivers/mtd/nand/spr_nand.c                |  124 -------
 include/configs/spear-common.h             |    3 +-
 include/configs/spear3xx.h                 |    4 +
 include/configs/spear6xx.h                 |    3 +
 include/linux/mtd/fsmc_nand.h              |  101 ++++++
 13 files changed, 638 insertions(+), 205 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-spear/spr_nand.h
 create mode 100644 drivers/mtd/nand/fsmc_nand.c
 delete mode 100644 drivers/mtd/nand/spr_nand.c
 create mode 100644 include/linux/mtd/fsmc_nand.h

EFI/GPT support in U-Boot : real-world tests

David Purdy — 2012-05-23T23:13:50

Hi folks,

I'm hoping that a few of you (perhaps Kirkwood users in particular)
can tell me of their own personal experiences (hopefully all good)
when using EFI/GPT partitions w/ U-Boot.

Does it work as advertised?

Is it just a matter of setting CONFIG_EFI_PARTITION in the config?

Any unexpected/counterintuitive/gottcha issues to think about?  (other
that proper kernel suppport)

thanks,

Dave

[U-Boot-Users] U-Boot WinCE booting support?

Luc Dechamp — 2012-05-23T13:32:43

Good afternoon, Stephan and Andrea

 

I was looking for information about U-Boot and WinCE when I came across the
message "U-Boot WinCE booting support"

 

Andrea described a function "bootwince" that "check AND decompress" .bin
images and run WinCE.

Has this been implemented yet?

 

If not would it be possible to get a copy of the implementation to be done.

 

http://lists.denx.de/pipermail/u-boot/2008-February/029517.html

 

http://lists.denx.de/pipermail/u-boot/2008-February/029518.html

 

Thank a lot

 

 

Luc

 

 

Luc Dechamp

 
Description: Description: Description: cid:image002.gif< at >01CCE578.44472050
European Commission


Joint Research Centre

Institute for Transuranium Elements

Nuclear Security 

 

 

Via Fermi, 2749 - TP181
21027 Ispra (VA) - Italy

 

Phone:     +39 0332 785076

Fax:         +39 0332 789216

 

Email:        <mailto:luc.dechamp< at >jrc.ec.europa.eu>
luc.dechamp< at >jrc.ec.europa.eu

 

Web Site:  <http://npns.jrc.it/> http://npns.jrc.it

 

"The views expressed are purely those of the writer and may not in any
circumstances be regarded as stating an official position of the European
Commission."

 

_______________________________________________
U-Boot mailing list
U-Boot< at >lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

undefined reference to `net_set_upd_handler'

Stephan Linz — 2012-05-23T22:46:49

Hello Joe,

just I've tried out your custodian network tree at a99acb7 and run in
the link error below:

net/libnet.o: In function `NetLoop':
net/net.c:539: undefined reference to `net_set_upd_handler'

I think it is a typo in commit 6476b33, or not?

The patch snipped below would fix it. It works to me.



diff --git a/net/net.c b/net/net.c
index 159b91a..9de7d92 100644
--- a/net/net.c
+++ b/net/net.c
< at >< at > -536,7 +536,7 < at >< at > restart:
done:
#ifdef CONFIG_CMD_TFTPPUT
        /* Clear out the handlers */
-       net_set_upd_handler(NULL);
+       net_set_udp_handler(NULL);
        net_set_icmp_handler(NULL);
#endif
        return ret;



br,
Stephan