gmane.linux.kernel.pci

[PATCH v7 00/10] PCI, x86: update MMCFG information when hot-plugging PCI host bridges

Jiang Liu — 2012-05-26T09:53:53

This patchset enhance pci_root driver to update MMCFG information when
hot-plugging PCI root bridges. It applies to 
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git pci/next-3.5

-v2: split into smaller patches and skip updating MMCFG information when
     MMCFG is disabled
-v3: add mmconf_added to simply free path, also make pci_mmconfig_insert()
     to process extra exist case --- By Yinghai
-v4: tune arch_acpi_pci_root_add() to handle a corner case raised by Kenji
-v5: address review comments from Bjorn and Taku, also better handle corner
     cases in arch_acpi_pci_root_add()
-v6: get rid of arch_acpi_pci_root_xxx() by using existing hooks
     add MCFG information for host bridges on demand
     more corner cases clear up
     correctly handle condition compilation
     fix section mismatch issues
     fix a issue reported by Taku about a BIOS bug
-v7: unify log messages
     remove redundant host bridge resource related log messages
     fix a issue reported by Taku which breaks pnp reso

[PATCH v7 04/10] PCI, x86: introduce pci_mmcfg_arch_map()/pci_mmcfg_arch_unmap()

Jiang Liu — 2012-05-26T09:53:57

Introduce pci_mmcfg_arch_map()/pci_mmcfg_arch_unmap(), which will be used
when supporting PCI root bridge hotplug.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/include/asm/pci_x86.h |    2 ++
 arch/x86/pci/mmconfig_32.c     |   15 +++++++++++++++
 arch/x86/pci/mmconfig_64.c     |   22 +++++++++++++++++++++-
 3 files changed, 38 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index b3a5317..df898ce 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
< at >< at > -135,6 +135,8 < at >< at > struct pci_mmcfg_region {
 
 extern int __init pci_mmcfg_arch_init(void);
 extern void __init pci_mmcfg_arch_free(void);
+extern int __devinit pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg);
+extern void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg);
 extern struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus);
 
 extern struct list_head pci_mmcfg_list;
diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c
i

[PATCH v7 05/10] PCI, x86: introduce pci_mmconfig_insert()/delete() for PCI root bridge hotplug

Jiang Liu — 2012-05-26T09:53:58

Introduce pci_mmconfig_insert()/pci_mmconfig_delete(), which will be used to
update MMCFG information when supporting PCI root bridge hotplug.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/include/asm/pci_x86.h |    4 +
 arch/x86/pci/mmconfig-shared.c |  213 ++++++++++++++++++++++++++++++++--------
 2 files changed, 177 insertions(+), 40 deletions(-)

diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index df898ce..b2fb1d8 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
< at >< at > -137,6 +137,10 < at >< at > extern int __init pci_mmcfg_arch_init(void);
 extern void __init pci_mmcfg_arch_free(void);
 extern int __devinit pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg);
 extern void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg);
+extern int __devinit pci_mmconfig_insert(struct device *dev,
+ uint16_t seg, uint8_t start,
+ uint8_t end, phys_addr_t addr);
+extern int pci_mmconfig_delete(uint16_t seg, uint8_t start, uint8_t end);
 extern struc

[PATCH v7 01/10] PCI, x86: split out pci_mmcfg_check_reserved() for code reuse

Jiang Liu — 2012-05-26T09:53:54

Split out pci_mmcfg_check_reserved() for code reuse, which will be used
when supporting PCI host bridge hotplug.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/pci/mmconfig-shared.c |   51 +++++++++++++++++++--------------------
 1 files changed, 25 insertions(+), 26 deletions(-)

diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 301e325..f799949 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
< at >< at > -474,39 +474,38 < at >< at > static int __init is_mmconf_reserved(check_reserved_t is_reserved,
 return valid;
 }
 
+static int __devinit pci_mmcfg_check_reserved(struct pci_mmcfg_region *cfg,
+      int early)
+{
+if (!early && !acpi_disabled) {
+if (is_mmconf_reserved(is_acpi_reserved, cfg, 0))
+return 1;
+else
+printk(KERN_ERR FW_BUG PREFIX
+       "MMCONFIG at %pR not reserved in "
+       "ACPI motherboard resources\n",
+       &cfg->res);
+}
+
+/* Don't try to do this check unless configuration
+   type 1 is availa

[PATCH v7 07/10] PCI, x86: update MMCFG information when hot-plugging PCI host bridges

Jiang Liu — 2012-05-26T09:54:00

This patch enhances x86 arch specific code to update MMCFG information
when PCI host bridge hotplug event happens.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/include/asm/pci_x86.h |    1 +
 arch/x86/pci/acpi.c            |   69 ++++++++++++++++++++++++++++++++++++++++
 arch/x86/pci/mmconfig-shared.c |    7 +---
 arch/x86/pci/mmconfig_32.c     |    2 +-
 arch/x86/pci/mmconfig_64.c     |    2 +-
 5 files changed, 73 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index b2fb1d8..3e5f43c 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
< at >< at > -100,6 +100,7 < at >< at > struct pci_raw_ops {
 extern const struct pci_raw_ops *raw_pci_ops;
 extern const struct pci_raw_ops *raw_pci_ext_ops;
 
+extern const struct pci_raw_ops pci_mmcfg;
 extern const struct pci_raw_ops pci_direct_conf1;
 extern bool port_cf9_safe;
 
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 2bb885a..76ad029 100644
--- a/arch/x86/pci/acpi.c

[PATCH v7 10/10] PCI, x86: get rid of redundant log messages

Jiang Liu — 2012-05-26T09:54:03

For each resource of a PCI host bridge, the arch code and PCI
code log following messages:
"pci_root PNP0A08:00: host bridge window [io 0x0000-0x03af]",
"pci_bus 0000:00: root bus resource [io  0x0000-0x03af]"

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/pci/acpi.c |    7 -------
 1 files changed, 0 insertions(+), 7 deletions(-)

diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 76ad029..4368387 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
< at >< at > -295,13 +295,6 < at >< at > setup_resource(struct acpi_resource *acpi_res, void *data)
 }
 
 info->res_num++;
-if (addr.translation_offset)
-dev_info(&info->bridge->dev, "host bridge window %pR "
- "(PCI address [%#llx-%#llx])\n",
- res, res->start - addr.translation_offset,
- res->end - addr.translation_offset);
-else
-dev_info(&info->bridge->dev, "host bridge window %pR\n", res);
 
 return AE_OK;
 }

[PATCH v7 09/10] PCI, x86: simplify pci_mmcfg_late_insert_resources()

Jiang Liu — 2012-05-26T09:54:02

Reduce redundant code to simplify pci_mmcfg_late_insert_resources().

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/pci/mmconfig-shared.c |   34 ++++++++--------------------------
 1 files changed, 8 insertions(+), 26 deletions(-)

diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index e80b5c2..77f0db2 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
< at >< at > -27,7 +27,6 < at >< at >
 #define PREFIX "PCI: "
 
 /* Indicate if the mmcfg resources have been placed into the resource table. */
-static int __initdata pci_mmcfg_resources_inserted;
 static bool pci_mmcfg_running_state;
 static bool pci_mmcfg_arch_init_failed;
 static DEFINE_MUTEX(pci_mmcfg_lock);
< at >< at > -374,18 +373,6 < at >< at > static int __init pci_mmcfg_check_hostbridge(void)
 return !list_empty(&pci_mmcfg_list);
 }
 
-static void __init pci_mmcfg_insert_resources(void)
-{
-struct pci_mmcfg_region *cfg;
-
-list_for_each_entry(cfg, &pci_mmcfg_list, list)
-if (!cfg->res.parent)
-insert_resource(&i

[PATCH v7 06/10] PCI, ACPI: provide MCFG address for PCI host bridges

Jiang Liu — 2012-05-26T09:53:59

This patch provide MCFG address for PCI host bridges, which will
be used to support host bridge hotplug. It gets MCFG address
by evaluating _CBA method if available, or by scanning the ACPI
MCFG table.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 drivers/acpi/pci_root.c  |   12 ++++++++++++
 drivers/pci/pci-acpi.c   |   34 ++++++++++++++++++++++++++++++++++
 include/acpi/acnames.h   |    1 +
 include/acpi/acpi_bus.h  |    3 +++
 include/linux/pci-acpi.h |    5 +++++
 5 files changed, 55 insertions(+), 0 deletions(-)

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 7aff631..fc716cf 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
< at >< at > -458,6 +458,7 < at >< at > static int __devinit acpi_pci_root_add(struct acpi_device *device)
 acpi_handle handle;
 struct acpi_device *child;
 u32 flags, base_flags;
+int end_bus = -1;
 
 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
 if (!root)
< at >< at > -505,6 +506,17 < at >< at > static int __devinit acpi_pci_root_add(struct acpi_device *devi

[PATCH v7 08/10] PCI, x86: add MMCFG information on demand

Jiang Liu — 2012-05-26T09:54:01

This patch changes mmconfig logic on x86 platforms to add MMCFG
information on demand instead of adding all MMCFG entries from
the ACPI MCFG table at boot time. So only MMCFG address ranges
used by active PCI host bridges will be actually mapped.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/include/asm/pci_x86.h |    5 +++
 arch/x86/pci/legacy.c          |    1 +
 arch/x86/pci/mmconfig-shared.c |   54 +++++++++++++++++++++++++++++++++++++---
 3 files changed, 56 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index 3e5f43c..4a1a9aa 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
< at >< at > -142,6 +142,11 < at >< at > extern int __devinit pci_mmconfig_insert(struct device *dev,
  uint16_t seg, uint8_t start,
  uint8_t end, phys_addr_t addr);
 extern int pci_mmconfig_delete(uint16_t seg, uint8_t start, uint8_t end);
+#ifdefCONFIG_ACPI
+extern void pci_mmconfig_probe(uint8_t start);
+#else
+static inline void pci

[PATCH v7 03/10] PCI, x86: use RCU list to protect mmconfig list

Jiang Liu — 2012-05-26T09:53:56

Use RCU list to protect mmconfig list from dynamic change
when supporting PCI host bridge hotplug.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/pci/mmconfig-shared.c |   18 ++++++++++++------
 arch/x86/pci/mmconfig_32.c     |   13 +++++++++++--
 arch/x86/pci/mmconfig_64.c     |   13 +++++++++++--
 3 files changed, 34 insertions(+), 10 deletions(-)

diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 5e2cd2a..0ac97d5 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
< at >< at > -17,6 +17,8 < at >< at >
 #include <linux/bitmap.h>
 #include <linux/dmi.h>
 #include <linux/slab.h>
+#include <linux/mutex.h>
+#include <linux/rculist.h>
 #include <asm/e820.h>
 #include <asm/pci_x86.h>
 #include <asm/acpi.h>
< at >< at > -25,6 +27,7 < at >< at >
 
 /* Indicate if the mmcfg resources have been placed into the resource table. */
 static int __initdata pci_mmcfg_resources_inserted;
+static DEFINE_MUTEX(pci_mmcfg_lock);
 
 LIST_HEAD(pci_mmcfg_list);
 
< at >< at > -45,20 +48,20 < at >< at > static __init

[PATCH v7 02/10] PCI, x86: split out pci_mmconfig_alloc() for code reuse

Jiang Liu — 2012-05-26T09:53:55

Split out pci_mmconfig_alloc() for code reuse, which will be used
when supporting PCI root bridge hotplug.

Signed-off-by: Jiang Liu <liuj97< at >gmail.com>
---
 arch/x86/pci/mmconfig-shared.c |   19 +++++++++++++++----
 1 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index f799949..5e2cd2a 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
< at >< at > -61,8 +61,9 < at >< at > static __init void list_add_sorted(struct pci_mmcfg_region *new)
 list_add_tail(&new->list, &pci_mmcfg_list);
 }
 
-static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
-int end, u64 addr)
+static __devinit struct pci_mmcfg_region *pci_mmconfig_alloc(int segment,
+     int start,
+     int end, u64 addr)
 {
 struct pci_mmcfg_region *new;
 struct resource *res;
< at >< at > -79,8 +80,6 < at >< at > static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
 new->start_bus = start;
 new->end_bus = en

warn_slowpath_common in drivers/pci/search.c:44 on linux-3.4.0

Antonio Quartulli — 2012-05-26T08:25:52

Hello,

I'm getting this warning with linux-3.4.0. My laptop is a DELL E5420.
Please tell me if you need further testing/debug.

Cheers,

[    1.054279] WARNING: at drivers/pci/search.c:44 pci_find_upstream_pcie_bridge+0x5e/0x70()
[    1.054385] Hardware name: Latitude E5420
[    1.054457] Modules linked in:
[    1.054568] Pid: 1, comm: swapper/0 Not tainted 3.4.0ordex+ #3
[    1.054643] Call Trace:
[    1.054716]  [<ffffffff81033d4a>] warn_slowpath_common+0x7a/0xb0
[    1.054793]  [<ffffffff81033d95>] warn_slowpath_null+0x15/0x20
[    1.054869]  [<ffffffff8123899e>] pci_find_upstream_pcie_bridge+0x5e/0x70
[    1.054949]  [<ffffffff813babe7>] intel_iommu_device_group+0x77/0x100
[    1.055027]  [<ffffffff813b52d5>] add_iommu_group+0x35/0x60
[    1.055113]  [<ffffffff813b52a0>] ? bus_set_iommu+0x50/0x50
[    1.055191]  [<ffffffff8132c586>] bus_for_each_dev+0x56/0x90
[    1.055267]  [<ffffffff813b528b>] bus_set_iommu+0x3b/0x50
[    1.055344]  [<ffffffff818c4920>] intel_iommu_init+0xab0/0xb3f
[    1.055421]  [<f

(unknown)

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Re: [PATCH 02/11] PCI: Try to allocate mem64 above 4G at first

Bjorn Helgaas — 2012-05-26T00:12:39

I think the first one looks good.

I'm curious about the second.  Why did you add the IORESOURCE_MEM
test?  That's doesn't affect the "start =" piece because
IORESOURCE_MEM is always set if IORESOURCE_MEM_64 is set.

But it does affect the "end =" part.  Previously we limited all I/O
and 32-bit mem BARs to the low 4GB.  This patch makes it so we limit
32-bit mem BARs to the low 4GB, but we don't limit I/O BARs.  But I/O
BARs can only have 32 bits of address, so it seems like we should
limit them the same way as 32-bit mem BARs.  So I expected something
like this:

    if (res->flags & IORESOURCE_MEM_64) {
        start = (resource_size_t) (1ULL << 32);
        end = PCI_MAX_RESOURCE;
    } else {
        start = 0;
        end = PCI_MAX_RESOURCE_32;
    }

Re: [PATCH 02/11] PCI: Try to allocate mem64 above 4G at first

Bjorn Helgaas — 2012-05-25T22:14:53

We are allocating from the resources available on this bus, which
means the host bridge apertures or a subset.  If the arch supplies
those, that should be enough.  If it doesn't, we default to
iomem_resource.  On x86, we trim that down to only the supported
address space:

        iomem_resource.end = (1ULL << boot_cpu_data.x86_phys_bits) - 1;

But I'm sure some other architectures don't do that yet.  I guess
that's one of the risks -- if an arch is doesn't tell us the apertures
and doesn't trim iomem_resource, we could allocate a non-addressable
region.

Bjorn

Re: [PATCH 02/11] PCI: Try to allocate mem64 above 4G at first

H. Peter Anvin — 2012-05-25T21:58:52

Do we also need to track the maximum address available to the CPU?

-hpa

Re: [PATCH 02/11] PCI: Try to allocate mem64 above 4G at first

Bjorn Helgaas — 2012-05-25T21:55:01

Yeah, I convince myself of the dumbest things sometimes.  It occurred
to me while driving home that we need this, but you beat me to it :)

I think we actually have a separate bug here.  On 64-bit non-x86
architectures, PCIBIOS_MAX_MEM_32 is a 64-bit -1, so the following
attempt to avoid putting a 32-bit BAR above 4G only works on x86,
where PCIBIOS_MAX_MEM_32 is 0xffffffff.

        /* don't allocate too high if the pref mem doesn't support 64bit*/
        if (!(res->flags & IORESOURCE_MEM_64))
                max = PCIBIOS_MAX_MEM_32;

I think we should fix this with a separate patch that removes
PCIBIOS_MAX_MEM_32 altogether, replacing this use with an explicit
0xffffffff (or some other "max 32-bit value" symbol).  I don't think
there's anything arch-specific about this.

So I'd like to see two patches here:
  1) Avoid allocating 64-bit regions for 32-bit BARs
  2) Try to allocate regions above 4GB for 64-bit BARs


I would support that.

Bjorn

Re: [PATCH 02/11] PCI: Try to allocate mem64 above 4G at first

H. Peter Anvin — 2012-05-25T20:18:18

And so it is (assuming, of course, that we can address that memory.)

-hpa

Re: [PATCH 02/11] PCI: Try to allocate mem64 above 4G at first

Bjorn Helgaas — 2012-05-25T19:37:16

That's goofy.  You're proposing to make only x86_64 and x86-PAE try to put
64-bit BARs above 4GB.  Why should this be specific to x86?  I acknowledge
that there's risk in doing this, but if it's a good idea for x86_64, it
should also be a good idea for other 64-bit architectures.

And testing for "is this x86_32 without PAE?" with
"PCIBIOS_MAX_MEM_32 == -1" is just plain obtuse and hides an
important bit of arch-specific behavior.

Tangential question about allocate_resource():  Is its "max" argument
really necessary?  We'll obviously only allocate from inside the root
resource, so "max" is just a way to artificially avoid the end of
that resource.  Is there really a case where that's required?

"min" makes sense because in a case like this, it's valid to allocate from
anywhere in the root resource, but we want to try to allocate from the >4GB
part first, then fall back to allocating from the whole resource.  I'm not
sure there's a corresponding case for "max."

Getting back to this patch, I don't think we

[PATCH] lspci: zero address in IO isn't always unassigned

Aaron Sierra — 2012-05-25T19:11:39

Zero is a valid address in I/O space, so display it and it's associated
size when IO is enabled in the PCI command register.

From arch/powerpc/kernel/pci-common.c:

/* Here, we are a bit different than memory as typically IO space
 * starting at low addresses -is- valid. What we do instead [is] that
 * we consider as unassigned anything that doesn't have IO enabled
 * in the PCI command register, and that's it.
 */

Signed-off-by: Aaron Sierra <asierra< at >xes-inc.com>
---
 lib/sysfs.c |    2 +-
 lspci.c     |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sysfs.c b/lib/sysfs.c
index 1ec4afb..2197fab 100644
--- a/lib/sysfs.c
+++ b/lib/sysfs.c
< at >< at > -125,7 +125,7 < at >< at > sysfs_get_resources(struct pci_dev *d)
 break;
       if (sscanf(buf, "%llx %llx %llx", &start, &end, &flags) != 3)
 a->error("Syntax error in %s", namebuf);
-      if (start)
+      if (end > start)
 size = end - start + 1;
       else
 size = 0;
diff --git a/lspci.c b/lspci.c
index 681ef6a..a67a516 100644
--- a/lspci.c

Re: [PATCH 02/11] PCI: Try to allocate mem64 above 4G at first

Yinghai Lu — 2012-05-25T18:39:26

please check if attached one is more clear.

make max and bottom is only related to _MEM and not default one.

-       if (!(res->flags & IORESOURCE_MEM_64))
-               max = PCIBIOS_MAX_MEM_32;
+       if (res->flags & IORESOURCE_MEM) {
+               if (!(res->flags & IORESOURCE_MEM_64))
+                       max = PCIBIOS_MAX_MEM_32;
+               else if (PCIBIOS_MAX_MEM_32 != -1)
+                       bottom = (resource_size_t)(1ULL<<32);
+       }

will still not affect to other arches.


Thanks

Yinghai