gmane.comp.emulators.kvm.devel

Re: [PATCH v4 07/32] arm64: KVM: architecture specific MMU backend

Catalin Marinas — 2013-05-20T15:57:40

Not that it would make much difference but for consistency - we use esr
as an 'unsigned int' in the arm64 code (only 32-bit needed).

Re: [PATCH v4 06/32] arm64: KVM: fault injection into a guest

Catalin Marinas — 2013-05-20T15:53:02

Reviewed-by: Catalin Marinas <catalin.marinas< at >arm.com>
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Re: [PATCH 00/18] KVM/MIPS32: Support for the new Virtualization ASE (VZ-ASE)

David Daney — 2013-05-20T15:50:24

Two questions:

1) How are you handling not clobbering the Guest K0/K1 registers when a 
Root exception occurs?  It is not obvious to me from inspecting the code.

2) What environment are you using to test this stuff?

David Daney



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Re: [PATCH v4 05/32] arm64: KVM: Basic ESR_EL2 helpers and vcpu register access

Marc Zyngier — 2013-05-20T15:45:15

I like them very much. The compiler handles the conversion perfectly
fine, but the '!!' makes the intent explicit, and someone reviewing the
code won't be tempted to change the return type to u64 or something similar.


Thanks,

M.

Re: [PATCH v4 02/32] arm64: KVM: HYP mode idmap support

Marc Zyngier — 2013-05-20T15:43:06

Indeed. I'll update the check.


Thanks,

M.

Re: [PATCH v4 04/32] arm64: KVM: system register definitions for 64bit guests

Catalin Marinas — 2013-05-20T15:38:23

Reviewed-by: Catalin Marinas <catalin.marinas< at >arm.com>
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Re: [PATCH v4 03/32] arm64: KVM: EL2 register definitions

Catalin Marinas — 2013-05-20T15:35:58

Reviewed-by: Catalin Marinas <catalin.marinas< at >arm.com>
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Re: [PATCH v4 02/32] arm64: KVM: HYP mode idmap support

Catalin Marinas — 2013-05-20T15:31:43

...

Is __hyp_idmap_text_end inclusive or exclusive? I think the latter and
you can use greater than (without equal).

Otherwise:

Reviewed-by: Catalin Marinas <catalin.marinas< at >arm.com>
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[PATCH tip/core/rcu 2/2] powerpc,kvm: fix imbalance srcu_read_[un]lock()

Paul E. McKenney — 2013-05-20T14:52:33

From: Lai Jiangshan <laijs< at >cn.fujitsu.com>

At the point of up_out label in kvmppc_hv_setup_htab_rma(),
srcu read lock is still held.

We have to release it before return.

Signed-off-by: Lai Jiangshan <laijs< at >cn.fujitsu.com>
Cc: Marcelo Tosatti <mtosatti< at >redhat.com>
Cc: Gleb Natapov <gleb< at >redhat.com>
Cc: Alexander Graf <agraf< at >suse.de>
Cc: Benjamin Herrenschmidt <benh< at >kernel.crashing.org>
Cc: Paul Mackerras <paulus< at >samba.org>
Cc: kvm< at >vger.kernel.org
Cc: kvm-ppc< at >vger.kernel.org
Signed-off-by: Paul E. McKenney <paulmck< at >linux.vnet.ibm.com>
Reviewed-by: Josh Triplett <josh< at >joshtriplett.org>
---
 arch/powerpc/kvm/book3s_hv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 9de24f8..ec4c28a 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
< at >< at > -1862,7 +1862,7 < at >< at > static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
 
  up_out:
 up_read(&current->mm->mmap_sem);
-goto out;
+goto out_srcu;
 }
 
 int k

Re: [PATCH v4 01/32] arm64: KVM: define HYP and Stage-2 translation page flags

Catalin Marinas — 2013-05-20T14:29:58

Reviewed-by: Catalin Marinas <catalin.marinas< at >arm.com>
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Re: [PATCH v3 08/13] nEPT: Some additional comments

Paolo Bonzini — 2013-05-20T13:21:52

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

Reviewed-by: Paolo Bonzini <pbonzini< at >redhat.com>
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Re: [PATCH v3 06/13] nEPT: Fix cr3 handling in nested exit and entry

Paolo Bonzini — 2013-05-20T13:19:37

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

Reviewed-by: Paolo Bonzini <pbonzini< at >redhat.com>

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Re: [PATCH v3 07/13] nEPT: Fix wrong test in kvm_set_cr3

Paolo Bonzini — 2013-05-20T13:17:58

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

Makes sense, but did you test what happens (without nesting, and both
with/without EPT) if L1 points CR3 at an invalid physical address?  Does
a basic level of sanity remain?

Paolo
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Re: [PATCH v3 13/13] nEPT: Inject EPT violation/misconfigration

Paolo Bonzini — 2013-05-20T13:09:51

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

This comment is now wrong.


And this shows that patch 5 ("nEPT: MMU context for nested EPT") was
wrong in this respect.  Perhaps this patch should be moved earlier in
the series, so that the exit qualification is "bisectably" ok.

1) the updating of exit_qualification in walk_addr_generic should be
split out and moved before patch 5;

2) the changes to handle_ept_violation and nested_ept_inject_page_fault
(plus fixing the above comment) should also be split out, this time to
squash them in patch 5.  These two changes ensure that patch 5 can
already use the right exit qualification.

3) if needed to make the series bisectable, squash patch 12 into patch 2
and make is_rsvd_bits_set always return 0 in patch 3; then the rest of
the handling of reserved bits (including the introduction of
check_tdp_pte) will remain here. Otherwise, just squash what's left of
this patch into patch 12 and again change the subject.   In either case
the subject will have to change.

Pao

Re: [PATCH v3 09/13] nEPT: Advertise EPT to L1

Paolo Bonzini — 2013-05-20T13:05:40

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

This patch is ok, but it must be placed after patch 10 ("nEPT: Nested
INVEPT").

Paolo


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Re: [PATCH v3 10/13] nEPT: Nested INVEPT

Paolo Bonzini — 2013-05-20T12:46:46

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

Duplicate code:

switch (type) {
case VMX_EPT_EXTENT_GLOBAL
ok = (nested_vmx_ept_caps & VMX_EPT_EXTENT_GLOBAL_BIT) != 0;
break;
...
default:
ok = false;
break;
}
if (ok) {
/* Do nothing: ... */
nested_vmx_succeed(vcpu);
} else {
nested_vmx_failValid(vcpu, ...);
}
break;

Paolo


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Re: [PATCH v3 04/13] nEPT: Define EPT-specific link_shadow_page()

Paolo Bonzini — 2013-05-20T12:43:18

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

The function is small enough that likely the compiler will inline it.
You can just handle it unconditionally with FNAME().

Paolo


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Re: [PATCH v3 02/13] nEPT: Move gpte_access() and prefetch_invalid_gpte() to paging_tmpl.h

Paolo Bonzini — 2013-05-20T12:34:31

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

Reviewed-by: Paolo Bonzini <pbonzini< at >redhat.com>
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Re: [PATCH v3 01/13] nEPT: Support LOAD_IA32_EFER entry/exit controls for L1

Paolo Bonzini — 2013-05-20T12:33:48

Il 19/05/2013 06:52, Jun Nakajima ha scritto:

VM_ENTRY_LOAD_IA32_EFER is not emulated by vmx_set_efer, so:

    /* vmcs12's VM_ENTRY_LOAD_IA32_EFER and VM_ENTRY_IA32E_MODE
     * are emulated below.  VM_ENTRY_IA32E_MODE is handled in
     * vmx_set_efer().  */

Paolo


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Re: [PATCH] emulator: add MUL tests

Gleb Natapov — 2013-05-20T12:32:41

Applied, thanks.


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Re: [PATCH 2/8] KVM: x86 emulator: decode extended accumulator explicity

Gleb Natapov — 2013-05-20T12:32:30

Was trying to create decode tables so that this one will not be
necessary, but it will require to have two group3 arrays, one for ByteOp
and another for non ByteOp. Not nice.

But what I noticed is that current code writes into NULL pointer when
ByteOp mul/div is emulated. It happens because src operand stays
undecoded, but since SrcWrite is set for the instruction src operand is
written back anyway. Since it is undecoded op->type is zero and
op->addr.reg is NULL and type zero happens to be OP_REG, so
write_register_operand() is called with op->addr.reg == NULL.

We should do op->type = OP_NONE if !ByteOp here.

Will fix and apply, try to come up with a way to express it via decode
tables on top.


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