gmane.linux.ubuntu.devel.kernel.general

APPLIED: [PATCH 0/1] LP#1002388 -- postinst symlink failures

Tim Gardner — 2012-05-25T17:58:07

ACK: [PATCH 1/1] UBUNTU: [Config] fix up postinst to ensure we knowwhich error is which

Brad Figg — 2012-05-25T17:34:43

ACK: [PATCH 1/1] UBUNTU: [Config] fix up postinst to ensure we knowwhich error is which

Tim Gardner — 2012-05-25T16:44:35

[PATCH 0/1] LP#1002388 -- postinst symlink failures

Andy Whitcroft — 2012-05-25T16:34:27

We have been seeing a number of postinst failures related to symlinks
not being handled correctly.  Sadly the postinst has the same messages in
multiple places so it is hard to even know which bits are being exercised.
Fix up all the errors so that they report their line number in the output
to make this more diagnosable.  Note this is _not_ a fix for the issue
mearly debug to try and help find the issue.

Proposing for SRU to precise.

-apw

Andy Whitcroft (1):
  UBUNTU: [Config] fix up postinst to ensure we know which error is
    which

 debian/control-scripts/postinst |   24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

[PATCH 1/1] UBUNTU: [Config] fix up postinst to ensure we know whicherror is which

Andy Whitcroft — 2012-05-25T16:34:28

We are seeing cases of errors from the postinst saying "Failed to
symbolic-link", but there are more than one of these in the script.
Convert all of these errors to errors without newline which will trigger
perl to add "at FILE line line NN.".  Also be consistant about format
and spaceing for error string ($!) printing.

BugLink: http://bugs.launchpad.net/bugs/1002388
Signed-off-by: Andy Whitcroft <apw< at >canonical.com>
---
 debian/control-scripts/postinst |   24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/debian/control-scripts/postinst b/debian/control-scripts/postinst
index ce5ae56..b6ed9f8 100644
--- a/debian/control-scripts/postinst
+++ b/debian/control-scripts/postinst
< at >< at > -332,7 +332,7 < at >< at > sub really_move_image {
                    " $target");
   if ($ret) {
     die("Failed to move " . $src_dir . "$target to "
-        . $dest_dir . "$target.\n");
+        . $dest_dir . "$target");
   }
   # Ok, now we may clobber the previous .old files
   if (-e "$target.$$") {
< at >< at > -367,13 +367,13 < at >< at > sub really_reverse_link {
   if ($use_hard_links =~ m/YES/i) {
     link($Old . "$link_name", $src_dir . "$link_name") ||
       die("Failed to link " . $dest_dir . "$link_name to " . $src_dir . 
-          "$link_name .\n");
+          "$link_name:$!");
     warn "ln " . $Old . "$link_name " . $src_dir . "$link_name"  if $DEBUG;
   }
   else {
     symlink($Old . "$link_name", $src_dir . "$link_name") ||
       die("Failed to symbolic-link " . $dest_dir . "$link_name to " . $src_dir
-          . "$link_name : $!\n");
+          . "$link_name:$!");
     warn "ln -s " . $Old . "$link_name " . $src_dir . "$link_name" if $DEBUG;
   }
 }
< at >< at > -512,7 +512,7 < at >< at > sub really_move_link {
     if (! link("${Old}${image_name}", "$kimage")) {
       rename("$kimage.$$", "$kimage");
       die("Failed to link ${Old}${image_name} to " .
-          "${image_dest}${kimage}.\n");
+          "${image_dest}${kimage}:$!");
     }
   } 
   else {
< at >< at > -520,7 +520,7 < at >< at > sub really_move_link {
     if (! symlink("${Old}${image_name}", "$kimage")) {
       rename("$kimage.$$", "$kimage");
       die("Failed to symbolic-link ${Old}${image_name} to " .
-          "${image_dest}${kimage}: $!\n");
+          "${image_dest}${kimage}:$!");
     }
   }
 
< at >< at > -555,7 +555,7 < at >< at > sub handle_missing_link {
                      "$image_name "   . " $kimage");
     if ($ret) {
       die("Failed to copy " . $realimageloc . "$image_name to "
-          . $image_dest . "$kimage .\n");
+          . $image_dest . "$kimage");
     }
   } 
   elsif ($reverse_symlink) {
< at >< at > -564,7 +564,7 < at >< at > sub handle_missing_link {
                      . "$kimage");
     if ($ret) {
       die("Failed to move " . $realimageloc . "$image_name to "
-          . $image_dest . "$kimage .\n");
+          . $image_dest . "$kimage");
     }
   } 
   else {
< at >< at > -612,7 +612,7 < at >< at > sub handle_missing_link {
     $Old ="" if $rel_path =~ m/^\s*$/o;
 
     symlink($Old . "$Name", "$Link_Dest") ||
-      die("Failed to symbolic-link ${Old}$Name to $Link_Dest: $!\n");
+      die("Failed to symbolic-link ${Old}$Name to $Link_Dest:$!");
     warn "ln -s ${Old}$Name $Link_Dest" if $DEBUG;
 
   }
< at >< at > -647,7 +647,7 < at >< at > sub handle_non_symlinks {
         warn "mv $kimage.$$ $kimage" if $DEBUG;
       }
       die("Failed to copy " . $realimageloc . "$image_name to "
-          . $image_dest . "$kimage .\n");
+          . $image_dest . "$kimage");
     }
   }
   ##,#### 
< at >< at > -663,7 +663,7 < at >< at > sub handle_non_symlinks {
         warn "mv $kimage.$$ $kimage" if $DEBUG;
       }
       die("Failed to move " . $realimageloc . "$image_name to "
-          . $image_dest . "$kimage .\n");
+          . $image_dest . "$kimage");
     }
     my $Old = $image_dest;
     if (test_relative ('Old Dir' => $Old, 'New Dir' => $realimageloc,
< at >< at > -711,7 +711,7 < at >< at > sub handle_non_symlinks {
       warn "mv $kimage.$$ $kimage" if $DEBUG;
       rename("$kimage.$$", "$kimage");
       die("Failed to link " . $realimageloc . "$image_name to "
-          . $image_dest . "$kimage .\n");
+          . $image_dest . "$kimage");
     }
   }
   ##,####
< at >< at > -728,7 +728,7 < at >< at > sub handle_non_symlinks {
         rename("$kimage.$$", "$kimage");
       }
       die("Failed to copy " . $realimageloc . "$image_name to "
-          . $image_dest . "$kimage .\n");
+          . $image_dest . "$kimage");
     }
   }
   # Ok, now we may clobber the previous .old file

Re: APPLIED: [Quantal] Built-in xen-acpi-processor

Stefan Bader — 2012-05-25T15:49:48

Doh! Yeah, should have done that... :/

APPLIED: [Quantal] Built-in xen-acpi-processor

Tim Gardner — 2012-05-25T15:45:04

I also jammed in a bit of patch that removes xen-acpi-processor from the
ABI files so we don't get a module check build failure.

rtg

Re: namespace attach (setns) patches

Bryan Wu — 2012-05-25T15:09:57

On Sat, May 19, 2012 at 3:44 AM, Serge Hallyn
<serge.hallyn< at >canonical.com> wrote:

Right, I saw Eric's patches were pulled by Linus during this merge
window. IIRC, it's from here:
http://git.kernel.org/?p=linux/kernel/git/ebiederm/user-namespace.git;a=shortlog
Totally 46 patches.


Where is these remaining setns patches?


Nice, do you know where are these patches hosted? any git tree for pulling?


Exactly, these pid namespace patches look like quite old now. Probably
we should wait for Eric's new set.


If there is no git, please forward. Thanks.

Serge, my plan to setup lxc as test environment for our further
kernel, which should include Eric's or others' user namespace patches.
I tried your lxctest on my OMAP4 Panda board. I think some testing
failed, please find my log here: http://pastebin.ubuntu.com/1006351/

I really appreciate you can help to take a look at this.

Thanks a lot,

[Quantal] Built-in xen-acpi-processor

Stefan Bader — 2012-05-25T14:26:30

That probably needs some change somewhere to make it the
policy...

-Stefan

From 5b39c30d1f30b8874932f60747753057b2a3ca1e Mon Sep 17 00:00:00 2001
From: Stefan Bader <stefan.bader< at >canonical.com>
Date: Fri, 25 May 2012 16:22:28 +0200
Subject: [PATCH] UBUNTU: (config) Built-in xen-acpi-processor

The driver only activates when the kernel is run as dom0 and it
is non-autoloading.

Signed-off-by: Stefan Bader <stefan.bader< at >canonical.com>
---
 debian.master/config/config.common.ubuntu |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/debian.master/config/config.common.ubuntu b/debian.master/config/config.common.ubuntu
index 84f16c2..a52ea48 100644
--- a/debian.master/config/config.common.ubuntu
+++ b/debian.master/config/config.common.ubuntu
< at >< at > -6368,7 +6368,7 < at >< at > CONFIG_X86_WP_WORKS_OK=y
 CONFIG_X86_XADD=y
 CONFIG_XEN=y
 CONFIG_XENFS=m
-CONFIG_XEN_ACPI_PROCESSOR=m
+CONFIG_XEN_ACPI_PROCESSOR=y
 CONFIG_XEN_BACKEND=y
 CONFIG_XEN_BALLOON=y
 CONFIG_XEN_BALLOON_MEMORY_HOTPLUG=y

APPLIED: [precise] SRU: UBUNTU: SAUCE: dell-laptop: rfkill blacklistDell XPS 13z, 15

Tim Gardner — 2012-05-25T12:19:49

APPLIED: [PATCH 01/12] dsa: Change dsa_uses_{dsa, trailer}_tags()into inline functions

Tim Gardner — 2012-05-25T12:07:58

PPA Kernel install and module compile error

Daniele Elia — 2012-05-24T17:48:02

Hi all,
I need to install kernel 3.3 or 3.4 because the default kernel in use by
ubuntu 12.04 doesn't work very well in my laptop; I've a big problem about
headphone jack; if I put the jack in, speaker and headphone sound both.

I've tried kernel 3.3.7 from mainline ppa, I've installed generic headers,
all headers and image (i386) and my headphone now work correctly but I
cant't compile nvidia module or virtualbox module or vmware module, always
it's end with kernel Ops (crash) ... I don't know why, I've tried also 3.4
or 3.3.6 and 3.3.5 and always in modprobe it finish with ops.

Am I missing something ?

Thank's

Daniele

RE: [PATCH] UBUNTU: [Upstream] ahci: Detect Marvell 88SE9172 SATAcontroller

Johnson, Matthew Robert — 2012-05-24T22:25:01

Sorry, I didn't file a bug, I originally just submitted the patch to
the mailing list at the same time I submitted it upstream.  The patch
has been upstreamed and will be in 3.4.  I didn't 'Cc: stable' when I
upstreamed the patch, so I took care of that last night.  The patch
is queued for the next 3.0 and 3.3 stable releases[1][2], and 3.2 should
be forthcoming.

If I understand correctly, the patch will automatically trickle down to the
12.04 kernel once 3.2.19 is released?  In that case, feel free to either
apply the patch now or wait until then.  I can also file a bug if necessary.

Thanks,
Matt

[1] http://git.kernel.org/?p=linux/kernel/git/stable/stable-queue.git;a=commitdiff;h=e90c706efb694972f64409d25d09076ab7581f34
[2] http://git.kernel.org/?p=linux/kernel/git/stable/stable-queue.git;a=commitdiff;h=898f26e7f5b166847e3157ceb7907580e2035e80

Re: Precise SRU, [PATCH 0/12] CONFIG_DSA=m, 12 patches

Herton Ronaldo Krzesinski — 2012-05-25T02:45:41

Seems there were a lot of shuffling in configs because of highbank where
CONFIG_PHYLIB turned to m. Perhaps it could be turned to y (if possible
and makes sense) as well to avoid other configs growing, but that is
just an observation. Ack on the patches.

Re: [PATCH] UBUNTU: [Upstream] ahci: Detect Marvell 88SE9172 SATAcontroller

Tim Gardner — 2012-05-25T01:47:42

Waiting until this patch trickles down via stable is just fine. Thanks 
for the follow up.

rtg

Ack w/cmnt: Precise SRU, [PATCH 0/12] CONFIG_DSA=m, 12 patches

Seth Forshee — 2012-05-24T21:31:38

Seems like the only real risk of regression outside of the driver itself
would be build problems, but I'm assuming you've already tested for
those. It's definitely better to have experimental code in a module, so
this seems worthwhile.

Acked-by: Seth Forshee <seth.forshee< at >canonical.com>

Precise SRU, [PATCH 0/12] CONFIG_DSA=m, 12 patches

Tim Gardner — 2012-05-24T21:05:14

Sometimes I hate git send-email.

http://bugs.launchpad.net/bugs/1004148

The DSA transport is experimental. By policy it should not be built-in. 
The dependent hardware modules in drivers/net/dsa will load the 
transport as a result of udev probing. Finally, this is pretty esoteric 
and rare hardware, so is unlikely to cause any issues with a normal 
desktop or server.

rtg

[PATCH 08/12] dsa: Move all definitions needed by drivers into

Tim Gardner — 2012-05-24T20:58:20

From: Ben Hutchings <ben< at >decadent.org.uk>

BugLink: http://bugs.launchpad.net/bugs/1004148

Any headers included by drivers should be under include/, and
any definitions they use are not really private to the core as
the name "dsa_priv.h" suggests.

Signed-off-by: Ben Hutchings <ben< at >decadent.org.uk>
Acked-by: Lennert Buytenhek <buytenh< at >wantstofly.org>
Signed-off-by: David S. Miller <davem< at >davemloft.net>
(cherry picked from commit c8f0b86996c88081095124d16b869e8d8a1c02c5)
Signed-off-by: Tim Gardner <tim.gardner< at >canonical.com>
---
 include/net/dsa.h         |   90 ++++++++++++++++++++++++++++++++++++++++++++
 net/dsa/dsa_priv.h        |   91 ---------------------------------------------
 net/dsa/mv88e6060.c       |    2 +-
 net/dsa/mv88e6123_61_65.c |    2 +-
 net/dsa/mv88e6131.c       |    2 +-
 net/dsa/mv88e6xxx.c       |    2 +-
 6 files changed, 94 insertions(+), 95 deletions(-)

diff --git a/include/net/dsa.h b/include/net/dsa.h
index 32a1b49..b78db3c 100644
--- a/include/net/dsa.h
+++ b/include/net/dsa.h
< at >< at > -11,6 +11,7 < at >< at >
 #ifndef __LINUX_NET_DSA_H
 #define __LINUX_NET_DSA_H
 
+#include <linux/list.h>
 #include <linux/timer.h>
 #include <linux/workqueue.h>
 
< at >< at > -90,6 +91,95 < at >< at > struct dsa_switch_tree {
 struct dsa_switch*ds[DSA_MAX_SWITCHES];
 };
 
+struct dsa_switch {
+/*
+ * Parent switch tree, and switch index.
+ */
+struct dsa_switch_tree*dst;
+intindex;
+
+/*
+ * Configuration data for this switch.
+ */
+struct dsa_chip_data*pd;
+
+/*
+ * The used switch driver.
+ */
+struct dsa_switch_driver*drv;
+
+/*
+ * Reference to mii bus to use.
+ */
+struct mii_bus*master_mii_bus;
+
+/*
+ * Slave mii_bus and devices for the individual ports.
+ */
+u32dsa_port_mask;
+u32phys_port_mask;
+struct mii_bus*slave_mii_bus;
+struct net_device*ports[DSA_MAX_PORTS];
+};
+
+static inline bool dsa_is_cpu_port(struct dsa_switch *ds, int p)
+{
+return !!(ds->index == ds->dst->cpu_switch && p == ds->dst->cpu_port);
+}
+
+static inline u8 dsa_upstream_port(struct dsa_switch *ds)
+{
+struct dsa_switch_tree *dst = ds->dst;
+
+/*
+ * If this is the root switch (i.e. the switch that connects
+ * to the CPU), return the cpu port number on this switch.
+ * Else return the (DSA) port number that connects to the
+ * switch that is one hop closer to the cpu.
+ */
+if (dst->cpu_switch == ds->index)
+return dst->cpu_port;
+else
+return ds->pd->rtable[dst->cpu_switch];
+}
+
+struct dsa_switch_driver {
+struct list_headlist;
+
+__be16tag_protocol;
+intpriv_size;
+
+/*
+ * Probing and setup.
+ */
+char*(*probe)(struct mii_bus *bus, int sw_addr);
+int(*setup)(struct dsa_switch *ds);
+int(*set_addr)(struct dsa_switch *ds, u8 *addr);
+
+/*
+ * Access to the switch's PHY registers.
+ */
+int(*phy_read)(struct dsa_switch *ds, int port, int regnum);
+int(*phy_write)(struct dsa_switch *ds, int port,
+     int regnum, u16 val);
+
+/*
+ * Link state polling and IRQ handling.
+ */
+void(*poll_link)(struct dsa_switch *ds);
+
+/*
+ * ethtool hardware statistics.
+ */
+void(*get_strings)(struct dsa_switch *ds, int port, uint8_t *data);
+void(*get_ethtool_stats)(struct dsa_switch *ds,
+     int port, uint64_t *data);
+int(*get_sset_count)(struct dsa_switch *ds);
+};
+
+void register_switch_driver(struct dsa_switch_driver *type);
+void unregister_switch_driver(struct dsa_switch_driver *type);
+
 /*
  * The original DSA tag format and some other tag formats have no
  * ethertype, which means that we need to add a little hack to the
diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
index 89a2eb4..d4cf5cc 100644
--- a/net/dsa/dsa_priv.h
+++ b/net/dsa/dsa_priv.h
< at >< at > -11,64 +11,9 < at >< at >
 #ifndef __DSA_PRIV_H
 #define __DSA_PRIV_H
 
-#include <linux/list.h>
 #include <linux/phy.h>
-#include <linux/timer.h>
-#include <linux/workqueue.h>
 #include <net/dsa.h>
 
-struct dsa_switch {
-/*
- * Parent switch tree, and switch index.
- */
-struct dsa_switch_tree*dst;
-intindex;
-
-/*
- * Configuration data for this switch.
- */
-struct dsa_chip_data*pd;
-
-/*
- * The used switch driver.
- */
-struct dsa_switch_driver*drv;
-
-/*
- * Reference to mii bus to use.
- */
-struct mii_bus*master_mii_bus;
-
-/*
- * Slave mii_bus and devices for the individual ports.
- */
-u32dsa_port_mask;
-u32phys_port_mask;
-struct mii_bus*slave_mii_bus;
-struct net_device*ports[DSA_MAX_PORTS];
-};
-
-static inline bool dsa_is_cpu_port(struct dsa_switch *ds, int p)
-{
-return !!(ds->index == ds->dst->cpu_switch && p == ds->dst->cpu_port);
-}
-
-static inline u8 dsa_upstream_port(struct dsa_switch *ds)
-{
-struct dsa_switch_tree *dst = ds->dst;
-
-/*
- * If this is the root switch (i.e. the switch that connects
- * to the CPU), return the cpu port number on this switch.
- * Else return the (DSA) port number that connects to the
- * switch that is one hop closer to the cpu.
- */
-if (dst->cpu_switch == ds->index)
-return dst->cpu_port;
-else
-return ds->pd->rtable[dst->cpu_switch];
-}
-
 struct dsa_slave_priv {
 /*
  * The linux network interface corresponding to this
< at >< at > -90,44 +35,8 < at >< at > struct dsa_slave_priv {
 struct phy_device*phy;
 };
 
-struct dsa_switch_driver {
-struct list_headlist;
-
-__be16tag_protocol;
-intpriv_size;
-
-/*
- * Probing and setup.
- */
-char*(*probe)(struct mii_bus *bus, int sw_addr);
-int(*setup)(struct dsa_switch *ds);
-int(*set_addr)(struct dsa_switch *ds, u8 *addr);
-
-/*
- * Access to the switch's PHY registers.
- */
-int(*phy_read)(struct dsa_switch *ds, int port, int regnum);
-int(*phy_write)(struct dsa_switch *ds, int port,
-     int regnum, u16 val);
-
-/*
- * Link state polling and IRQ handling.
- */
-void(*poll_link)(struct dsa_switch *ds);
-
-/*
- * ethtool hardware statistics.
- */
-void(*get_strings)(struct dsa_switch *ds, int port, uint8_t *data);
-void(*get_ethtool_stats)(struct dsa_switch *ds,
-     int port, uint64_t *data);
-int(*get_sset_count)(struct dsa_switch *ds);
-};
-
 /* dsa.c */
 extern char dsa_driver_version[];
-void register_switch_driver(struct dsa_switch_driver *type);
-void unregister_switch_driver(struct dsa_switch_driver *type);
 
 /* slave.c */
 void dsa_slave_mii_bus_init(struct dsa_switch *ds);
diff --git a/net/dsa/mv88e6060.c b/net/dsa/mv88e6060.c
index 0e028df..7fc4e81 100644
--- a/net/dsa/mv88e6060.c
+++ b/net/dsa/mv88e6060.c
< at >< at > -11,7 +11,7 < at >< at >
 #include <linux/list.h>
 #include <linux/netdevice.h>
 #include <linux/phy.h>
-#include "dsa_priv.h"
+#include <net/dsa.h>
 
 #define REG_PORT(p)(8 + (p))
 #define REG_GLOBAL0x0f
diff --git a/net/dsa/mv88e6123_61_65.c b/net/dsa/mv88e6123_61_65.c
index 6504405..c0a458f 100644
--- a/net/dsa/mv88e6123_61_65.c
+++ b/net/dsa/mv88e6123_61_65.c
< at >< at > -11,7 +11,7 < at >< at >
 #include <linux/list.h>
 #include <linux/netdevice.h>
 #include <linux/phy.h>
-#include "dsa_priv.h"
+#include <net/dsa.h>
 #include "mv88e6xxx.h"
 
 static char *mv88e6123_61_65_probe(struct mii_bus *bus, int sw_addr)
diff --git a/net/dsa/mv88e6131.c b/net/dsa/mv88e6131.c
index 6786ba4..e0eb6824 100644
--- a/net/dsa/mv88e6131.c
+++ b/net/dsa/mv88e6131.c
< at >< at > -11,7 +11,7 < at >< at >
 #include <linux/list.h>
 #include <linux/netdevice.h>
 #include <linux/phy.h>
-#include "dsa_priv.h"
+#include <net/dsa.h>
 #include "mv88e6xxx.h"
 
 /*
diff --git a/net/dsa/mv88e6xxx.c b/net/dsa/mv88e6xxx.c
index cacd955..5467c04 100644
--- a/net/dsa/mv88e6xxx.c
+++ b/net/dsa/mv88e6xxx.c
< at >< at > -11,7 +11,7 < at >< at >
 #include <linux/list.h>
 #include <linux/netdevice.h>
 #include <linux/phy.h>
-#include "dsa_priv.h"
+#include <net/dsa.h>
 #include "mv88e6xxx.h"
 
 /*

[PATCH 12/12] UBUNTU: [Config] CONFIG_NET_DSA=m

Tim Gardner — 2012-05-24T20:58:24

BugLink: http://bugs.launchpad.net/bugs/1004148

The Distributed Switch Architecture is experimental. According
to policy it should not be built-in. Furthermore, this transport
layer module will get loaded by one of the dependent device
drivers under drivers/net/dsa.

Signed-off-by: Tim Gardner <tim.gardner< at >canonical.com>
---
 debian.master/config/amd64/config.common.amd64     |   13 +++++++++++-
 debian.master/config/armel/config.common.armel     |   14 ++++++++++++-
 debian.master/config/armhf/config.common.armhf     |    1 -
 debian.master/config/armhf/config.flavour.highbank |   17 +++++++++++++--
 debian.master/config/armhf/config.flavour.omap     |   15 ++++++++++++-
 debian.master/config/config.common.ubuntu          |   22 +++++---------------
 debian.master/config/i386/config.common.i386       |   14 ++++++++++++-
 debian.master/config/powerpc/config.common.powerpc |   14 ++++++++++++-
 debian.master/config/ppc64/config.common.ppc64     |   14 ++++++++++++-
 9 files changed, 98 insertions(+), 26 deletions(-)

diff --git a/debian.master/config/amd64/config.common.amd64 b/debian.master/config/amd64/config.common.amd64
index 5326643..8395910 100644
--- a/debian.master/config/amd64/config.common.amd64
+++ b/debian.master/config/amd64/config.common.amd64
< at >< at > -59,6 +59,7 < at >< at > CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_UB=m
 CONFIG_BRCMFMAC=m
 CONFIG_BRIDGE=m
+CONFIG_BROADCOM_PHY=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BT=m
< at >< at > -75,6 +76,7 < at >< at > CONFIG_CHR_DEV_OSST=m
 CONFIG_CHR_DEV_SCH=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=y
 CONFIG_CIFS=m
 CONFIG_CIFS_EXPERIMENTAL=y
 CONFIG_CIFS_XATTR=y
< at >< at > -145,6 +147,7 < at >< at > CONFIG_CRYPTO_XTS=m
 CONFIG_CRYPTO_ZLIB=m
 CONFIG_CUSE=m
 CONFIG_DAB=y
+CONFIG_DAVICOM_PHY=y
 CONFIG_DCB=y
 CONFIG_DE600=m
 CONFIG_DE620=m
< at >< at > -303,6 +306,7 < at >< at > CONFIG_I2C_STUB=m
 CONFIG_I2C_TAOS_EVM=m
 CONFIG_I2C_TINY_USB=m
 CONFIG_I2C_XILINX=m
+CONFIG_ICPLUS_PHY=y
 # CONFIG_IDE is not set
 CONFIG_IEEE802154=m
 CONFIG_IIO=m
< at >< at > -430,6 +434,8 < at >< at > CONFIG_LOGIRUMBLEPAD2_FF=y
 CONFIG_LOGITECH_FF=y
 CONFIG_LOGIWHEELS_FF=y
 CONFIG_LOG_BUF_SHIFT=18
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LXT_PHY=y
 CONFIG_LZO_COMPRESS=y
 # CONFIG_M686 is not set
 CONFIG_MAC80211_DEBUG_MENU=y
< at >< at > -438,6 +444,7 < at >< at > CONFIG_MAC80211_MESH=y
 CONFIG_MACVLAN=m
 CONFIG_MAC_PARTITION=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MAX_RAW_DEVS=256
 CONFIG_MEDIA_SUPPORT=m
 CONFIG_MEMORY_HOTREMOVE=y
< at >< at > -494,6 +501,7 < at >< at > CONFIG_MTD_NAND_IDS=m
 CONFIG_MTD_SM_COMMON=m
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_MWIFIEX=m
+CONFIG_NATIONAL_PHY=y
 CONFIG_NCP_FS=m
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
< at >< at > -503,7 +511,6 < at >< at > CONFIG_NETPOLL=y
 CONFIG_NET_9P=m
 # CONFIG_NET_CALXEDA_XGMAC is not set
 CONFIG_NET_DMA=y
-CONFIG_NET_DSA=y
 CONFIG_NET_IPGRE_DEMUX=m
 CONFIG_NET_IPIP=m
 CONFIG_NET_KEY=m
< at >< at > -602,6 +609,7 < at >< at > CONFIG_PSTORE=y
 CONFIG_QFMT_V1=m
 CONFIG_QFMT_V2=m
 CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 CONFIG_R3964=m
 CONFIG_R8712U=m
< at >< at > -610,6 +618,7 < at >< at > CONFIG_RAMOOPS=m
 CONFIG_RAW_DRIVER=m
 CONFIG_RCU_FANOUT=64
 CONFIG_RDS=m
+CONFIG_REALTEK_PHY=y
 CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_DEBUG is not set
 CONFIG_REGULATOR_FIXED_VOLTAGE=m
< at >< at > -806,6 +815,7 < at >< at > CONFIG_SERIO_SERPORT=m
 CONFIG_SGI_PARTITION=y
 CONFIG_SLHC=y
 CONFIG_SLIP=m
+CONFIG_SMSC_PHY=y
 CONFIG_SM_FTL=m
 # CONFIG_SND_BT87X_OVERCLOCK is not set
 CONFIG_SND_EMU10K1_SEQ=m
< at >< at > -963,6 +973,7 < at >< at > CONFIG_VIRTIO_NET=y
 CONFIG_VIRTIO_PCI=y
 CONFIG_VIRTIO_RING=y
 CONFIG_VIRT_DRIVERS=y
+CONFIG_VITESSE_PHY=y
 CONFIG_VLAN_8021Q_GVRP=y
 CONFIG_VME_BUS=m
 CONFIG_VT6656=m
diff --git a/debian.master/config/armel/config.common.armel b/debian.master/config/armel/config.common.armel
index da3df2a..c7a372b 100644
--- a/debian.master/config/armel/config.common.armel
+++ b/debian.master/config/armel/config.common.armel
< at >< at > -57,6 +57,7 < at >< at > CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_UB=m
 CONFIG_BRCMFMAC=m
 CONFIG_BRIDGE=m
+CONFIG_BROADCOM_PHY=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BT=m
< at >< at > -73,6 +74,7 < at >< at > CONFIG_CHR_DEV_OSST=m
 CONFIG_CHR_DEV_SCH=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=y
 CONFIG_CIFS=m
 CONFIG_CIFS_XATTR=y
 CONFIG_CLEANCACHE=y
< at >< at > -139,6 +141,7 < at >< at > CONFIG_CRYPTO_XCBC=m
 CONFIG_CRYPTO_XTS=m
 CONFIG_CRYPTO_ZLIB=m
 CONFIG_CUSE=m
+CONFIG_DAVICOM_PHY=y
 CONFIG_DCB=y
 CONFIG_DE600=m
 CONFIG_DE620=m
< at >< at > -295,6 +298,7 < at >< at > CONFIG_I2C_STUB=m
 CONFIG_I2C_TAOS_EVM=m
 CONFIG_I2C_TINY_USB=m
 CONFIG_I2C_XILINX=m
+CONFIG_ICPLUS_PHY=y
 CONFIG_IEEE802154=m
 CONFIG_IIO=m
 CONFIG_INET6_AH=m
< at >< at > -417,6 +421,8 < at >< at > CONFIG_LOGIRUMBLEPAD2_FF=y
 CONFIG_LOGITECH_FF=y
 CONFIG_LOGIWHEELS_FF=y
 CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LXT_PHY=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_MAC80211_DEBUG_MENU=y
 CONFIG_MAC80211_HWSIM=m
< at >< at > -424,6 +430,7 < at >< at > CONFIG_MAC80211_MESH=y
 CONFIG_MACVLAN=m
 CONFIG_MAC_PARTITION=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MAX_RAW_DEVS=256
 CONFIG_MEDIA_SUPPORT=m
 CONFIG_MEMSTICK=m
< at >< at > -490,6 +497,7 < at >< at > CONFIG_MTD_OF_PARTS=y
 # CONFIG_MTD_SM_COMMON is not set
 # CONFIG_MUTEX_SPIN_ON_OWNER is not set
 CONFIG_MWIFIEX=m
+CONFIG_NATIONAL_PHY=y
 CONFIG_NCP_FS=m
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NETCONSOLE=m
< at >< at > -498,7 +506,6 < at >< at > CONFIG_NETPOLL=y
 CONFIG_NET_9P=m
 # CONFIG_NET_CALXEDA_XGMAC is not set
 CONFIG_NET_DMA=y
-CONFIG_NET_DSA=y
 CONFIG_NET_IPGRE_DEMUX=m
 CONFIG_NET_IPIP=m
 CONFIG_NET_KEY=m
< at >< at > -550,6 +557,7 < at >< at > CONFIG_NOP_USB_XCEIV=y
 CONFIG_NTFS_FS=m
 CONFIG_NVRAM=m
 CONFIG_OC_ETM=y
+CONFIG_OF_MDIO=y
 CONFIG_OMFS_FS=m
 CONFIG_OPROFILE=m
 CONFIG_OSF_PARTITION=y
< at >< at > -595,6 +603,7 < at >< at > CONFIG_PSTORE=y
 CONFIG_QFMT_V1=m
 CONFIG_QFMT_V2=m
 CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_R3964 is not set
 CONFIG_R8712U=m
< at >< at > -602,6 +611,7 < at >< at > CONFIG_RAID_ATTRS=m
 CONFIG_RAMOOPS=m
 CONFIG_RAW_DRIVER=m
 CONFIG_RDS=m
+CONFIG_REALTEK_PHY=y
 CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_DEBUG is not set
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
< at >< at > -799,6 +809,7 < at >< at > CONFIG_SLIP=m
 CONFIG_SMC911X=m
 CONFIG_SMC91X=m
 CONFIG_SMSC911X=m
+CONFIG_SMSC_PHY=y
 CONFIG_SM_FTL=m
 # CONFIG_SND_EMU10K1_SEQ is not set
 # CONFIG_SND_OPL3_LIB_SEQ is not set
< at >< at > -955,6 +966,7 < at >< at > CONFIG_VIDEO_TVP514X=m
 # CONFIG_VIRTIO_PCI is not set
 # CONFIG_VIRTIO_RING is not set
 CONFIG_VIRT_DRIVERS=y
+CONFIG_VITESSE_PHY=y
 CONFIG_VLAN_8021Q_GVRP=y
 # CONFIG_VT6656 is not set
 # CONFIG_VT_HW_CONSOLE_BINDING is not set
diff --git a/debian.master/config/armhf/config.common.armhf b/debian.master/config/armhf/config.common.armhf
index a323ca1..4acbac9 100644
--- a/debian.master/config/armhf/config.common.armhf
+++ b/debian.master/config/armhf/config.common.armhf
< at >< at > -101,7 +101,6 < at >< at > CONFIG_SND_PCM_OSS=m
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_STACK_TRACER is not set
 CONFIG_STANDALONE=y
-CONFIG_STE10XP=y
 # CONFIG_SYS_HYPERVISOR is not set
 CONFIG_TABLET_USB_WACOM=m
 # CONFIG_TCG_TPM is not set
diff --git a/debian.master/config/armhf/config.flavour.highbank b/debian.master/config/armhf/config.flavour.highbank
index 0b49ce9..5b2aae2 100644
--- a/debian.master/config/armhf/config.flavour.highbank
+++ b/debian.master/config/armhf/config.flavour.highbank
< at >< at > -48,6 +48,7 < at >< at > CONFIG_BLK_DEV_RAM=m
 # CONFIG_BLK_DEV_UB is not set
 # CONFIG_BRCMFMAC is not set
 # CONFIG_BRIDGE is not set
+CONFIG_BROADCOM_PHY=m
 # CONFIG_BSD_DISKLABEL is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_BT is not set
< at >< at > -63,6 +64,7 < at >< at > CONFIG_BLK_DEV_RAM=m
 # CONFIG_CHR_DEV_SCH is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_ST is not set
+CONFIG_CICADA_PHY=m
 # CONFIG_CIFS is not set
 # CONFIG_CLEANCACHE is not set
 # CONFIG_CODA_FS is not set
< at >< at > -126,6 +128,7 < at >< at > CONFIG_CRYPTO_RNG=m
 # CONFIG_CRYPTO_XTS is not set
 # CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CUSE is not set
+CONFIG_DAVICOM_PHY=m
 # CONFIG_DCB is not set
 # CONFIG_DE600 is not set
 # CONFIG_DE620 is not set
< at >< at > -252,6 +255,7 < at >< at > CONFIG_I2C_HELPER_AUTO=y
 # CONFIG_I2C_TAOS_EVM is not set
 # CONFIG_I2C_TINY_USB is not set
 # CONFIG_I2C_XILINX is not set
+CONFIG_ICPLUS_PHY=m
 # CONFIG_IEEE802154 is not set
 # CONFIG_IIO is not set
 # CONFIG_INET6_AH is not set
< at >< at > -366,6 +370,8 < at >< at > CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIWHEELS_FF is not set
+CONFIG_LSI_ET1011C_PHY=m
+CONFIG_LXT_PHY=m
 CONFIG_LZO_COMPRESS=m
 # CONFIG_MAC80211_DEBUG_MENU is not set
 # CONFIG_MAC80211_HWSIM is not set
< at >< at > -373,6 +379,7 < at >< at > CONFIG_LZO_COMPRESS=m
 # CONFIG_MACVLAN is not set
 # CONFIG_MAC_PARTITION is not set
 # CONFIG_MAGIC_SYSRQ is not set
+CONFIG_MARVELL_PHY=m
 # CONFIG_MEDIA_SUPPORT is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_MFD_88PM860X is not set
< at >< at > -427,6 +434,7 < at >< at > CONFIG_MMC_SDHCI_PLTFM=y
 # CONFIG_MTD is not set
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 # CONFIG_MWIFIEX is not set
+CONFIG_NATIONAL_PHY=m
 # CONFIG_NCP_FS is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETFILTER is not set
< at >< at > -434,7 +442,6 < at >< at > CONFIG_MUTEX_SPIN_ON_OWNER=y
 # CONFIG_NET_9P is not set
 CONFIG_NET_CALXEDA_XGMAC=y
 # CONFIG_NET_DMA is not set
-# CONFIG_NET_DSA is not set
 # CONFIG_NET_IPGRE_DEMUX is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_KEY is not set
< at >< at > -484,6 +491,7 < at >< at > CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_OC_ETM is not set
+CONFIG_OF_MDIO=m
 # CONFIG_OMFS_FS is not set
 CONFIG_OPROFILE=y
 # CONFIG_OSF_PARTITION is not set
< at >< at > -496,7 +504,7 < at >< at > CONFIG_OPROFILE=y
 # CONFIG_PERF_COUNTERS is not set
 # CONFIG_PHONE is not set
 # CONFIG_PHONET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=m
 CONFIG_PL330_DMA=y
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_PMIC_DA903X is not set
< at >< at > -520,12 +528,14 < at >< at > CONFIG_PREEMPT_RCU=y
 # CONFIG_QFMT_V1 is not set
 # CONFIG_QFMT_V2 is not set
 # CONFIG_QNX4FS_FS is not set
+CONFIG_QSEMI_PHY=m
 # CONFIG_QUOTA_NETLINK_INTERFACE is not set
 # CONFIG_R8712U is not set
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_RAMOOPS is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_RDS is not set
+CONFIG_REALTEK_PHY=m
 # CONFIG_REGULATOR is not set
 # CONFIG_REISERFS_FS_POSIX_ACL is not set
 # CONFIG_REISERFS_FS_SECURITY is not set
< at >< at > -715,6 +725,7 < at >< at > CONFIG_SLHC=m
 # CONFIG_SMC911X is not set
 # CONFIG_SMC91X is not set
 # CONFIG_SMSC911X is not set
+CONFIG_SMSC_PHY=m
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_SOUND is not set
 # CONFIG_SPEAKUP_SYNTH_DUMMY is not set
< at >< at > -732,6 +743,7 < at >< at > CONFIG_SPI_PL022=y
 # CONFIG_SQUASHFS_XZ is not set
 # CONFIG_SSB is not set
 # CONFIG_STAGING_MEDIA is not set
+CONFIG_STE10XP=m
 # CONFIG_STMMAC_ETH is not set
 # CONFIG_SUN_PARTITION is not set
 CONFIG_SWP_EMULATE=y
< at >< at > -819,6 +831,7 < at >< at > CONFIG_VERSION_SIGNATURE="Ubuntu 3.2.0-1800.1-highbank 3.2.9"
 # CONFIG_VETH is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
 # CONFIG_VIRT_DRIVERS is not set
+CONFIG_VITESSE_PHY=m
 # CONFIG_VLAN_8021Q_GVRP is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_W1 is not set
diff --git a/debian.master/config/armhf/config.flavour.omap b/debian.master/config/armhf/config.flavour.omap
index d3c4d76..b8391e1 100644
--- a/debian.master/config/armhf/config.flavour.omap
+++ b/debian.master/config/armhf/config.flavour.omap
< at >< at > -48,6 +48,7 < at >< at > CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_UB=m
 CONFIG_BRCMFMAC=m
 CONFIG_BRIDGE=m
+CONFIG_BROADCOM_PHY=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BT=m
< at >< at > -63,6 +64,7 < at >< at > CONFIG_CHR_DEV_OSST=m
 CONFIG_CHR_DEV_SCH=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=y
 CONFIG_CIFS=m
 CONFIG_CLEANCACHE=y
 CONFIG_CODA_FS=m
< at >< at > -126,6 +128,7 < at >< at > CONFIG_CRYPTO_XCBC=m
 CONFIG_CRYPTO_XTS=m
 CONFIG_CRYPTO_ZLIB=m
 CONFIG_CUSE=m
+CONFIG_DAVICOM_PHY=y
 CONFIG_DCB=y
 CONFIG_DE600=m
 CONFIG_DE620=m
< at >< at > -252,6 +255,7 < at >< at > CONFIG_I2C_STUB=m
 CONFIG_I2C_TAOS_EVM=m
 CONFIG_I2C_TINY_USB=m
 CONFIG_I2C_XILINX=m
+CONFIG_ICPLUS_PHY=y
 CONFIG_IEEE802154=m
 CONFIG_IIO=m
 CONFIG_INET6_AH=m
< at >< at > -366,6 +370,8 < at >< at > CONFIG_LOGIG940_FF=y
 CONFIG_LOGIRUMBLEPAD2_FF=y
 CONFIG_LOGITECH_FF=y
 CONFIG_LOGIWHEELS_FF=y
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LXT_PHY=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_MAC80211_DEBUG_MENU=y
 CONFIG_MAC80211_HWSIM=m
< at >< at > -373,6 +379,7 < at >< at > CONFIG_MAC80211_MESH=y
 CONFIG_MACVLAN=m
 CONFIG_MAC_PARTITION=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MEDIA_SUPPORT=m
 CONFIG_MEMSTICK=m
 CONFIG_MFD_88PM860X=y
< at >< at > -427,6 +434,7 < at >< at > CONFIG_MOUSE_VSXXXAA=m
 CONFIG_MTD=y
 # CONFIG_MUTEX_SPIN_ON_OWNER is not set
 CONFIG_MWIFIEX=m
+CONFIG_NATIONAL_PHY=y
 CONFIG_NCP_FS=m
 CONFIG_NETCONSOLE=m
 CONFIG_NETFILTER=y
< at >< at > -434,7 +442,6 < at >< at > CONFIG_NETPOLL=y
 CONFIG_NET_9P=m
 # CONFIG_NET_CALXEDA_XGMAC is not set
 CONFIG_NET_DMA=y
-CONFIG_NET_DSA=y
 CONFIG_NET_IPGRE_DEMUX=m
 CONFIG_NET_IPIP=m
 CONFIG_NET_KEY=m
< at >< at > -484,6 +491,7 < at >< at > CONFIG_NLS_KOI8_U=m
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_NTFS_FS=m
 CONFIG_OC_ETM=y
+CONFIG_OF_MDIO=y
 CONFIG_OMFS_FS=m
 CONFIG_OPROFILE=m
 CONFIG_OSF_PARTITION=y
< at >< at > -520,12 +528,14 < at >< at > CONFIG_PSTORE=y
 CONFIG_QFMT_V1=m
 CONFIG_QFMT_V2=m
 CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 CONFIG_R8712U=m
 CONFIG_RAID_ATTRS=m
 CONFIG_RAMOOPS=m
 CONFIG_RAW_DRIVER=m
 CONFIG_RDS=m
+CONFIG_REALTEK_PHY=y
 CONFIG_REGULATOR=y
 CONFIG_REISERFS_FS_POSIX_ACL=y
 CONFIG_REISERFS_FS_SECURITY=y
< at >< at > -715,6 +725,7 < at >< at > CONFIG_SLIP=m
 CONFIG_SMC911X=m
 CONFIG_SMC91X=m
 CONFIG_SMSC911X=m
+CONFIG_SMSC_PHY=y
 CONFIG_SOLARIS_X86_PARTITION=y
 CONFIG_SOUND=m
 CONFIG_SPEAKUP_SYNTH_DUMMY=m
< at >< at > -732,6 +743,7 < at >< at > CONFIG_SQUASHFS_XATTR=y
 CONFIG_SQUASHFS_XZ=y
 CONFIG_SSB=m
 CONFIG_STAGING_MEDIA=y
+CONFIG_STE10XP=y
 CONFIG_STMMAC_ETH=m
 CONFIG_SUN_PARTITION=y
 # CONFIG_SWP_EMULATE is not set
< at >< at > -819,6 +831,7 < at >< at > CONFIG_VERSION_SIGNATURE=""
 CONFIG_VETH=m
 CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_VIRT_DRIVERS=y
+CONFIG_VITESSE_PHY=y
 CONFIG_VLAN_8021Q_GVRP=y
 CONFIG_VXFS_FS=m
 CONFIG_W1=m
diff --git a/debian.master/config/config.common.ubuntu b/debian.master/config/config.common.ubuntu
index b890c8c..8efee35 100644
--- a/debian.master/config/config.common.ubuntu
+++ b/debian.master/config/config.common.ubuntu
< at >< at > -630,7 +630,6 < at >< at > CONFIG_BRIDGE_IGMP_SNOOPING=y
 CONFIG_BRIDGE_NETFILTER=y
 CONFIG_BRIDGE_NF_EBTABLES=m
 CONFIG_BRIQ_PANEL=m
-CONFIG_BROADCOM_PHY=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_BTRFS_FS=m
< at >< at > -762,7 +761,6 < at >< at > CONFIG_CHELSIO_T1_1G=y
 CONFIG_CHELSIO_T3=m
 CONFIG_CHELSIO_T4=m
 CONFIG_CHELSIO_T4VF=m
-CONFIG_CICADA_PHY=y
 # CONFIG_CIFS_ACL is not set
 # CONFIG_CIFS_DEBUG2 is not set
 CONFIG_CIFS_DFS_UPCALL=y
< at >< at > -1036,7 +1034,6 < at >< at > CONFIG_CYCLADES=m
 CONFIG_CYCLADES_SYNC=m
 CONFIG_CYCLOMX_X25=y
 # CONFIG_CYZ_INTR is not set
-CONFIG_DAVICOM_PHY=y
 CONFIG_DCA=m
 CONFIG_DCDBAS=m
 CONFIG_DE2104X=m
< at >< at > -2009,7 +2006,6 < at >< at > CONFIG_IBM_BSR=m
 # CONFIG_IBM_EMAC_TAH is not set
 # CONFIG_IBM_EMAC_ZMII is not set
 CONFIG_IBM_RTL=m
-CONFIG_ICPLUS_PHY=y
 CONFIG_ICS932S401=m
 CONFIG_IDEAPAD_LAPTOP=m
 CONFIG_IDEPCI_PCIBUS_ORDER=y
< at >< at > -2583,10 +2579,8 < at >< at > CONFIG_LP486E=m
 CONFIG_LPC_SCH=m
 # CONFIG_LP_CONSOLE is not set
 CONFIG_LRU_CACHE=m
-CONFIG_LSI_ET1011C_PHY=y
 CONFIG_LSM_MMAP_MIN_ADDR=0
 CONFIG_LTPC=m
-CONFIG_LXT_PHY=y
 CONFIG_LZO_DECOMPRESS=y
 CONFIG_M25PXX_USE_FAST_READ=y
 # CONFIG_M386 is not set
< at >< at > -2650,7 +2644,6 < at >< at > CONFIG_MAC_EMUMOUSEBTN=m
 CONFIG_MAC_FLOPPY=m
 CONFIG_MADGEMC=m
 CONFIG_MANTIS_CORE=m
-CONFIG_MARVELL_PHY=y
 # CONFIG_MATH_EMULATION is not set
 # CONFIG_MATOM is not set
 CONFIG_MAX1363=m
< at >< at > -2959,7 +2952,6 < at >< at > CONFIG_MYRI10GE=m
 CONFIG_MYRI10GE_DCA=y
 CONFIG_N2=m
 CONFIG_NAMESPACES=y
-CONFIG_NATIONAL_PHY=y
 CONFIG_NATSEMI=m
 CONFIG_NCPFS_EXTRAS=y
 CONFIG_NCPFS_IOCTL_LOCKING=y
< at >< at > -3085,10 +3077,11 < at >< at > CONFIG_NET_CLS_U32=m
 CONFIG_NET_CORE=y
 CONFIG_NET_DCCPPROBE=m
 # CONFIG_NET_DROP_MONITOR is not set
-CONFIG_NET_DSA_MV88E6060=y
-CONFIG_NET_DSA_MV88E6123_61_65=y
-CONFIG_NET_DSA_MV88E6131=y
-CONFIG_NET_DSA_MV88E6XXX=y
+CONFIG_NET_DSA=m
+CONFIG_NET_DSA_MV88E6060=m
+CONFIG_NET_DSA_MV88E6123_61_65=m
+CONFIG_NET_DSA_MV88E6131=m
+CONFIG_NET_DSA_MV88E6XXX=m
 CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
 CONFIG_NET_DSA_TAG_DSA=y
 CONFIG_NET_DSA_TAG_EDSA=y
< at >< at > -3280,7 +3273,6 < at >< at > CONFIG_OF_FLATTREE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
 CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
 CONFIG_OF_NET=y
 CONFIG_OF_PCI=y
 CONFIG_OF_PCI_IRQ=y
< at >< at > -3675,7 +3667,6 < at >< at > CONFIG_PSERIES_MSI=y
 CONFIG_QLA3XXX=m
 CONFIG_QLCNIC=m
 CONFIG_QLGE=m
-CONFIG_QSEMI_PHY=y
 CONFIG_QUOTA=y
 CONFIG_QUOTACTL=y
 CONFIG_QUOTACTL_COMPAT=y
< at >< at > -3737,7 +3728,6 < at >< at > CONFIG_RD_LZMA=y
 CONFIG_RD_LZO=y
 CONFIG_RD_XZ=y
 CONFIG_REALTEK_AUTOPM=y
-CONFIG_REALTEK_PHY=y
 CONFIG_REED_SOLOMON=m
 CONFIG_REED_SOLOMON_DEC16=y
 CONFIG_REGMAP=y
< at >< at > -4172,7 +4162,6 < at >< at > CONFIG_SMP_ON_UP=y
 CONFIG_SMSC37B787_WDT=m
 # CONFIG_SMSC911X_ARCH_HOOKS is not set
 CONFIG_SMSC9420=m
-CONFIG_SMSC_PHY=y
 CONFIG_SMSC_SCH311X_WDT=m
 CONFIG_SMS_SDIO_DRV=m
 CONFIG_SMS_SIANO_MDTV=m
< at >< at > -5235,7 +5224,6 < at >< at > CONFIG_VIRTIO_CONSOLE=m
 CONFIG_VIRTUALIZATION=y
 CONFIG_VIRT_CPU_ACCOUNTING=y
 CONFIG_VIRT_TO_BUS=y
-CONFIG_VITESSE_PHY=y
 CONFIG_VLAN_8021Q=m
 CONFIG_VLSI_FIR=m
 CONFIG_VM86=y
diff --git a/debian.master/config/i386/config.common.i386 b/debian.master/config/i386/config.common.i386
index 068df1f..e16853e 100644
--- a/debian.master/config/i386/config.common.i386
+++ b/debian.master/config/i386/config.common.i386
< at >< at > -57,6 +57,7 < at >< at > CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_UB=m
 CONFIG_BRCMFMAC=m
 CONFIG_BRIDGE=m
+CONFIG_BROADCOM_PHY=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BT=m
< at >< at > -73,6 +74,7 < at >< at > CONFIG_CHR_DEV_OSST=m
 CONFIG_CHR_DEV_SCH=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=y
 CONFIG_CIFS=m
 CONFIG_CIFS_EXPERIMENTAL=y
 CONFIG_CIFS_XATTR=y
< at >< at > -143,6 +145,7 < at >< at > CONFIG_CRYPTO_XTS=m
 CONFIG_CRYPTO_ZLIB=m
 CONFIG_CUSE=m
 CONFIG_DAB=y
+CONFIG_DAVICOM_PHY=y
 CONFIG_DCB=y
 CONFIG_DE600=m
 CONFIG_DE620=m
< at >< at > -303,6 +306,7 < at >< at > CONFIG_I2C_STUB=m
 CONFIG_I2C_TAOS_EVM=m
 CONFIG_I2C_TINY_USB=m
 CONFIG_I2C_XILINX=m
+CONFIG_ICPLUS_PHY=y
 # CONFIG_IDE is not set
 CONFIG_IEEE802154=m
 CONFIG_IIO=m
< at >< at > -430,6 +434,8 < at >< at > CONFIG_LOGIRUMBLEPAD2_FF=y
 CONFIG_LOGITECH_FF=y
 CONFIG_LOGIWHEELS_FF=y
 CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LXT_PHY=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_M686=y
 CONFIG_MAC80211_DEBUG_MENU=y
< at >< at > -438,6 +444,7 < at >< at > CONFIG_MAC80211_MESH=y
 CONFIG_MACVLAN=m
 CONFIG_MAC_PARTITION=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MAX_RAW_DEVS=256
 CONFIG_MEDIA_SUPPORT=m
 CONFIG_MEMSTICK=m
< at >< at > -494,6 +501,7 < at >< at > CONFIG_MTD_OF_PARTS=m
 CONFIG_MTD_SM_COMMON=m
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_MWIFIEX=m
+CONFIG_NATIONAL_PHY=y
 CONFIG_NCP_FS=m
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
< at >< at > -503,7 +511,6 < at >< at > CONFIG_NETPOLL=y
 CONFIG_NET_9P=m
 # CONFIG_NET_CALXEDA_XGMAC is not set
 CONFIG_NET_DMA=y
-CONFIG_NET_DSA=y
 CONFIG_NET_IPGRE_DEMUX=m
 CONFIG_NET_IPIP=m
 CONFIG_NET_KEY=m
< at >< at > -555,6 +562,7 < at >< at > CONFIG_NOP_USB_XCEIV=m
 CONFIG_NR_CPUS=8
 CONFIG_NTFS_FS=m
 CONFIG_NVRAM=m
+CONFIG_OF_MDIO=y
 CONFIG_OMFS_FS=m
 CONFIG_OPROFILE=m
 CONFIG_OSF_PARTITION=y
< at >< at > -602,6 +610,7 < at >< at > CONFIG_PSTORE=y
 CONFIG_QFMT_V1=m
 CONFIG_QFMT_V2=m
 CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 CONFIG_R3964=m
 CONFIG_R8712U=m
< at >< at > -610,6 +619,7 < at >< at > CONFIG_RAMOOPS=m
 CONFIG_RAW_DRIVER=m
 CONFIG_RCU_FANOUT=32
 CONFIG_RDS=m
+CONFIG_REALTEK_PHY=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_DEBUG=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=m
< at >< at > -804,6 +814,7 < at >< at > CONFIG_SERIO_SERPORT=m
 CONFIG_SGI_PARTITION=y
 CONFIG_SLHC=y
 CONFIG_SLIP=m
+CONFIG_SMSC_PHY=y
 CONFIG_SM_FTL=m
 # CONFIG_SND_BT87X_OVERCLOCK is not set
 CONFIG_SND_EMU10K1_SEQ=m
< at >< at > -961,6 +972,7 < at >< at > CONFIG_VIRTIO_NET=y
 CONFIG_VIRTIO_PCI=y
 CONFIG_VIRTIO_RING=y
 CONFIG_VIRT_DRIVERS=y
+CONFIG_VITESSE_PHY=y
 CONFIG_VLAN_8021Q_GVRP=y
 CONFIG_VME_BUS=m
 CONFIG_VT6656=m
diff --git a/debian.master/config/powerpc/config.common.powerpc b/debian.master/config/powerpc/config.common.powerpc
index d7bd371..908f593 100644
--- a/debian.master/config/powerpc/config.common.powerpc
+++ b/debian.master/config/powerpc/config.common.powerpc
< at >< at > -54,6 +54,7 < at >< at > CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_UB=m
 CONFIG_BRCMFMAC=m
 CONFIG_BRIDGE=m
+CONFIG_BROADCOM_PHY=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BT=m
< at >< at > -69,6 +70,7 < at >< at > CONFIG_CHR_DEV_OSST=m
 CONFIG_CHR_DEV_SCH=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=y
 CONFIG_CIFS=m
 # CONFIG_CIFS_EXPERIMENTAL is not set
 # CONFIG_CIFS_XATTR is not set
< at >< at > -137,6 +139,7 < at >< at > CONFIG_CRYPTO_XTS=m
 CONFIG_CRYPTO_ZLIB=m
 CONFIG_CUSE=m
 # CONFIG_DAB is not set
+CONFIG_DAVICOM_PHY=y
 CONFIG_DCB=y
 CONFIG_DE600=m
 CONFIG_DE620=m
< at >< at > -291,6 +294,7 < at >< at > CONFIG_I2C_TAOS_EVM=m
 CONFIG_I2C_TINY_USB=m
 CONFIG_I2C_XILINX=m
 # CONFIG_IBMEBUS is not set
+CONFIG_ICPLUS_PHY=y
 # CONFIG_IDE is not set
 CONFIG_IEEE802154=m
 CONFIG_IIO=m
< at >< at > -419,6 +423,8 < at >< at > CONFIG_LOGITECH_FF=y
 CONFIG_LOGIWHEELS_FF=y
 CONFIG_LOG_BUF_SHIFT=17
 # CONFIG_LPARCFG is not set
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LXT_PHY=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_MAC80211_DEBUG_MENU=y
 CONFIG_MAC80211_HWSIM=m
< at >< at > -426,6 +432,7 < at >< at > CONFIG_MAC80211_MESH=y
 CONFIG_MACVLAN=m
 CONFIG_MAC_PARTITION=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MAX_RAW_DEVS=256
 CONFIG_MEDIA_SUPPORT=m
 # CONFIG_MEMORY_HOTREMOVE is not set
< at >< at > -484,6 +491,7 < at >< at > CONFIG_MTD_OF_PARTS=m
 CONFIG_MTD_SM_COMMON=m
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_MWIFIEX=m
+CONFIG_NATIONAL_PHY=y
 CONFIG_NCP_FS=m
 CONFIG_NETCONSOLE=m
 CONFIG_NETFILTER=y
< at >< at > -491,7 +499,6 < at >< at > CONFIG_NETPOLL=y
 CONFIG_NET_9P=m
 # CONFIG_NET_CALXEDA_XGMAC is not set
 CONFIG_NET_DMA=y
-CONFIG_NET_DSA=y
 CONFIG_NET_IPGRE_DEMUX=m
 CONFIG_NET_IPIP=m
 CONFIG_NET_KEY=m
< at >< at > -543,6 +550,7 < at >< at > CONFIG_NODES_SHIFT=8
 CONFIG_NOP_USB_XCEIV=m
 CONFIG_NTFS_FS=m
 CONFIG_NVRAM=y
+CONFIG_OF_MDIO=y
 CONFIG_OMFS_FS=m
 CONFIG_OPROFILE=m
 CONFIG_OSF_PARTITION=y
< at >< at > -595,6 +603,7 < at >< at > CONFIG_PSTORE=y
 CONFIG_QFMT_V1=m
 CONFIG_QFMT_V2=m
 CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 CONFIG_R3964=m
 CONFIG_R8712U=m
< at >< at > -602,6 +611,7 < at >< at > CONFIG_RAID_ATTRS=m
 CONFIG_RAMOOPS=m
 CONFIG_RAW_DRIVER=m
 CONFIG_RDS=m
+CONFIG_REALTEK_PHY=y
 CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_DEBUG is not set
 CONFIG_REGULATOR_FIXED_VOLTAGE=m
< at >< at > -785,6 +795,7 < at >< at > CONFIG_SERIO_SERPORT=m
 CONFIG_SGI_PARTITION=y
 CONFIG_SLHC=y
 CONFIG_SLIP=m
+CONFIG_SMSC_PHY=y
 # CONFIG_SM_FTL is not set
 CONFIG_SND_BT87X_OVERCLOCK=y
 CONFIG_SND_EMU10K1_SEQ=m
< at >< at > -946,6 +957,7 < at >< at > CONFIG_VIRTIO_NET=m
 CONFIG_VIRTIO_PCI=m
 CONFIG_VIRTIO_RING=m
 CONFIG_VIRT_DRIVERS=y
+CONFIG_VITESSE_PHY=y
 CONFIG_VLAN_8021Q_GVRP=y
 # CONFIG_VME_BUS is not set
 # CONFIG_VT6656 is not set
diff --git a/debian.master/config/ppc64/config.common.ppc64 b/debian.master/config/ppc64/config.common.ppc64
index a5c075b..c5e5070 100644
--- a/debian.master/config/ppc64/config.common.ppc64
+++ b/debian.master/config/ppc64/config.common.ppc64
< at >< at > -57,6 +57,7 < at >< at > CONFIG_BLK_DEV_SR_VENDOR=y
 CONFIG_BLK_DEV_UB=m
 CONFIG_BRCMFMAC=m
 CONFIG_BRIDGE=m
+CONFIG_BROADCOM_PHY=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BT=m
< at >< at > -73,6 +74,7 < at >< at > CONFIG_CHR_DEV_OSST=m
 CONFIG_CHR_DEV_SCH=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=y
 CONFIG_CIFS=m
 # CONFIG_CIFS_EXPERIMENTAL is not set
 # CONFIG_CIFS_XATTR is not set
< at >< at > -142,6 +144,7 < at >< at > CONFIG_CRYPTO_XTS=m
 CONFIG_CRYPTO_ZLIB=m
 CONFIG_CUSE=m
 # CONFIG_DAB is not set
+CONFIG_DAVICOM_PHY=y
 CONFIG_DCB=y
 CONFIG_DE600=m
 CONFIG_DE620=m
< at >< at > -302,6 +305,7 < at >< at > CONFIG_I2C_TAOS_EVM=m
 CONFIG_I2C_TINY_USB=m
 CONFIG_I2C_XILINX=m
 CONFIG_IBMEBUS=y
+CONFIG_ICPLUS_PHY=y
 CONFIG_IDE=y
 CONFIG_IEEE802154=m
 CONFIG_IIO=m
< at >< at > -432,6 +436,8 < at >< at > CONFIG_LOGITECH_FF=y
 CONFIG_LOGIWHEELS_FF=y
 CONFIG_LOG_BUF_SHIFT=19
 CONFIG_LPARCFG=y
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LXT_PHY=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_MAC80211_DEBUG_MENU=y
 CONFIG_MAC80211_HWSIM=m
< at >< at > -439,6 +445,7 < at >< at > CONFIG_MAC80211_MESH=y
 CONFIG_MACVLAN=m
 CONFIG_MAC_PARTITION=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MAX_ACTIVE_REGIONS=256
 CONFIG_MAX_RAW_DEVS=8192
 CONFIG_MEDIA_SUPPORT=m
< at >< at > -500,6 +507,7 < at >< at > CONFIG_MTD_OF_PARTS=m
 CONFIG_MTD_SM_COMMON=m
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_MWIFIEX=m
+CONFIG_NATIONAL_PHY=y
 CONFIG_NCP_FS=m
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
< at >< at > -509,7 +517,6 < at >< at > CONFIG_NETPOLL=y
 CONFIG_NET_9P=m
 # CONFIG_NET_CALXEDA_XGMAC is not set
 CONFIG_NET_DMA=y
-CONFIG_NET_DSA=y
 CONFIG_NET_IPGRE_DEMUX=m
 CONFIG_NET_IPIP=m
 CONFIG_NET_KEY=m
< at >< at > -561,6 +568,7 < at >< at > CONFIG_NODES_SHIFT=8
 CONFIG_NOP_USB_XCEIV=m
 CONFIG_NR_CPUS=1024
 CONFIG_NTFS_FS=m
+CONFIG_OF_MDIO=y
 CONFIG_OMFS_FS=m
 CONFIG_OPROFILE=m
 CONFIG_OSF_PARTITION=y
< at >< at > -625,6 +633,7 < at >< at > CONFIG_PSTORE=y
 CONFIG_QFMT_V1=m
 CONFIG_QFMT_V2=m
 CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 CONFIG_R3964=m
 CONFIG_R8712U=m
< at >< at > -633,6 +642,7 < at >< at > CONFIG_RAMOOPS=m
 CONFIG_RAW_DRIVER=m
 CONFIG_RCU_FANOUT=64
 CONFIG_RDS=m
+CONFIG_REALTEK_PHY=y
 CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_DEBUG is not set
 CONFIG_REGULATOR_FIXED_VOLTAGE=m
< at >< at > -818,6 +828,7 < at >< at > CONFIG_SERIO_SERPORT=m
 CONFIG_SGI_PARTITION=y
 CONFIG_SLHC=y
 CONFIG_SLIP=m
+CONFIG_SMSC_PHY=y
 # CONFIG_SM_FTL is not set
 CONFIG_SND_BT87X_OVERCLOCK=y
 CONFIG_SND_EMU10K1_SEQ=m
< at >< at > -979,6 +990,7 < at >< at > CONFIG_VIRTIO_NET=m
 CONFIG_VIRTIO_PCI=m
 CONFIG_VIRTIO_RING=m
 CONFIG_VIRT_DRIVERS=y
+CONFIG_VITESSE_PHY=y
 CONFIG_VLAN_8021Q_GVRP=y
 # CONFIG_VME_BUS is not set
 # CONFIG_VT6656 is not set

[PATCH 09/12] dsa: Move switch drivers to new directorydrivers/net/dsa

Tim Gardner — 2012-05-24T20:58:21

From: Ben Hutchings <ben< at >decadent.org.uk>

BugLink: http://bugs.launchpad.net/bugs/1004148

Support for specific hardware belongs under drivers/net/ not net/.

Signed-off-by: Ben Hutchings <ben< at >decadent.org.uk>
Acked-by: Lennert Buytenhek <buytenh< at >wantstofly.org>
Signed-off-by: David S. Miller <davem< at >davemloft.net>
(cherry picked from commit 3b1588593097b7d71f44c4b7b435bf28924316e0)
Signed-off-by: Tim Gardner <tim.gardner< at >canonical.com>
---
 drivers/net/Kconfig               |    2 +
 drivers/net/Makefile              |    1 +
 drivers/net/dsa/Kconfig           |   36 +++
 drivers/net/dsa/Makefile          |    9 +
 drivers/net/dsa/mv88e6060.c       |  293 ++++++++++++++++++++
 drivers/net/dsa/mv88e6123_61_65.c |  438 +++++++++++++++++++++++++++++
 drivers/net/dsa/mv88e6131.c       |  435 +++++++++++++++++++++++++++++
 drivers/net/dsa/mv88e6xxx.c       |  549 +++++++++++++++++++++++++++++++++++++
 drivers/net/dsa/mv88e6xxx.h       |   98 +++++++
 net/dsa/Kconfig                   |   36 +--
 net/dsa/Makefile                  |   11 -
 net/dsa/mv88e6060.c               |  293 --------------------
 net/dsa/mv88e6123_61_65.c         |  438 -----------------------------
 net/dsa/mv88e6131.c               |  435 -----------------------------
 net/dsa/mv88e6xxx.c               |  549 -------------------------------------
 net/dsa/mv88e6xxx.h               |   98 -------
 16 files changed, 1862 insertions(+), 1859 deletions(-)
 create mode 100644 drivers/net/dsa/Kconfig
 create mode 100644 drivers/net/dsa/Makefile
 create mode 100644 drivers/net/dsa/mv88e6060.c
 create mode 100644 drivers/net/dsa/mv88e6123_61_65.c
 create mode 100644 drivers/net/dsa/mv88e6131.c
 create mode 100644 drivers/net/dsa/mv88e6xxx.c
 create mode 100644 drivers/net/dsa/mv88e6xxx.h
 delete mode 100644 net/dsa/mv88e6060.c
 delete mode 100644 net/dsa/mv88e6123_61_65.c
 delete mode 100644 net/dsa/mv88e6131.c
 delete mode 100644 net/dsa/mv88e6xxx.c
 delete mode 100644 net/dsa/mv88e6xxx.h

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 99aa7fa..087656f 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
< at >< at > -241,6 +241,8 < at >< at > source "drivers/atm/Kconfig"
 
 source "drivers/net/caif/Kconfig"
 
+source "drivers/net/dsa/Kconfig"
+
 source "drivers/net/ethernet/Kconfig"
 
 source "drivers/net/fddi/Kconfig"
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index a81192b..c9263bf 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
< at >< at > -29,6 +29,7 < at >< at > obj-$(CONFIG_DEV_APPLETALK) += appletalk/
 obj-$(CONFIG_CAIF) += caif/
 obj-$(CONFIG_CAN) += can/
 obj-$(CONFIG_ETRAX_ETHERNET) += cris/
+obj-$(CONFIG_NET_DSA) += dsa/
 obj-$(CONFIG_ETHERNET) += ethernet/
 obj-$(CONFIG_FDDI) += fddi/
 obj-$(CONFIG_HIPPI) += hippi/
diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig
new file mode 100644
index 0000000..dd151d5
--- /dev/null
+++ b/drivers/net/dsa/Kconfig
< at >< at > -0,0 +1,36 < at >< at >
+menu "Distributed Switch Architecture drivers"
+depends on NET_DSA
+
+config NET_DSA_MV88E6XXX
+tristate
+default n
+
+config NET_DSA_MV88E6060
+tristate "Marvell 88E6060 ethernet switch chip support"
+select NET_DSA_TAG_TRAILER
+---help---
+  This enables support for the Marvell 88E6060 ethernet switch
+  chip.
+
+config NET_DSA_MV88E6XXX_NEED_PPU
+bool
+default n
+
+config NET_DSA_MV88E6131
+tristate "Marvell 88E6085/6095/6095F/6131 ethernet switch chip support"
+select NET_DSA_MV88E6XXX
+select NET_DSA_MV88E6XXX_NEED_PPU
+select NET_DSA_TAG_DSA
+---help---
+  This enables support for the Marvell 88E6085/6095/6095F/6131
+  ethernet switch chips.
+
+config NET_DSA_MV88E6123_61_65
+tristate "Marvell 88E6123/6161/6165 ethernet switch chip support"
+select NET_DSA_MV88E6XXX
+select NET_DSA_TAG_EDSA
+---help---
+  This enables support for the Marvell 88E6123/6161/6165
+  ethernet switch chips.
+
+endmenu
diff --git a/drivers/net/dsa/Makefile b/drivers/net/dsa/Makefile
new file mode 100644
index 0000000..f3bda05
--- /dev/null
+++ b/drivers/net/dsa/Makefile
< at >< at > -0,0 +1,9 < at >< at >
+obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o
+obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx_drv.o
+mv88e6xxx_drv-y += mv88e6xxx.o
+ifdef CONFIG_NET_DSA_MV88E6123_61_65
+mv88e6xxx_drv-y += mv88e6123_61_65.o
+endif
+ifdef CONFIG_NET_DSA_MV88E6131
+mv88e6xxx_drv-y += mv88e6131.o
+endif
diff --git a/drivers/net/dsa/mv88e6060.c b/drivers/net/dsa/mv88e6060.c
new file mode 100644
index 0000000..7fc4e81
--- /dev/null
+++ b/drivers/net/dsa/mv88e6060.c
< at >< at > -0,0 +1,293 < at >< at >
+/*
+ * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
+ * Copyright (c) 2008-2009 Marvell Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/list.h>
+#include <linux/netdevice.h>
+#include <linux/phy.h>
+#include <net/dsa.h>
+
+#define REG_PORT(p)(8 + (p))
+#define REG_GLOBAL0x0f
+
+static int reg_read(struct dsa_switch *ds, int addr, int reg)
+{
+return mdiobus_read(ds->master_mii_bus, ds->pd->sw_addr + addr, reg);
+}
+
+#define REG_READ(addr, reg)\
+({\
+int __ret;\
+\
+__ret = reg_read(ds, addr, reg);\
+if (__ret < 0)\
+return __ret;\
+__ret;\
+})
+
+
+static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
+{
+return mdiobus_write(ds->master_mii_bus, ds->pd->sw_addr + addr,
+     reg, val);
+}
+
+#define REG_WRITE(addr, reg, val)\
+({\
+int __ret;\
+\
+__ret = reg_write(ds, addr, reg, val);\
+if (__ret < 0)\
+return __ret;\
+})
+
+static char *mv88e6060_probe(struct mii_bus *bus, int sw_addr)
+{
+int ret;
+
+ret = mdiobus_read(bus, sw_addr + REG_PORT(0), 0x03);
+if (ret >= 0) {
+ret &= 0xfff0;
+if (ret == 0x0600)
+return "Marvell 88E6060";
+}
+
+return NULL;
+}
+
+static int mv88e6060_switch_reset(struct dsa_switch *ds)
+{
+int i;
+int ret;
+
+/*
+ * Set all ports to the disabled state.
+ */
+for (i = 0; i < 6; i++) {
+ret = REG_READ(REG_PORT(i), 0x04);
+REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
+}
+
+/*
+ * Wait for transmit queues to drain.
+ */
+msleep(2);
+
+/*
+ * Reset the switch.
+ */
+REG_WRITE(REG_GLOBAL, 0x0a, 0xa130);
+
+/*
+ * Wait up to one second for reset to complete.
+ */
+for (i = 0; i < 1000; i++) {
+ret = REG_READ(REG_GLOBAL, 0x00);
+if ((ret & 0x8000) == 0x0000)
+break;
+
+msleep(1);
+}
+if (i == 1000)
+return -ETIMEDOUT;
+
+return 0;
+}
+
+static int mv88e6060_setup_global(struct dsa_switch *ds)
+{
+/*
+ * Disable discarding of frames with excessive collisions,
+ * set the maximum frame size to 1536 bytes, and mask all
+ * interrupt sources.
+ */
+REG_WRITE(REG_GLOBAL, 0x04, 0x0800);
+
+/*
+ * Enable automatic address learning, set the address
+ * database size to 1024 entries, and set the default aging
+ * time to 5 minutes.
+ */
+REG_WRITE(REG_GLOBAL, 0x0a, 0x2130);
+
+return 0;
+}
+
+static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
+{
+int addr = REG_PORT(p);
+
+/*
+ * Do not force flow control, disable Ingress and Egress
+ * Header tagging, disable VLAN tunneling, and set the port
+ * state to Forwarding.  Additionally, if this is the CPU
+ * port, enable Ingress and Egress Trailer tagging mode.
+ */
+REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ?  0x4103 : 0x0003);
+
+/*
+ * Port based VLAN map: give each port its own address
+ * database, allow the CPU port to talk to each of the 'real'
+ * ports, and allow each of the 'real' ports to only talk to
+ * the CPU port.
+ */
+REG_WRITE(addr, 0x06,
+((p & 0xf) << 12) |
+ (dsa_is_cpu_port(ds, p) ?
+ds->phys_port_mask :
+(1 << ds->dst->cpu_port)));
+
+/*
+ * Port Association Vector: when learning source addresses
+ * of packets, add the address to the address database using
+ * a port bitmap that has only the bit for this port set and
+ * the other bits clear.
+ */
+REG_WRITE(addr, 0x0b, 1 << p);
+
+return 0;
+}
+
+static int mv88e6060_setup(struct dsa_switch *ds)
+{
+int i;
+int ret;
+
+ret = mv88e6060_switch_reset(ds);
+if (ret < 0)
+return ret;
+
+/* < at >< at >< at > initialise atu */
+
+ret = mv88e6060_setup_global(ds);
+if (ret < 0)
+return ret;
+
+for (i = 0; i < 6; i++) {
+ret = mv88e6060_setup_port(ds, i);
+if (ret < 0)
+return ret;
+}
+
+return 0;
+}
+
+static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr)
+{
+REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]);
+REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]);
+REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]);
+
+return 0;
+}
+
+static int mv88e6060_port_to_phy_addr(int port)
+{
+if (port >= 0 && port <= 5)
+return port;
+return -1;
+}
+
+static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
+{
+int addr;
+
+addr = mv88e6060_port_to_phy_addr(port);
+if (addr == -1)
+return 0xffff;
+
+return reg_read(ds, addr, regnum);
+}
+
+static int
+mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
+{
+int addr;
+
+addr = mv88e6060_port_to_phy_addr(port);
+if (addr == -1)
+return 0xffff;
+
+return reg_write(ds, addr, regnum, val);
+}
+
+static void mv88e6060_poll_link(struct dsa_switch *ds)
+{
+int i;
+
+for (i = 0; i < DSA_MAX_PORTS; i++) {
+struct net_device *dev;
+int uninitialized_var(port_status);
+int link;
+int speed;
+int duplex;
+int fc;
+
+dev = ds->ports[i];
+if (dev == NULL)
+continue;
+
+link = 0;
+if (dev->flags & IFF_UP) {
+port_status = reg_read(ds, REG_PORT(i), 0x00);
+if (port_status < 0)
+continue;
+
+link = !!(port_status & 0x1000);
+}
+
+if (!link) {
+if (netif_carrier_ok(dev)) {
+printk(KERN_INFO "%s: link down\n", dev->name);
+netif_carrier_off(dev);
+}
+continue;
+}
+
+speed = (port_status & 0x0100) ? 100 : 10;
+duplex = (port_status & 0x0200) ? 1 : 0;
+fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0;
+
+if (!netif_carrier_ok(dev)) {
+printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, "
+ "flow control %sabled\n", dev->name,
+ speed, duplex ? "full" : "half",
+ fc ? "en" : "dis");
+netif_carrier_on(dev);
+}
+}
+}
+
+static struct dsa_switch_driver mv88e6060_switch_driver = {
+.tag_protocol= htons(ETH_P_TRAILER),
+.probe= mv88e6060_probe,
+.setup= mv88e6060_setup,
+.set_addr= mv88e6060_set_addr,
+.phy_read= mv88e6060_phy_read,
+.phy_write= mv88e6060_phy_write,
+.poll_link= mv88e6060_poll_link,
+};
+
+static int __init mv88e6060_init(void)
+{
+register_switch_driver(&mv88e6060_switch_driver);
+return 0;
+}
+module_init(mv88e6060_init);
+
+static void __exit mv88e6060_cleanup(void)
+{
+unregister_switch_driver(&mv88e6060_switch_driver);
+}
+module_exit(mv88e6060_cleanup);
+
+MODULE_AUTHOR("Lennert Buytenhek <buytenh< at >wantstofly.org>");
+MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mv88e6060");
diff --git a/drivers/net/dsa/mv88e6123_61_65.c b/drivers/net/dsa/mv88e6123_61_65.c
new file mode 100644
index 0000000..c0a458f
--- /dev/null
+++ b/drivers/net/dsa/mv88e6123_61_65.c
< at >< at > -0,0 +1,438 < at >< at >
+/*
+ * net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support
+ * Copyright (c) 2008-2009 Marvell Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/list.h>
+#include <linux/netdevice.h>
+#include <linux/phy.h>
+#include <net/dsa.h>
+#include "mv88e6xxx.h"
+
+static char *mv88e6123_61_65_probe(struct mii_bus *bus, int sw_addr)
+{
+int ret;
+
+ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), 0x03);
+if (ret >= 0) {
+ret &= 0xfff0;
+if (ret == 0x1210)
+return "Marvell 88E6123";
+if (ret == 0x1610)
+return "Marvell 88E6161";
+if (ret == 0x1650)
+return "Marvell 88E6165";
+}
+
+return NULL;
+}
+
+static int mv88e6123_61_65_switch_reset(struct dsa_switch *ds)
+{
+int i;
+int ret;
+
+/*
+ * Set all ports to the disabled state.
+ */
+for (i = 0; i < 8; i++) {
+ret = REG_READ(REG_PORT(i), 0x04);
+REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
+}
+
+/*
+ * Wait for transmit queues to drain.
+ */
+msleep(2);
+
+/*
+ * Reset the switch.
+ */
+REG_WRITE(REG_GLOBAL, 0x04, 0xc400);
+
+/*
+ * Wait up to one second for reset to complete.
+ */
+for (i = 0; i < 1000; i++) {
+ret = REG_READ(REG_GLOBAL, 0x00);
+if ((ret & 0xc800) == 0xc800)
+break;
+
+msleep(1);
+}
+if (i == 1000)
+return -ETIMEDOUT;
+
+return 0;
+}
+
+static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
+{
+int ret;
+int i;
+
+/*
+ * Disable the PHY polling unit (since there won't be any
+ * external PHYs to poll), don't discard packets with
+ * excessive collisions, and mask all interrupt sources.
+ */
+REG_WRITE(REG_GLOBAL, 0x04, 0x0000);
+
+/*
+ * Set the default address aging time to 5 minutes, and
+ * enable address learn messages to be sent to all message
+ * ports.
+ */
+REG_WRITE(REG_GLOBAL, 0x0a, 0x0148);
+
+/*
+ * Configure the priority mapping registers.
+ */
+ret = mv88e6xxx_config_prio(ds);
+if (ret < 0)
+return ret;
+
+/*
+ * Configure the upstream port, and configure the upstream
+ * port as the port to which ingress and egress monitor frames
+ * are to be sent.
+ */
+REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110));
+
+/*
+ * Disable remote management for now, and set the switch's
+ * DSA device number.
+ */
+REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
+
+/*
+ * Send all frames with destination addresses matching
+ * 01:80:c2:00:00:2x to the CPU port.
+ */
+REG_WRITE(REG_GLOBAL2, 0x02, 0xffff);
+
+/*
+ * Send all frames with destination addresses matching
+ * 01:80:c2:00:00:0x to the CPU port.
+ */
+REG_WRITE(REG_GLOBAL2, 0x03, 0xffff);
+
+/*
+ * Disable the loopback filter, disable flow control
+ * messages, disable flood broadcast override, disable
+ * removing of provider tags, disable ATU age violation
+ * interrupts, disable tag flow control, force flow
+ * control priority to the highest, and send all special
+ * multicast frames to the CPU at the highest priority.
+ */
+REG_WRITE(REG_GLOBAL2, 0x05, 0x00ff);
+
+/*
+ * Program the DSA routing table.
+ */
+for (i = 0; i < 32; i++) {
+int nexthop;
+
+nexthop = 0x1f;
+if (i != ds->index && i < ds->dst->pd->nr_chips)
+nexthop = ds->pd->rtable[i] & 0x1f;
+
+REG_WRITE(REG_GLOBAL2, 0x06, 0x8000 | (i << 8) | nexthop);
+}
+
+/*
+ * Clear all trunk masks.
+ */
+for (i = 0; i < 8; i++)
+REG_WRITE(REG_GLOBAL2, 0x07, 0x8000 | (i << 12) | 0xff);
+
+/*
+ * Clear all trunk mappings.
+ */
+for (i = 0; i < 16; i++)
+REG_WRITE(REG_GLOBAL2, 0x08, 0x8000 | (i << 11));
+
+/*
+ * Disable ingress rate limiting by resetting all ingress
+ * rate limit registers to their initial state.
+ */
+for (i = 0; i < 6; i++)
+REG_WRITE(REG_GLOBAL2, 0x09, 0x9000 | (i << 8));
+
+/*
+ * Initialise cross-chip port VLAN table to reset defaults.
+ */
+REG_WRITE(REG_GLOBAL2, 0x0b, 0x9000);
+
+/*
+ * Clear the priority override table.
+ */
+for (i = 0; i < 16; i++)
+REG_WRITE(REG_GLOBAL2, 0x0f, 0x8000 | (i << 8));
+
+/* < at >< at >< at > initialise AVB (22/23) watchdog (27) sdet (29) registers */
+
+return 0;
+}
+
+static int mv88e6123_61_65_setup_port(struct dsa_switch *ds, int p)
+{
+int addr = REG_PORT(p);
+u16 val;
+
+/*
+ * MAC Forcing register: don't force link, speed, duplex
+ * or flow control state to any particular values on physical
+ * ports, but force the CPU port and all DSA ports to 1000 Mb/s
+ * full duplex.
+ */
+if (dsa_is_cpu_port(ds, p) || ds->dsa_port_mask & (1 << p))
+REG_WRITE(addr, 0x01, 0x003e);
+else
+REG_WRITE(addr, 0x01, 0x0003);
+
+/*
+ * Do not limit the period of time that this port can be
+ * paused for by the remote end or the period of time that
+ * this port can pause the remote end.
+ */
+REG_WRITE(addr, 0x02, 0x0000);
+
+/*
+ * Port Control: disable Drop-on-Unlock, disable Drop-on-Lock,
+ * disable Header mode, enable IGMP/MLD snooping, disable VLAN
+ * tunneling, determine priority by looking at 802.1p and IP
+ * priority fields (IP prio has precedence), and set STP state
+ * to Forwarding.
+ *
+ * If this is the CPU link, use DSA or EDSA tagging depending
+ * on which tagging mode was configured.
+ *
+ * If this is a link to another switch, use DSA tagging mode.
+ *
+ * If this is the upstream port for this switch, enable
+ * forwarding of unknown unicasts and multicasts.
+ */
+val = 0x0433;
+if (dsa_is_cpu_port(ds, p)) {
+if (ds->dst->tag_protocol == htons(ETH_P_EDSA))
+val |= 0x3300;
+else
+val |= 0x0100;
+}
+if (ds->dsa_port_mask & (1 << p))
+val |= 0x0100;
+if (p == dsa_upstream_port(ds))
+val |= 0x000c;
+REG_WRITE(addr, 0x04, val);
+
+/*
+ * Port Control 1: disable trunking.  Also, if this is the
+ * CPU port, enable learn messages to be sent to this port.
+ */
+REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);
+
+/*
+ * Port based VLAN map: give each port its own address
+ * database, allow the CPU port to talk to each of the 'real'
+ * ports, and allow each of the 'real' ports to only talk to
+ * the upstream port.
+ */
+val = (p & 0xf) << 12;
+if (dsa_is_cpu_port(ds, p))
+val |= ds->phys_port_mask;
+else
+val |= 1 << dsa_upstream_port(ds);
+REG_WRITE(addr, 0x06, val);
+
+/*
+ * Default VLAN ID and priority: don't set a default VLAN
+ * ID, and set the default packet priority to zero.
+ */
+REG_WRITE(addr, 0x07, 0x0000);
+
+/*
+ * Port Control 2: don't force a good FCS, set the maximum
+ * frame size to 10240 bytes, don't let the switch add or
+ * strip 802.1q tags, don't discard tagged or untagged frames
+ * on this port, do a destination address lookup on all
+ * received packets as usual, disable ARP mirroring and don't
+ * send a copy of all transmitted/received frames on this port
+ * to the CPU.
+ */
+REG_WRITE(addr, 0x08, 0x2080);
+
+/*
+ * Egress rate control: disable egress rate control.
+ */
+REG_WRITE(addr, 0x09, 0x0001);
+
+/*
+ * Egress rate control 2: disable egress rate control.
+ */
+REG_WRITE(addr, 0x0a, 0x0000);
+
+/*
+ * Port Association Vector: when learning source addresses
+ * of packets, add the address to the address database using
+ * a port bitmap that has only the bit for this port set and
+ * the other bits clear.
+ */
+REG_WRITE(addr, 0x0b, 1 << p);
+
+/*
+ * Port ATU control: disable limiting the number of address
+ * database entries that this port is allowed to use.
+ */
+REG_WRITE(addr, 0x0c, 0x0000);
+
+/*
+ * Priorit Override: disable DA, SA and VTU priority override.
+ */
+REG_WRITE(addr, 0x0d, 0x0000);
+
+/*
+ * Port Ethertype: use the Ethertype DSA Ethertype value.
+ */
+REG_WRITE(addr, 0x0f, ETH_P_EDSA);
+
+/*
+ * Tag Remap: use an identity 802.1p prio -> switch prio
+ * mapping.
+ */
+REG_WRITE(addr, 0x18, 0x3210);
+
+/*
+ * Tag Remap 2: use an identity 802.1p prio -> switch prio
+ * mapping.
+ */
+REG_WRITE(addr, 0x19, 0x7654);
+
+return 0;
+}
+
+static int mv88e6123_61_65_setup(struct dsa_switch *ds)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+int i;
+int ret;
+
+mutex_init(&ps->smi_mutex);
+mutex_init(&ps->stats_mutex);
+
+ret = mv88e6123_61_65_switch_reset(ds);
+if (ret < 0)
+return ret;
+
+/* < at >< at >< at > initialise vtu and atu */
+
+ret = mv88e6123_61_65_setup_global(ds);
+if (ret < 0)
+return ret;
+
+for (i = 0; i < 6; i++) {
+ret = mv88e6123_61_65_setup_port(ds, i);
+if (ret < 0)
+return ret;
+}
+
+return 0;
+}
+
+static int mv88e6123_61_65_port_to_phy_addr(int port)
+{
+if (port >= 0 && port <= 4)
+return port;
+return -1;
+}
+
+static int
+mv88e6123_61_65_phy_read(struct dsa_switch *ds, int port, int regnum)
+{
+int addr = mv88e6123_61_65_port_to_phy_addr(port);
+return mv88e6xxx_phy_read(ds, addr, regnum);
+}
+
+static int
+mv88e6123_61_65_phy_write(struct dsa_switch *ds,
+      int port, int regnum, u16 val)
+{
+int addr = mv88e6123_61_65_port_to_phy_addr(port);
+return mv88e6xxx_phy_write(ds, addr, regnum, val);
+}
+
+static struct mv88e6xxx_hw_stat mv88e6123_61_65_hw_stats[] = {
+{ "in_good_octets", 8, 0x00, },
+{ "in_bad_octets", 4, 0x02, },
+{ "in_unicast", 4, 0x04, },
+{ "in_broadcasts", 4, 0x06, },
+{ "in_multicasts", 4, 0x07, },
+{ "in_pause", 4, 0x16, },
+{ "in_undersize", 4, 0x18, },
+{ "in_fragments", 4, 0x19, },
+{ "in_oversize", 4, 0x1a, },
+{ "in_jabber", 4, 0x1b, },
+{ "in_rx_error", 4, 0x1c, },
+{ "in_fcs_error", 4, 0x1d, },
+{ "out_octets", 8, 0x0e, },
+{ "out_unicast", 4, 0x10, },
+{ "out_broadcasts", 4, 0x13, },
+{ "out_multicasts", 4, 0x12, },
+{ "out_pause", 4, 0x15, },
+{ "excessive", 4, 0x11, },
+{ "collisions", 4, 0x1e, },
+{ "deferred", 4, 0x05, },
+{ "single", 4, 0x14, },
+{ "multiple", 4, 0x17, },
+{ "out_fcs_error", 4, 0x03, },
+{ "late", 4, 0x1f, },
+{ "hist_64bytes", 4, 0x08, },
+{ "hist_65_127bytes", 4, 0x09, },
+{ "hist_128_255bytes", 4, 0x0a, },
+{ "hist_256_511bytes", 4, 0x0b, },
+{ "hist_512_1023bytes", 4, 0x0c, },
+{ "hist_1024_max_bytes", 4, 0x0d, },
+};
+
+static void
+mv88e6123_61_65_get_strings(struct dsa_switch *ds, int port, uint8_t *data)
+{
+mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6123_61_65_hw_stats),
+      mv88e6123_61_65_hw_stats, port, data);
+}
+
+static void
+mv88e6123_61_65_get_ethtool_stats(struct dsa_switch *ds,
+  int port, uint64_t *data)
+{
+mv88e6xxx_get_ethtool_stats(ds, ARRAY_SIZE(mv88e6123_61_65_hw_stats),
+    mv88e6123_61_65_hw_stats, port, data);
+}
+
+static int mv88e6123_61_65_get_sset_count(struct dsa_switch *ds)
+{
+return ARRAY_SIZE(mv88e6123_61_65_hw_stats);
+}
+
+struct dsa_switch_driver mv88e6123_61_65_switch_driver = {
+.tag_protocol= cpu_to_be16(ETH_P_EDSA),
+.priv_size= sizeof(struct mv88e6xxx_priv_state),
+.probe= mv88e6123_61_65_probe,
+.setup= mv88e6123_61_65_setup,
+.set_addr= mv88e6xxx_set_addr_indirect,
+.phy_read= mv88e6123_61_65_phy_read,
+.phy_write= mv88e6123_61_65_phy_write,
+.poll_link= mv88e6xxx_poll_link,
+.get_strings= mv88e6123_61_65_get_strings,
+.get_ethtool_stats= mv88e6123_61_65_get_ethtool_stats,
+.get_sset_count= mv88e6123_61_65_get_sset_count,
+};
+
+MODULE_ALIAS("platform:mv88e6123");
+MODULE_ALIAS("platform:mv88e6161");
+MODULE_ALIAS("platform:mv88e6165");
diff --git a/drivers/net/dsa/mv88e6131.c b/drivers/net/dsa/mv88e6131.c
new file mode 100644
index 0000000..e0eb6824
--- /dev/null
+++ b/drivers/net/dsa/mv88e6131.c
< at >< at > -0,0 +1,435 < at >< at >
+/*
+ * net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support
+ * Copyright (c) 2008-2009 Marvell Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/list.h>
+#include <linux/netdevice.h>
+#include <linux/phy.h>
+#include <net/dsa.h>
+#include "mv88e6xxx.h"
+
+/*
+ * Switch product IDs
+ */
+#define ID_60850x04a0
+#define ID_60950x0950
+#define ID_61310x1060
+
+static char *mv88e6131_probe(struct mii_bus *bus, int sw_addr)
+{
+int ret;
+
+ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), 0x03);
+if (ret >= 0) {
+ret &= 0xfff0;
+if (ret == ID_6085)
+return "Marvell 88E6085";
+if (ret == ID_6095)
+return "Marvell 88E6095/88E6095F";
+if (ret == ID_6131)
+return "Marvell 88E6131";
+}
+
+return NULL;
+}
+
+static int mv88e6131_switch_reset(struct dsa_switch *ds)
+{
+int i;
+int ret;
+
+/*
+ * Set all ports to the disabled state.
+ */
+for (i = 0; i < 11; i++) {
+ret = REG_READ(REG_PORT(i), 0x04);
+REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
+}
+
+/*
+ * Wait for transmit queues to drain.
+ */
+msleep(2);
+
+/*
+ * Reset the switch.
+ */
+REG_WRITE(REG_GLOBAL, 0x04, 0xc400);
+
+/*
+ * Wait up to one second for reset to complete.
+ */
+for (i = 0; i < 1000; i++) {
+ret = REG_READ(REG_GLOBAL, 0x00);
+if ((ret & 0xc800) == 0xc800)
+break;
+
+msleep(1);
+}
+if (i == 1000)
+return -ETIMEDOUT;
+
+return 0;
+}
+
+static int mv88e6131_setup_global(struct dsa_switch *ds)
+{
+int ret;
+int i;
+
+/*
+ * Enable the PHY polling unit, don't discard packets with
+ * excessive collisions, use a weighted fair queueing scheme
+ * to arbitrate between packet queues, set the maximum frame
+ * size to 1632, and mask all interrupt sources.
+ */
+REG_WRITE(REG_GLOBAL, 0x04, 0x4400);
+
+/*
+ * Set the default address aging time to 5 minutes, and
+ * enable address learn messages to be sent to all message
+ * ports.
+ */
+REG_WRITE(REG_GLOBAL, 0x0a, 0x0148);
+
+/*
+ * Configure the priority mapping registers.
+ */
+ret = mv88e6xxx_config_prio(ds);
+if (ret < 0)
+return ret;
+
+/*
+ * Set the VLAN ethertype to 0x8100.
+ */
+REG_WRITE(REG_GLOBAL, 0x19, 0x8100);
+
+/*
+ * Disable ARP mirroring, and configure the upstream port as
+ * the port to which ingress and egress monitor frames are to
+ * be sent.
+ */
+REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1100) | 0x00f0);
+
+/*
+ * Disable cascade port functionality unless this device
+ * is used in a cascade configuration, and set the switch's
+ * DSA device number.
+ */
+if (ds->dst->pd->nr_chips > 1)
+REG_WRITE(REG_GLOBAL, 0x1c, 0xf000 | (ds->index & 0x1f));
+else
+REG_WRITE(REG_GLOBAL, 0x1c, 0xe000 | (ds->index & 0x1f));
+
+/*
+ * Send all frames with destination addresses matching
+ * 01:80:c2:00:00:0x to the CPU port.
+ */
+REG_WRITE(REG_GLOBAL2, 0x03, 0xffff);
+
+/*
+ * Ignore removed tag data on doubly tagged packets, disable
+ * flow control messages, force flow control priority to the
+ * highest, and send all special multicast frames to the CPU
+ * port at the highest priority.
+ */
+REG_WRITE(REG_GLOBAL2, 0x05, 0x00ff);
+
+/*
+ * Program the DSA routing table.
+ */
+for (i = 0; i < 32; i++) {
+int nexthop;
+
+nexthop = 0x1f;
+if (i != ds->index && i < ds->dst->pd->nr_chips)
+nexthop = ds->pd->rtable[i] & 0x1f;
+
+REG_WRITE(REG_GLOBAL2, 0x06, 0x8000 | (i << 8) | nexthop);
+}
+
+/*
+ * Clear all trunk masks.
+ */
+for (i = 0; i < 8; i++)
+REG_WRITE(REG_GLOBAL2, 0x07, 0x8000 | (i << 12) | 0x7ff);
+
+/*
+ * Clear all trunk mappings.
+ */
+for (i = 0; i < 16; i++)
+REG_WRITE(REG_GLOBAL2, 0x08, 0x8000 | (i << 11));
+
+/*
+ * Force the priority of IGMP/MLD snoop frames and ARP frames
+ * to the highest setting.
+ */
+REG_WRITE(REG_GLOBAL2, 0x0f, 0x00ff);
+
+return 0;
+}
+
+static int mv88e6131_setup_port(struct dsa_switch *ds, int p)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+int addr = REG_PORT(p);
+u16 val;
+
+/*
+ * MAC Forcing register: don't force link, speed, duplex
+ * or flow control state to any particular values on physical
+ * ports, but force the CPU port and all DSA ports to 1000 Mb/s
+ * (100 Mb/s on 6085) full duplex.
+ */
+if (dsa_is_cpu_port(ds, p) || ds->dsa_port_mask & (1 << p))
+if (ps->id == ID_6085)
+REG_WRITE(addr, 0x01, 0x003d); /* 100 Mb/s */
+else
+REG_WRITE(addr, 0x01, 0x003e); /* 1000 Mb/s */
+else
+REG_WRITE(addr, 0x01, 0x0003);
+
+/*
+ * Port Control: disable Core Tag, disable Drop-on-Lock,
+ * transmit frames unmodified, disable Header mode,
+ * enable IGMP/MLD snoop, disable DoubleTag, disable VLAN
+ * tunneling, determine priority by looking at 802.1p and
+ * IP priority fields (IP prio has precedence), and set STP
+ * state to Forwarding.
+ *
+ * If this is the upstream port for this switch, enable
+ * forwarding of unknown unicasts, and enable DSA tagging
+ * mode.
+ *
+ * If this is the link to another switch, use DSA tagging
+ * mode, but do not enable forwarding of unknown unicasts.
+ */
+val = 0x0433;
+if (p == dsa_upstream_port(ds)) {
+val |= 0x0104;
+/*
+ * On 6085, unknown multicast forward is controlled
+ * here rather than in Port Control 2 register.
+ */
+if (ps->id == ID_6085)
+val |= 0x0008;
+}
+if (ds->dsa_port_mask & (1 << p))
+val |= 0x0100;
+REG_WRITE(addr, 0x04, val);
+
+/*
+ * Port Control 1: disable trunking.  Also, if this is the
+ * CPU port, enable learn messages to be sent to this port.
+ */
+REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);
+
+/*
+ * Port based VLAN map: give each port its own address
+ * database, allow the CPU port to talk to each of the 'real'
+ * ports, and allow each of the 'real' ports to only talk to
+ * the upstream port.
+ */
+val = (p & 0xf) << 12;
+if (dsa_is_cpu_port(ds, p))
+val |= ds->phys_port_mask;
+else
+val |= 1 << dsa_upstream_port(ds);
+REG_WRITE(addr, 0x06, val);
+
+/*
+ * Default VLAN ID and priority: don't set a default VLAN
+ * ID, and set the default packet priority to zero.
+ */
+REG_WRITE(addr, 0x07, 0x0000);
+
+/*
+ * Port Control 2: don't force a good FCS, don't use
+ * VLAN-based, source address-based or destination
+ * address-based priority overrides, don't let the switch
+ * add or strip 802.1q tags, don't discard tagged or
+ * untagged frames on this port, do a destination address
+ * lookup on received packets as usual, don't send a copy
+ * of all transmitted/received frames on this port to the
+ * CPU, and configure the upstream port number.
+ *
+ * If this is the upstream port for this switch, enable
+ * forwarding of unknown multicast addresses.
+ */
+if (ps->id == ID_6085)
+/*
+ * on 6085, bits 3:0 are reserved, bit 6 control ARP
+ * mirroring, and multicast forward is handled in
+ * Port Control register.
+ */
+REG_WRITE(addr, 0x08, 0x0080);
+else {
+val = 0x0080 | dsa_upstream_port(ds);
+if (p == dsa_upstream_port(ds))
+val |= 0x0040;
+REG_WRITE(addr, 0x08, val);
+}
+
+/*
+ * Rate Control: disable ingress rate limiting.
+ */
+REG_WRITE(addr, 0x09, 0x0000);
+
+/*
+ * Rate Control 2: disable egress rate limiting.
+ */
+REG_WRITE(addr, 0x0a, 0x0000);
+
+/*
+ * Port Association Vector: when learning source addresses
+ * of packets, add the address to the address database using
+ * a port bitmap that has only the bit for this port set and
+ * the other bits clear.
+ */
+REG_WRITE(addr, 0x0b, 1 << p);
+
+/*
+ * Tag Remap: use an identity 802.1p prio -> switch prio
+ * mapping.
+ */
+REG_WRITE(addr, 0x18, 0x3210);
+
+/*
+ * Tag Remap 2: use an identity 802.1p prio -> switch prio
+ * mapping.
+ */
+REG_WRITE(addr, 0x19, 0x7654);
+
+return 0;
+}
+
+static int mv88e6131_setup(struct dsa_switch *ds)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+int i;
+int ret;
+
+mutex_init(&ps->smi_mutex);
+mv88e6xxx_ppu_state_init(ds);
+mutex_init(&ps->stats_mutex);
+
+ps->id = REG_READ(REG_PORT(0), 0x03) & 0xfff0;
+
+ret = mv88e6131_switch_reset(ds);
+if (ret < 0)
+return ret;
+
+/* < at >< at >< at > initialise vtu and atu */
+
+ret = mv88e6131_setup_global(ds);
+if (ret < 0)
+return ret;
+
+for (i = 0; i < 11; i++) {
+ret = mv88e6131_setup_port(ds, i);
+if (ret < 0)
+return ret;
+}
+
+return 0;
+}
+
+static int mv88e6131_port_to_phy_addr(int port)
+{
+if (port >= 0 && port <= 11)
+return port;
+return -1;
+}
+
+static int
+mv88e6131_phy_read(struct dsa_switch *ds, int port, int regnum)
+{
+int addr = mv88e6131_port_to_phy_addr(port);
+return mv88e6xxx_phy_read_ppu(ds, addr, regnum);
+}
+
+static int
+mv88e6131_phy_write(struct dsa_switch *ds,
+      int port, int regnum, u16 val)
+{
+int addr = mv88e6131_port_to_phy_addr(port);
+return mv88e6xxx_phy_write_ppu(ds, addr, regnum, val);
+}
+
+static struct mv88e6xxx_hw_stat mv88e6131_hw_stats[] = {
+{ "in_good_octets", 8, 0x00, },
+{ "in_bad_octets", 4, 0x02, },
+{ "in_unicast", 4, 0x04, },
+{ "in_broadcasts", 4, 0x06, },
+{ "in_multicasts", 4, 0x07, },
+{ "in_pause", 4, 0x16, },
+{ "in_undersize", 4, 0x18, },
+{ "in_fragments", 4, 0x19, },
+{ "in_oversize", 4, 0x1a, },
+{ "in_jabber", 4, 0x1b, },
+{ "in_rx_error", 4, 0x1c, },
+{ "in_fcs_error", 4, 0x1d, },
+{ "out_octets", 8, 0x0e, },
+{ "out_unicast", 4, 0x10, },
+{ "out_broadcasts", 4, 0x13, },
+{ "out_multicasts", 4, 0x12, },
+{ "out_pause", 4, 0x15, },
+{ "excessive", 4, 0x11, },
+{ "collisions", 4, 0x1e, },
+{ "deferred", 4, 0x05, },
+{ "single", 4, 0x14, },
+{ "multiple", 4, 0x17, },
+{ "out_fcs_error", 4, 0x03, },
+{ "late", 4, 0x1f, },
+{ "hist_64bytes", 4, 0x08, },
+{ "hist_65_127bytes", 4, 0x09, },
+{ "hist_128_255bytes", 4, 0x0a, },
+{ "hist_256_511bytes", 4, 0x0b, },
+{ "hist_512_1023bytes", 4, 0x0c, },
+{ "hist_1024_max_bytes", 4, 0x0d, },
+};
+
+static void
+mv88e6131_get_strings(struct dsa_switch *ds, int port, uint8_t *data)
+{
+mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6131_hw_stats),
+      mv88e6131_hw_stats, port, data);
+}
+
+static void
+mv88e6131_get_ethtool_stats(struct dsa_switch *ds,
+  int port, uint64_t *data)
+{
+mv88e6xxx_get_ethtool_stats(ds, ARRAY_SIZE(mv88e6131_hw_stats),
+    mv88e6131_hw_stats, port, data);
+}
+
+static int mv88e6131_get_sset_count(struct dsa_switch *ds)
+{
+return ARRAY_SIZE(mv88e6131_hw_stats);
+}
+
+struct dsa_switch_driver mv88e6131_switch_driver = {
+.tag_protocol= cpu_to_be16(ETH_P_DSA),
+.priv_size= sizeof(struct mv88e6xxx_priv_state),
+.probe= mv88e6131_probe,
+.setup= mv88e6131_setup,
+.set_addr= mv88e6xxx_set_addr_direct,
+.phy_read= mv88e6131_phy_read,
+.phy_write= mv88e6131_phy_write,
+.poll_link= mv88e6xxx_poll_link,
+.get_strings= mv88e6131_get_strings,
+.get_ethtool_stats= mv88e6131_get_ethtool_stats,
+.get_sset_count= mv88e6131_get_sset_count,
+};
+
+MODULE_ALIAS("platform:mv88e6085");
+MODULE_ALIAS("platform:mv88e6095");
+MODULE_ALIAS("platform:mv88e6095f");
+MODULE_ALIAS("platform:mv88e6131");
diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c
new file mode 100644
index 0000000..5467c04
--- /dev/null
+++ b/drivers/net/dsa/mv88e6xxx.c
< at >< at > -0,0 +1,549 < at >< at >
+/*
+ * net/dsa/mv88e6xxx.c - Marvell 88e6xxx switch chip support
+ * Copyright (c) 2008 Marvell Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/list.h>
+#include <linux/netdevice.h>
+#include <linux/phy.h>
+#include <net/dsa.h>
+#include "mv88e6xxx.h"
+
+/*
+ * If the switch's ADDR[4:0] strap pins are strapped to zero, it will
+ * use all 32 SMI bus addresses on its SMI bus, and all switch registers
+ * will be directly accessible on some {device address,register address}
+ * pair.  If the ADDR[4:0] pins are not strapped to zero, the switch
+ * will only respond to SMI transactions to that specific address, and
+ * an indirect addressing mechanism needs to be used to access its
+ * registers.
+ */
+static int mv88e6xxx_reg_wait_ready(struct mii_bus *bus, int sw_addr)
+{
+int ret;
+int i;
+
+for (i = 0; i < 16; i++) {
+ret = mdiobus_read(bus, sw_addr, 0);
+if (ret < 0)
+return ret;
+
+if ((ret & 0x8000) == 0)
+return 0;
+}
+
+return -ETIMEDOUT;
+}
+
+int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
+{
+int ret;
+
+if (sw_addr == 0)
+return mdiobus_read(bus, addr, reg);
+
+/*
+ * Wait for the bus to become free.
+ */
+ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
+if (ret < 0)
+return ret;
+
+/*
+ * Transmit the read command.
+ */
+ret = mdiobus_write(bus, sw_addr, 0, 0x9800 | (addr << 5) | reg);
+if (ret < 0)
+return ret;
+
+/*
+ * Wait for the read command to complete.
+ */
+ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
+if (ret < 0)
+return ret;
+
+/*
+ * Read the data.
+ */
+ret = mdiobus_read(bus, sw_addr, 1);
+if (ret < 0)
+return ret;
+
+return ret & 0xffff;
+}
+
+int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+int ret;
+
+mutex_lock(&ps->smi_mutex);
+ret = __mv88e6xxx_reg_read(ds->master_mii_bus,
+   ds->pd->sw_addr, addr, reg);
+mutex_unlock(&ps->smi_mutex);
+
+return ret;
+}
+
+int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
+  int reg, u16 val)
+{
+int ret;
+
+if (sw_addr == 0)
+return mdiobus_write(bus, addr, reg, val);
+
+/*
+ * Wait for the bus to become free.
+ */
+ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
+if (ret < 0)
+return ret;
+
+/*
+ * Transmit the data to write.
+ */
+ret = mdiobus_write(bus, sw_addr, 1, val);
+if (ret < 0)
+return ret;
+
+/*
+ * Transmit the write command.
+ */
+ret = mdiobus_write(bus, sw_addr, 0, 0x9400 | (addr << 5) | reg);
+if (ret < 0)
+return ret;
+
+/*
+ * Wait for the write command to complete.
+ */
+ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
+if (ret < 0)
+return ret;
+
+return 0;
+}
+
+int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+int ret;
+
+mutex_lock(&ps->smi_mutex);
+ret = __mv88e6xxx_reg_write(ds->master_mii_bus,
+    ds->pd->sw_addr, addr, reg, val);
+mutex_unlock(&ps->smi_mutex);
+
+return ret;
+}
+
+int mv88e6xxx_config_prio(struct dsa_switch *ds)
+{
+/*
+ * Configure the IP ToS mapping registers.
+ */
+REG_WRITE(REG_GLOBAL, 0x10, 0x0000);
+REG_WRITE(REG_GLOBAL, 0x11, 0x0000);
+REG_WRITE(REG_GLOBAL, 0x12, 0x5555);
+REG_WRITE(REG_GLOBAL, 0x13, 0x5555);
+REG_WRITE(REG_GLOBAL, 0x14, 0xaaaa);
+REG_WRITE(REG_GLOBAL, 0x15, 0xaaaa);
+REG_WRITE(REG_GLOBAL, 0x16, 0xffff);
+REG_WRITE(REG_GLOBAL, 0x17, 0xffff);
+
+/*
+ * Configure the IEEE 802.1p priority mapping register.
+ */
+REG_WRITE(REG_GLOBAL, 0x18, 0xfa41);
+
+return 0;
+}
+
+int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr)
+{
+REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]);
+REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]);
+REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]);
+
+return 0;
+}
+
+int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)
+{
+int i;
+int ret;
+
+for (i = 0; i < 6; i++) {
+int j;
+
+/*
+ * Write the MAC address byte.
+ */
+REG_WRITE(REG_GLOBAL2, 0x0d, 0x8000 | (i << 8) | addr[i]);
+
+/*
+ * Wait for the write to complete.
+ */
+for (j = 0; j < 16; j++) {
+ret = REG_READ(REG_GLOBAL2, 0x0d);
+if ((ret & 0x8000) == 0)
+break;
+}
+if (j == 16)
+return -ETIMEDOUT;
+}
+
+return 0;
+}
+
+int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum)
+{
+if (addr >= 0)
+return mv88e6xxx_reg_read(ds, addr, regnum);
+return 0xffff;
+}
+
+int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val)
+{
+if (addr >= 0)
+return mv88e6xxx_reg_write(ds, addr, regnum, val);
+return 0;
+}
+
+#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
+static int mv88e6xxx_ppu_disable(struct dsa_switch *ds)
+{
+int ret;
+int i;
+
+ret = REG_READ(REG_GLOBAL, 0x04);
+REG_WRITE(REG_GLOBAL, 0x04, ret & ~0x4000);
+
+for (i = 0; i < 1000; i++) {
+        ret = REG_READ(REG_GLOBAL, 0x00);
+        msleep(1);
+        if ((ret & 0xc000) != 0xc000)
+                return 0;
+}
+
+return -ETIMEDOUT;
+}
+
+static int mv88e6xxx_ppu_enable(struct dsa_switch *ds)
+{
+int ret;
+int i;
+
+ret = REG_READ(REG_GLOBAL, 0x04);
+REG_WRITE(REG_GLOBAL, 0x04, ret | 0x4000);
+
+for (i = 0; i < 1000; i++) {
+        ret = REG_READ(REG_GLOBAL, 0x00);
+        msleep(1);
+        if ((ret & 0xc000) == 0xc000)
+                return 0;
+}
+
+return -ETIMEDOUT;
+}
+
+static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
+{
+struct mv88e6xxx_priv_state *ps;
+
+ps = container_of(ugly, struct mv88e6xxx_priv_state, ppu_work);
+if (mutex_trylock(&ps->ppu_mutex)) {
+        struct dsa_switch *ds = ((struct dsa_switch *)ps) - 1;
+
+        if (mv88e6xxx_ppu_enable(ds) == 0)
+                ps->ppu_disabled = 0;
+        mutex_unlock(&ps->ppu_mutex);
+}
+}
+
+static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)
+{
+struct mv88e6xxx_priv_state *ps = (void *)_ps;
+
+schedule_work(&ps->ppu_work);
+}
+
+static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+int ret;
+
+mutex_lock(&ps->ppu_mutex);
+
+/*
+ * If the PHY polling unit is enabled, disable it so that
+ * we can access the PHY registers.  If it was already
+ * disabled, cancel the timer that is going to re-enable
+ * it.
+ */
+if (!ps->ppu_disabled) {
+        ret = mv88e6xxx_ppu_disable(ds);
+        if (ret < 0) {
+                mutex_unlock(&ps->ppu_mutex);
+                return ret;
+        }
+        ps->ppu_disabled = 1;
+} else {
+        del_timer(&ps->ppu_timer);
+        ret = 0;
+}
+
+return ret;
+}
+
+static void mv88e6xxx_ppu_access_put(struct dsa_switch *ds)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+
+/*
+ * Schedule a timer to re-enable the PHY polling unit.
+ */
+mod_timer(&ps->ppu_timer, jiffies + msecs_to_jiffies(10));
+mutex_unlock(&ps->ppu_mutex);
+}
+
+void mv88e6xxx_ppu_state_init(struct dsa_switch *ds)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+
+mutex_init(&ps->ppu_mutex);
+INIT_WORK(&ps->ppu_work, mv88e6xxx_ppu_reenable_work);
+init_timer(&ps->ppu_timer);
+ps->ppu_timer.data = (unsigned long)ps;
+ps->ppu_timer.function = mv88e6xxx_ppu_reenable_timer;
+}
+
+int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum)
+{
+int ret;
+
+ret = mv88e6xxx_ppu_access_get(ds);
+if (ret >= 0) {
+        ret = mv88e6xxx_reg_read(ds, addr, regnum);
+        mv88e6xxx_ppu_access_put(ds);
+}
+
+return ret;
+}
+
+int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
+    int regnum, u16 val)
+{
+int ret;
+
+ret = mv88e6xxx_ppu_access_get(ds);
+if (ret >= 0) {
+        ret = mv88e6xxx_reg_write(ds, addr, regnum, val);
+        mv88e6xxx_ppu_access_put(ds);
+}
+
+return ret;
+}
+#endif
+
+void mv88e6xxx_poll_link(struct dsa_switch *ds)
+{
+int i;
+
+for (i = 0; i < DSA_MAX_PORTS; i++) {
+struct net_device *dev;
+int uninitialized_var(port_status);
+int link;
+int speed;
+int duplex;
+int fc;
+
+dev = ds->ports[i];
+if (dev == NULL)
+continue;
+
+link = 0;
+if (dev->flags & IFF_UP) {
+port_status = mv88e6xxx_reg_read(ds, REG_PORT(i), 0x00);
+if (port_status < 0)
+continue;
+
+link = !!(port_status & 0x0800);
+}
+
+if (!link) {
+if (netif_carrier_ok(dev)) {
+printk(KERN_INFO "%s: link down\n", dev->name);
+netif_carrier_off(dev);
+}
+continue;
+}
+
+switch (port_status & 0x0300) {
+case 0x0000:
+speed = 10;
+break;
+case 0x0100:
+speed = 100;
+break;
+case 0x0200:
+speed = 1000;
+break;
+default:
+speed = -1;
+break;
+}
+duplex = (port_status & 0x0400) ? 1 : 0;
+fc = (port_status & 0x8000) ? 1 : 0;
+
+if (!netif_carrier_ok(dev)) {
+printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, "
+ "flow control %sabled\n", dev->name,
+ speed, duplex ? "full" : "half",
+ fc ? "en" : "dis");
+netif_carrier_on(dev);
+}
+}
+}
+
+static int mv88e6xxx_stats_wait(struct dsa_switch *ds)
+{
+int ret;
+int i;
+
+for (i = 0; i < 10; i++) {
+ret = REG_READ(REG_GLOBAL, 0x1d);
+if ((ret & 0x8000) == 0)
+return 0;
+}
+
+return -ETIMEDOUT;
+}
+
+static int mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port)
+{
+int ret;
+
+/*
+ * Snapshot the hardware statistics counters for this port.
+ */
+REG_WRITE(REG_GLOBAL, 0x1d, 0xdc00 | port);
+
+/*
+ * Wait for the snapshotting to complete.
+ */
+ret = mv88e6xxx_stats_wait(ds);
+if (ret < 0)
+return ret;
+
+return 0;
+}
+
+static void mv88e6xxx_stats_read(struct dsa_switch *ds, int stat, u32 *val)
+{
+u32 _val;
+int ret;
+
+*val = 0;
+
+ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1d, 0xcc00 | stat);
+if (ret < 0)
+return;
+
+ret = mv88e6xxx_stats_wait(ds);
+if (ret < 0)
+return;
+
+ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, 0x1e);
+if (ret < 0)
+return;
+
+_val = ret << 16;
+
+ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, 0x1f);
+if (ret < 0)
+return;
+
+*val = _val | ret;
+}
+
+void mv88e6xxx_get_strings(struct dsa_switch *ds,
+   int nr_stats, struct mv88e6xxx_hw_stat *stats,
+   int port, uint8_t *data)
+{
+int i;
+
+for (i = 0; i < nr_stats; i++) {
+memcpy(data + i * ETH_GSTRING_LEN,
+       stats[i].string, ETH_GSTRING_LEN);
+}
+}
+
+void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
+ int nr_stats, struct mv88e6xxx_hw_stat *stats,
+ int port, uint64_t *data)
+{
+struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
+int ret;
+int i;
+
+mutex_lock(&ps->stats_mutex);
+
+ret = mv88e6xxx_stats_snapshot(ds, port);
+if (ret < 0) {
+mutex_unlock(&ps->stats_mutex);
+return;
+}
+
+/*
+ * Read each of the counters.
+ */
+for (i = 0; i < nr_stats; i++) {
+struct mv88e6xxx_hw_stat *s = stats + i;
+u32 low;
+u32 high;
+
+mv88e6xxx_stats_read(ds, s->reg, &low);
+if (s->sizeof_stat == 8)
+mv88e6xxx_stats_read(ds, s->reg + 1, &high);
+else
+high = 0;
+
+data[i] = (((u64)high) << 32) | low;
+}
+
+mutex_unlock(&ps->stats_mutex);
+}
+
+static int __init mv88e6xxx_init(void)
+{
+#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)
+register_switch_driver(&mv88e6131_switch_driver);
+#endif
+#if IS_ENABLED(CONFIG_NET_DSA_MV88E6123_61_65)
+register_switch_driver(&mv88e6123_61_65_switch_driver);
+#endif
+return 0;
+}
+module_init(mv88e6xxx_init);
+
+static void __exit mv88e6xxx_cleanup(void)
+{
+#if IS_ENABLED(CONFIG_NET_DSA_MV88E6123_61_65)
+unregister_switch_driver(&mv88e6123_61_65_switch_driver);
+#endif
+#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)
+unregister_switch_driver(&mv88e6131_switch_driver);
+#endif
+}
+module_exit(mv88e6xxx_cleanup);
+
+MODULE_AUTHOR("Lennert Buytenhek <buytenh< at >wantstofly.org>");
+MODULE_DESCRIPTION("Driver for Marvell 88E6XXX ethernet switch chips");
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/dsa/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx.h
new file mode 100644
index 0000000..fc2cd7b
--- /dev/null
+++ b/drivers/net/dsa/mv88e6xxx.h
< at >< at > -0,0 +1,98 < at >< at >
+/*
+ * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
+ * Copyright (c) 2008 Marvell Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __MV88E6XXX_H
+#define __MV88E6XXX_H
+
+#define REG_PORT(p)(0x10 + (p))
+#define REG_GLOBAL0x1b
+#define REG_GLOBAL20x1c
+
+struct mv88e6xxx_priv_state {
+/*
+ * When using multi-chip addressing, this mutex protects
+ * access to the indirect access registers.  (In single-chip
+ * mode, this mutex is effectively useless.)
+ */
+struct mutexsmi_mutex;
+
+#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
+/*
+ * Handles automatic disabling and re-enabling of the PHY
+ * polling unit.
+ */
+struct mutexppu_mutex;
+intppu_disabled;
+struct work_structppu_work;
+struct timer_listppu_timer;
+#endif
+
+/*
+ * This mutex serialises access to the statistics unit.
+ * Hold this mutex over snapshot + dump sequences.
+ */
+struct mutexstats_mutex;
+
+intid; /* switch product id */
+};
+
+struct mv88e6xxx_hw_stat {
+char string[ETH_GSTRING_LEN];
+int sizeof_stat;
+int reg;
+};
+
+int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
+int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
+int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
+                          int reg, u16 val);
+int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
+int mv88e6xxx_config_prio(struct dsa_switch *ds);
+int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
+int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
+int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
+int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
+void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
+int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
+int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
+    int regnum, u16 val);
+void mv88e6xxx_poll_link(struct dsa_switch *ds);
+void mv88e6xxx_get_strings(struct dsa_switch *ds,
+   int nr_stats, struct mv88e6xxx_hw_stat *stats,
+   int port, uint8_t *data);
+void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
+ int nr_stats, struct mv88e6xxx_hw_stat *stats,
+ int port, uint64_t *data);
+
+extern struct dsa_switch_driver mv88e6131_switch_driver;
+extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
+
+#define REG_READ(addr, reg)\
+({\
+int __ret;\
+\
+__ret = mv88e6xxx_reg_read(ds, addr, reg);\
+if (__ret < 0)\
+return __ret;\
+__ret;\
+})
+
+#define REG_WRITE(addr, reg, val)\
+({\
+int __ret;\
+\
+__ret = mv88e6xxx_reg_write(ds, addr, reg, val);\
+if (__ret < 0)\
+return __ret;\
+})
+
+
+
+#endif
diff --git a/net/dsa/Kconfig b/net/dsa/Kconfig
index 7e12303..274791c 100644
--- a/net/dsa/Kconfig
+++ b/net/dsa/Kconfig
< at >< at > -1,4 +1,4 < at >< at >
-menuconfig NET_DSA
+config NET_DSA
 tristate "Distributed Switch Architecture support"
 default n
 depends on EXPERIMENTAL && NETDEVICES && !S390
< at >< at > -23,38 +23,4 < at >< at > config NET_DSA_TAG_TRAILER
 bool
 default n
 
-
-# switch drivers
-config NET_DSA_MV88E6XXX
-tristate
-default n
-
-config NET_DSA_MV88E6060
-tristate "Marvell 88E6060 ethernet switch chip support"
-select NET_DSA_TAG_TRAILER
----help---
-  This enables support for the Marvell 88E6060 ethernet switch
-  chip.
-
-config NET_DSA_MV88E6XXX_NEED_PPU
-bool
-default n
-
-config NET_DSA_MV88E6131
-tristate "Marvell 88E6085/6095/6095F/6131 ethernet switch chip support"
-select NET_DSA_MV88E6XXX
-select NET_DSA_MV88E6XXX_NEED_PPU
-select NET_DSA_TAG_DSA
----help---
-  This enables support for the Marvell 88E6085/6095/6095F/6131
-  ethernet switch chips.
-
-config NET_DSA_MV88E6123_61_65
-tristate "Marvell 88E6123/6161/6165 ethernet switch chip support"
-select NET_DSA_MV88E6XXX
-select NET_DSA_TAG_EDSA
----help---
-  This enables support for the Marvell 88E6123/6161/6165
-  ethernet switch chips.
-
 endif
diff --git a/net/dsa/Makefile b/net/dsa/Makefile
index 191dd48..7b9fcbb 100644
--- a/net/dsa/Makefile
+++ b/net/dsa/Makefile
< at >< at > -6,14 +6,3 < at >< at > dsa_core-y += dsa.o slave.o
 dsa_core-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
 dsa_core-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
 dsa_core-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
-
-# switch drivers
-obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o
-obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx_drv.o
-mv88e6xxx_drv-y += mv88e6xxx.o
-ifdef CONFIG_NET_DSA_MV88E6123_61_65
-mv88e6xxx_drv-y += mv88e6123_61_65.o
-endif
-ifdef CONFIG_NET_DSA_MV88E6131
-mv88e6xxx_drv-y += mv88e6131.o
-endif
diff --git a/net/dsa/mv88e6060.c b/net/dsa/mv88e6060.c
deleted file mode 100644
index 7fc4e81..0000000
--- a/net/dsa/mv88e6060.c
+++ /dev/null
< at >< at > -1,293 +0,0 < at >< at >
-/*
- * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
- * Copyright (c) 2008-2009 Marvell Semiconductor
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/list.h>
-#include <linux/netdevice.h>
-#include <linux/phy.h>
-#include <net/dsa.h>
-
-#define REG_PORT(p)(8 + (p))
-#define REG_GLOBAL0x0f
-
-static int reg_read(struct dsa_switch *ds, int addr, int reg)
-{
-return mdiobus_read(ds->master_mii_bus, ds->pd->sw_addr + addr, reg);
-}
-
-#define REG_READ(addr, reg)\
-({\
-int __ret;\
-\
-__ret = reg_read(ds, addr, reg);\
-if (__ret < 0)\
-return __ret;\
-__ret;\
-})
-
-
-static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
-{
-return mdiobus_write(ds->master_mii_bus, ds->pd->sw_addr + addr,
-     reg, val);
-}
-
-#define REG_WRITE(addr, reg, val)\
-({\
-int __ret;\
-\
-__ret = reg_write(ds, addr, reg, val);\
-if (__ret < 0)\
-return __ret;\
-})
-
-static char *mv88e6060_probe(struct mii_bus *bus, int sw_addr)
-{
-int ret;
-
-ret = mdiobus_read(bus, sw_addr + REG_PORT(0), 0x03);
-if (ret >= 0) {
-ret &= 0xfff0;
-if (ret == 0x0600)
-return "Marvell 88E6060";
-}
-
-return NULL;
-}
-
-static int mv88e6060_switch_reset(struct dsa_switch *ds)
-{
-int i;
-int ret;
-
-/*
- * Set all ports to the disabled state.
- */
-for (i = 0; i < 6; i++) {
-ret = REG_READ(REG_PORT(i), 0x04);
-REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
-}
-
-/*
- * Wait for transmit queues to drain.
- */
-msleep(2);
-
-/*
- * Reset the switch.
- */
-REG_WRITE(REG_GLOBAL, 0x0a, 0xa130);
-
-/*
- * Wait up to one second for reset to complete.
- */
-for (i = 0; i < 1000; i++) {
-ret = REG_READ(REG_GLOBAL, 0x00);
-if ((ret & 0x8000) == 0x0000)
-break;
-
-msleep(1);
-}
-if (i == 1000)
-return -ETIMEDOUT;
-
-return 0;
-}
-
-static int mv88e6060_setup_global(struct dsa_switch *ds)
-{
-/*
- * Disable discarding of frames with excessive collisions,
- * set the maximum frame size to 1536 bytes, and mask all
- * interrupt sources.
- */
-REG_WRITE(REG_GLOBAL, 0x04, 0x0800);
-
-/*
- * Enable automatic address learning, set the address
- * database size to 1024 entries, and set the default aging
- * time to 5 minutes.
- */
-REG_WRITE(REG_GLOBAL, 0x0a, 0x2130);
-
-return 0;
-}
-
-static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
-{
-int addr = REG_PORT(p);
-
-/*
- * Do not force flow control, disable Ingress and Egress
- * Header tagging, disable VLAN tunneling, and set the port
- * state to Forwarding.  Additionally, if this is the CPU
- * port, enable Ingress and Egress Trailer tagging mode.
- */
-REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ?  0x4103 : 0x0003);
-
-/*
- * Port based VLAN map: give each port its own address
- * database, allow the CPU port to talk to each of the 'real'
- * ports, and allow each of the 'real' ports to only talk to
- * the CPU port.
- */
-REG_WRITE(addr, 0x06,
-((p & 0xf) << 12) |
- (dsa_is_cpu_port(ds, p) ?
-ds->phys_port_mask :
-(1 << ds->dst->cpu_port)));
-
-/*
- * Port Association Vector: when learning source addresses
- * of packets, add the address to the address database using
- * a port bitmap that has only the bit for this port set and
- * the other bits clear.
- */
-REG_WRITE(addr, 0x0b, 1 << p);
-
-return 0;
-}
-
-static int mv88e6060_setup(struct dsa_switch *ds)
-{
-int i;
-int ret;
-
-ret = mv88e6060_switch_reset(ds);
-if (ret < 0)
-return ret;
-
-/* < at >< at >< at > initialise atu */
-
-ret = mv88e6060_setup_global(ds);
-if (ret < 0)
-return ret;
-
-for (i = 0; i < 6; i++) {
-ret = mv88e6060_setup_port(ds, i);
-if (ret < 0)
-return ret;
-}
-
-return 0;
-}
-
-static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr)
-{
-REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]);
-REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]);
-REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]);
-
-return 0;
-}
-
-static int mv88e6060_port_to_phy_addr(int port)
-{
-if (port >= 0 && port <= 5)
-return port;
-return -1;
-}
-
-static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
-{
-int addr;
-
-addr = mv88e6060_port_to_phy_addr(port);
-if (addr == -1)
-return 0xffff;
-
-return reg_read(ds, addr, regnum);
-}
-
-static int
-mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
-{
-int addr;
-
-addr = mv88e6060_port_to_phy_addr(port);
-if (addr == -1)
-return 0xffff;
-
-return reg_write(ds, addr, regnum, val);
-}
-
-static void mv88e6060_poll_link(struct dsa_switch *ds)
-{
-int i;
-
-for (i = 0; i < DSA_MAX_PORTS; i++) {
-struct net_device *dev;
-int uninitialized_var(port_status);
-int link;
-int speed;
-int duplex;
-int fc;
-
-dev = ds->ports[i];
-if (dev == NULL)
-continue;
-
-link = 0;
-if (dev->flags & IFF_UP) {
-port_status = reg_read(ds, REG_PORT(i), 0x00);
-if (port_status < 0)
-continue;
-
-link = !!(port_status & 0x1000);
-}
-
-if (!link) {
-if (netif_carrier_ok(dev)) {
-printk(KERN_INFO "%s: link down\n", dev->name);
-netif_carrier_off(dev);
-}
-continue;
-}
-
-speed = (port_status & 0x0100) ? 100 : 10;
-duplex = (port_status & 0x0200) ? 1 : 0;
-fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0;
-
-if (!netif_carrier_ok(dev)) {
-printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, "
- "flow control %sabled\n", dev->name,
- speed, duplex ? "full" : "half",
- fc ? "en" : "dis");
-netif_carrier_on(dev);
-}
-}
-}
-
-static struct dsa_switch_driver mv88e6060_switch_driver = {
-.tag_protocol= htons(ETH_P_TRAILER),
-.probe= mv88e6060_probe,
-.setup= mv88e6060_setup,
-.set_addr= mv88e6060_set_addr,
-.phy_read= mv88e6060_phy_read,
-.phy_write= mv88e6060_phy_write,
-.poll_link= mv88e6060_poll_link,
-};
-
-static int __init mv88e6060_init(void)
-{
-register_switch_driver(&mv88e6060_switch_driver);
-return 0;
-}
-module_init(mv88e6060_init);
-
-static void __exit mv88e6060_cleanup(void)
-{
-unregister_switch_driver(&mv88e6060_switch_driver);
-}
-module_exit(mv88e6060_cleanup);
-
-MODULE_AUTHOR("Lennert Buytenhek <buytenh< at >wantstofly.org>");
-MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:mv88e6060");
diff --git a/net/dsa/mv88e6123_61_65.c b/net/dsa/mv88e6123_61_65.c
deleted file mode 100644
index c0a458f..0000000
--- a/net/dsa/mv88e6123_61_65.c
+++ /dev/null
< at >< at > -1,438 +0,0 < at >< at >
-/*
- * net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support
- * Copyright (c) 2008-2009 Marvell Semiconductor
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/list.h>
-#include <linux/netdevice.h>
-#include <linux/phy.h>
-#include <net/dsa.h>
-#include "mv88e6xxx.h"
-
-static char *mv88e6123_61_65_probe(struct mii_bus *bus, int sw_addr)
-{
-int ret;
-
-ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), 0x03);
-if (ret >= 0) {
-ret &= 0xfff0;
-if (ret == 0x1210)
-return "Marvell 88E6123";
-if (ret == 0x1610)
-return "Marvell 88E6161";
-if (ret == 0x1650)
-return "Marvell 88E6165";
-}
-
-return NULL;
-}
-
-static int mv88e6123_61_65_switch_reset(struct dsa_switch *ds)
-{
-int i;
-int ret;
-
-/*
- * Set all ports to the disabled state.
- */
-for (i = 0; i < 8; i++) {
-ret = REG_READ(REG_PORT(i), 0x04);
-REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
-}
-
-/*
- * Wait for transmit queues to drain.
- */
-msleep(2);
-
-/*
- * Reset the switch.
- */
-REG_WRITE(REG_GLOBAL, 0x04, 0xc400);
-
-/*
- * Wait up to one second for reset to complete.
- */
-for (i = 0; i < 1000; i++) {
-ret = REG_READ(REG_GLOBAL, 0x00);
-if ((ret & 0xc800) == 0xc800)
-break;
-
-msleep(1);
-}
-if (i == 1000)
-return -ETIMEDOUT;
-
-return 0;
-}
-
-static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
-{
-int ret;
-int i;
-
-/*
- * Disable the PHY polling unit (since there won't be any
- * external PHYs to poll), don't discard packets with
- * excessive collisions, and mask all interrupt sources.
- */
-REG_WRITE(REG_GLOBAL, 0x04, 0x0000);
-
-/*
- * Set the default address aging time to 5 minutes, and
- * enable address learn messages to be sent to all message
- * ports.
- */
-REG_WRITE(REG_GLOBAL, 0x0a, 0x0148);
-
-/*
- * Configure the priority mapping registers.
- */
-ret = mv88e6xxx_config_prio(ds);
-if (ret < 0)
-return ret;
-
-/*
- * Configure the upstream port, and configure the upstream
- * port as the port to which ingress and egress monitor frames
- * are to be sent.
- */
-REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110));
-
-/*
- * Disable remote management for now, and set the switch's
- * DSA device number.
- */
-REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
-
-/*
- * Send all frames with destination addresses matching
- * 01:80:c2:00:00:2x to the CPU port.
- */
-REG_WRITE(REG_GLOBAL2, 0x02, 0xffff);
-
-/*
- * Send all frames with destination addresses matching
- * 01:80:c2:00:00:0x to the CPU port.
- */
-REG_WRITE(REG_GLOBAL2, 0x03, 0xffff);
-
-/*
- * Disable the loopback filter, disable flow control
- * messages, disable flood broadcast override, disable
- * removing of provider tags, disable ATU age violation
- * interrupts, disable tag flow control, force flow
- * control priority to the highest, and send all special
- * multicast frames to the CPU at the highest priority.
- */
-REG_WRITE(REG_GLOBAL2, 0x05, 0x00ff);
-
-/*
- * Program the DSA routing table.
- */
-for (i = 0; i < 32; i++) {
-int nexthop;
-
-nexthop = 0x1f;
-if (i != ds->index && i < ds->dst->pd->nr_chips)
-nexthop = ds->pd->rtable[i] & 0x1f;
-
-REG_WRITE(REG_GLOBAL2, 0x06, 0x8000 | (i << 8) | nexthop);
-}
-
-/*
- * Clear all trunk masks.
- */
-for (i = 0; i < 8; i++)
-REG_WRITE(REG_GLOBAL2, 0x07, 0x8000 | (i << 12) | 0xff);
-
-/*
- * Clear all trunk mappings.
- */
-for (i = 0; i < 16; i++)
-REG_WRITE(REG_GLOBAL2, 0x08, 0x8000 | (i << 11));
-
-/*
- * Disable ingress rate limiting by resetting all ingress
- * rate limit registers to their initial state.
- */
-for (i = 0; i < 6; i++)
-REG_WRITE(REG_GLOBAL2, 0x09, 0x9000 | (i << 8));
-
-/*
- * Initialise cross-chip port VLAN table to reset defaults.
- */
-REG_WRITE(REG_GLOBAL2, 0x0b, 0x9000);
-
-/*
- * Clear the priority override table.
- */
-for (i = 0; i < 16; i++)
-REG_WRITE(REG_GLOBAL2, 0x0f, 0x8000 | (i << 8));
-
-/* < at >< at >< at > initialise AVB (22/23) watchdog (27) sdet (29) registers */
-
-return 0;
-}
-
-static int mv88e6123_61_65_setup_port(struct dsa_switch *ds, int p)
-{
-int addr = REG_PORT(p);
-u16 val;
-
-/*
- * MAC Forcing register: don't force link, speed, duplex
- * or flow control state to any particular values on physical
- * ports, but force the CPU port and all DSA ports to 1000 Mb/s
- * full duplex.
- */
-if (dsa_is_cpu_port(ds, p) || ds->dsa_port_mask & (1 << p))
-REG_WRITE(addr, 0x01, 0x003e);
-else
-REG_WRITE(addr, 0x01, 0x0003);
-
-/*
- * Do not limit the period of time that this port can be
- * paused for by the remote end or the period of time that
- * this port can pause the remote end.
- */
-REG_WRITE(addr, 0x02, 0x0000);
-
-/*
- * Port Control: disable Drop-on-Unlock, disable Drop-on-Lock,
- * disable Header mode, enable IGMP/MLD snooping, disable VLAN
- * tunneling, determine priority by looking at 802.1p and IP
- * priority fields (IP prio has precedence), and set STP state
- * to Forwarding.
- *
- * If this is the CPU link, use DSA or EDSA tagging depending
- * on which tagging mode was configured.
- *
- * If this is a link to another switch, use DSA tagging mode.
- *
- * If this is the upstream port for this switch, enable
- * forwarding of unknown unicasts and multicasts.
- */
-val = 0x0433;
-if (dsa_is_cpu_port(ds, p)) {
-if (ds->dst->tag_protocol == htons(ETH_P_EDSA))
-val |= 0x3300;
-else
-val |= 0x0100;
-}
-if (ds->dsa_port_mask & (1 << p))
-val |= 0x0100;
-if (p == dsa_upstream_port(ds))
-val |= 0x000c;
-REG_WRITE(addr, 0x04, val);
-
-/*
- * Port Control 1: disable trunking.  Also, if this is the
- * CPU port, enable learn messages to be sent to this port.
- */
-REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);
-
-/*
- * Port based VLAN map: give each port its own address
- * database, allow the CPU port to talk to each of the 'real'
- * ports, and allow each of the 'real' ports to only talk to
- * the upstream port.
- */
-val = (p & 0xf) << 12;
-if (dsa_is_cpu_port(ds, p))
-val |= ds->phys_port_mask;
-else
-val |= 1 << dsa_upstream_port(ds);
-REG_WRITE(addr, 0x06, val);
-
-/*
- * Default VLAN ID and priority: don't set a default VLAN
- * ID, and set the default packet priority to zero.
- */
-REG_WRITE(addr, 0x07, 0x0000);
-
-/*
- * Port Control 2: don't force a good FCS, set the maximum
- * frame size to 10240 bytes, don't let the switch add or
- * strip 802.1q tags, don't discard tagged or untagged frames
- * on this port, do a destination address lookup on all
- * received packets as usual, disable ARP mirroring and don't
- * send a copy of all transmitted/received frames on this port
- * to the CPU.
- */
-REG_WRITE(addr, 0x08, 0x2080);
-
-/*
- * Egress rate control: disable egress rate control.
- */
-REG_WRITE(addr, 0x09, 0x0001);
-
-/*
- * Egress rate control 2: disable egress rate control.
- */
-REG_WRITE(addr, 0x0a, 0x0000);
-
-/*
- * Port Association Vector: when learning source addresses
- * of packets, add the address to the address database using
- * a port bitmap that has only the bit for this port set and
- * the other bits clear.
- */
-REG_WRITE(addr, 0x0b, 1 << p);
-
-/*
- * Port ATU control: disable limiting the number of address
- * database entries that this port is allowed to use.
- */
-REG_WRITE(addr, 0x0c, 0x0000);
-
-/*
- * Priorit Override: disable DA, SA and VTU priority override.
- */
-REG_WRITE(addr, 0x0d, 0x0000);
-
-/*
- * Port Ethertype: use the Ethertype DSA Ethertype value.
- */
-REG_WRITE(addr, 0x0f, ETH_P_EDSA);
-
-/*
- * Tag Remap: use an identity 802.1p prio -> switch prio
- * mapping.
- */
-REG_WRITE(addr, 0x18, 0x3210);
-
-/*
- * Tag Remap 2: use an identity 802.1p prio -> switch prio
- * mapping.
- */
-REG_WRITE(addr, 0x19, 0x7654);
-
-return 0;
-}
-
-static int mv88e6123_61_65_setup(struct dsa_switch *ds)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-int i;
-int ret;
-
-mutex_init(&ps->smi_mutex);
-mutex_init(&ps->stats_mutex);
-
-ret = mv88e6123_61_65_switch_reset(ds);
-if (ret < 0)
-return ret;
-
-/* < at >< at >< at > initialise vtu and atu */
-
-ret = mv88e6123_61_65_setup_global(ds);
-if (ret < 0)
-return ret;
-
-for (i = 0; i < 6; i++) {
-ret = mv88e6123_61_65_setup_port(ds, i);
-if (ret < 0)
-return ret;
-}
-
-return 0;
-}
-
-static int mv88e6123_61_65_port_to_phy_addr(int port)
-{
-if (port >= 0 && port <= 4)
-return port;
-return -1;
-}
-
-static int
-mv88e6123_61_65_phy_read(struct dsa_switch *ds, int port, int regnum)
-{
-int addr = mv88e6123_61_65_port_to_phy_addr(port);
-return mv88e6xxx_phy_read(ds, addr, regnum);
-}
-
-static int
-mv88e6123_61_65_phy_write(struct dsa_switch *ds,
-      int port, int regnum, u16 val)
-{
-int addr = mv88e6123_61_65_port_to_phy_addr(port);
-return mv88e6xxx_phy_write(ds, addr, regnum, val);
-}
-
-static struct mv88e6xxx_hw_stat mv88e6123_61_65_hw_stats[] = {
-{ "in_good_octets", 8, 0x00, },
-{ "in_bad_octets", 4, 0x02, },
-{ "in_unicast", 4, 0x04, },
-{ "in_broadcasts", 4, 0x06, },
-{ "in_multicasts", 4, 0x07, },
-{ "in_pause", 4, 0x16, },
-{ "in_undersize", 4, 0x18, },
-{ "in_fragments", 4, 0x19, },
-{ "in_oversize", 4, 0x1a, },
-{ "in_jabber", 4, 0x1b, },
-{ "in_rx_error", 4, 0x1c, },
-{ "in_fcs_error", 4, 0x1d, },
-{ "out_octets", 8, 0x0e, },
-{ "out_unicast", 4, 0x10, },
-{ "out_broadcasts", 4, 0x13, },
-{ "out_multicasts", 4, 0x12, },
-{ "out_pause", 4, 0x15, },
-{ "excessive", 4, 0x11, },
-{ "collisions", 4, 0x1e, },
-{ "deferred", 4, 0x05, },
-{ "single", 4, 0x14, },
-{ "multiple", 4, 0x17, },
-{ "out_fcs_error", 4, 0x03, },
-{ "late", 4, 0x1f, },
-{ "hist_64bytes", 4, 0x08, },
-{ "hist_65_127bytes", 4, 0x09, },
-{ "hist_128_255bytes", 4, 0x0a, },
-{ "hist_256_511bytes", 4, 0x0b, },
-{ "hist_512_1023bytes", 4, 0x0c, },
-{ "hist_1024_max_bytes", 4, 0x0d, },
-};
-
-static void
-mv88e6123_61_65_get_strings(struct dsa_switch *ds, int port, uint8_t *data)
-{
-mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6123_61_65_hw_stats),
-      mv88e6123_61_65_hw_stats, port, data);
-}
-
-static void
-mv88e6123_61_65_get_ethtool_stats(struct dsa_switch *ds,
-  int port, uint64_t *data)
-{
-mv88e6xxx_get_ethtool_stats(ds, ARRAY_SIZE(mv88e6123_61_65_hw_stats),
-    mv88e6123_61_65_hw_stats, port, data);
-}
-
-static int mv88e6123_61_65_get_sset_count(struct dsa_switch *ds)
-{
-return ARRAY_SIZE(mv88e6123_61_65_hw_stats);
-}
-
-struct dsa_switch_driver mv88e6123_61_65_switch_driver = {
-.tag_protocol= cpu_to_be16(ETH_P_EDSA),
-.priv_size= sizeof(struct mv88e6xxx_priv_state),
-.probe= mv88e6123_61_65_probe,
-.setup= mv88e6123_61_65_setup,
-.set_addr= mv88e6xxx_set_addr_indirect,
-.phy_read= mv88e6123_61_65_phy_read,
-.phy_write= mv88e6123_61_65_phy_write,
-.poll_link= mv88e6xxx_poll_link,
-.get_strings= mv88e6123_61_65_get_strings,
-.get_ethtool_stats= mv88e6123_61_65_get_ethtool_stats,
-.get_sset_count= mv88e6123_61_65_get_sset_count,
-};
-
-MODULE_ALIAS("platform:mv88e6123");
-MODULE_ALIAS("platform:mv88e6161");
-MODULE_ALIAS("platform:mv88e6165");
diff --git a/net/dsa/mv88e6131.c b/net/dsa/mv88e6131.c
deleted file mode 100644
index e0eb6824..0000000
--- a/net/dsa/mv88e6131.c
+++ /dev/null
< at >< at > -1,435 +0,0 < at >< at >
-/*
- * net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support
- * Copyright (c) 2008-2009 Marvell Semiconductor
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/list.h>
-#include <linux/netdevice.h>
-#include <linux/phy.h>
-#include <net/dsa.h>
-#include "mv88e6xxx.h"
-
-/*
- * Switch product IDs
- */
-#define ID_60850x04a0
-#define ID_60950x0950
-#define ID_61310x1060
-
-static char *mv88e6131_probe(struct mii_bus *bus, int sw_addr)
-{
-int ret;
-
-ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), 0x03);
-if (ret >= 0) {
-ret &= 0xfff0;
-if (ret == ID_6085)
-return "Marvell 88E6085";
-if (ret == ID_6095)
-return "Marvell 88E6095/88E6095F";
-if (ret == ID_6131)
-return "Marvell 88E6131";
-}
-
-return NULL;
-}
-
-static int mv88e6131_switch_reset(struct dsa_switch *ds)
-{
-int i;
-int ret;
-
-/*
- * Set all ports to the disabled state.
- */
-for (i = 0; i < 11; i++) {
-ret = REG_READ(REG_PORT(i), 0x04);
-REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
-}
-
-/*
- * Wait for transmit queues to drain.
- */
-msleep(2);
-
-/*
- * Reset the switch.
- */
-REG_WRITE(REG_GLOBAL, 0x04, 0xc400);
-
-/*
- * Wait up to one second for reset to complete.
- */
-for (i = 0; i < 1000; i++) {
-ret = REG_READ(REG_GLOBAL, 0x00);
-if ((ret & 0xc800) == 0xc800)
-break;
-
-msleep(1);
-}
-if (i == 1000)
-return -ETIMEDOUT;
-
-return 0;
-}
-
-static int mv88e6131_setup_global(struct dsa_switch *ds)
-{
-int ret;
-int i;
-
-/*
- * Enable the PHY polling unit, don't discard packets with
- * excessive collisions, use a weighted fair queueing scheme
- * to arbitrate between packet queues, set the maximum frame
- * size to 1632, and mask all interrupt sources.
- */
-REG_WRITE(REG_GLOBAL, 0x04, 0x4400);
-
-/*
- * Set the default address aging time to 5 minutes, and
- * enable address learn messages to be sent to all message
- * ports.
- */
-REG_WRITE(REG_GLOBAL, 0x0a, 0x0148);
-
-/*
- * Configure the priority mapping registers.
- */
-ret = mv88e6xxx_config_prio(ds);
-if (ret < 0)
-return ret;
-
-/*
- * Set the VLAN ethertype to 0x8100.
- */
-REG_WRITE(REG_GLOBAL, 0x19, 0x8100);
-
-/*
- * Disable ARP mirroring, and configure the upstream port as
- * the port to which ingress and egress monitor frames are to
- * be sent.
- */
-REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1100) | 0x00f0);
-
-/*
- * Disable cascade port functionality unless this device
- * is used in a cascade configuration, and set the switch's
- * DSA device number.
- */
-if (ds->dst->pd->nr_chips > 1)
-REG_WRITE(REG_GLOBAL, 0x1c, 0xf000 | (ds->index & 0x1f));
-else
-REG_WRITE(REG_GLOBAL, 0x1c, 0xe000 | (ds->index & 0x1f));
-
-/*
- * Send all frames with destination addresses matching
- * 01:80:c2:00:00:0x to the CPU port.
- */
-REG_WRITE(REG_GLOBAL2, 0x03, 0xffff);
-
-/*
- * Ignore removed tag data on doubly tagged packets, disable
- * flow control messages, force flow control priority to the
- * highest, and send all special multicast frames to the CPU
- * port at the highest priority.
- */
-REG_WRITE(REG_GLOBAL2, 0x05, 0x00ff);
-
-/*
- * Program the DSA routing table.
- */
-for (i = 0; i < 32; i++) {
-int nexthop;
-
-nexthop = 0x1f;
-if (i != ds->index && i < ds->dst->pd->nr_chips)
-nexthop = ds->pd->rtable[i] & 0x1f;
-
-REG_WRITE(REG_GLOBAL2, 0x06, 0x8000 | (i << 8) | nexthop);
-}
-
-/*
- * Clear all trunk masks.
- */
-for (i = 0; i < 8; i++)
-REG_WRITE(REG_GLOBAL2, 0x07, 0x8000 | (i << 12) | 0x7ff);
-
-/*
- * Clear all trunk mappings.
- */
-for (i = 0; i < 16; i++)
-REG_WRITE(REG_GLOBAL2, 0x08, 0x8000 | (i << 11));
-
-/*
- * Force the priority of IGMP/MLD snoop frames and ARP frames
- * to the highest setting.
- */
-REG_WRITE(REG_GLOBAL2, 0x0f, 0x00ff);
-
-return 0;
-}
-
-static int mv88e6131_setup_port(struct dsa_switch *ds, int p)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-int addr = REG_PORT(p);
-u16 val;
-
-/*
- * MAC Forcing register: don't force link, speed, duplex
- * or flow control state to any particular values on physical
- * ports, but force the CPU port and all DSA ports to 1000 Mb/s
- * (100 Mb/s on 6085) full duplex.
- */
-if (dsa_is_cpu_port(ds, p) || ds->dsa_port_mask & (1 << p))
-if (ps->id == ID_6085)
-REG_WRITE(addr, 0x01, 0x003d); /* 100 Mb/s */
-else
-REG_WRITE(addr, 0x01, 0x003e); /* 1000 Mb/s */
-else
-REG_WRITE(addr, 0x01, 0x0003);
-
-/*
- * Port Control: disable Core Tag, disable Drop-on-Lock,
- * transmit frames unmodified, disable Header mode,
- * enable IGMP/MLD snoop, disable DoubleTag, disable VLAN
- * tunneling, determine priority by looking at 802.1p and
- * IP priority fields (IP prio has precedence), and set STP
- * state to Forwarding.
- *
- * If this is the upstream port for this switch, enable
- * forwarding of unknown unicasts, and enable DSA tagging
- * mode.
- *
- * If this is the link to another switch, use DSA tagging
- * mode, but do not enable forwarding of unknown unicasts.
- */
-val = 0x0433;
-if (p == dsa_upstream_port(ds)) {
-val |= 0x0104;
-/*
- * On 6085, unknown multicast forward is controlled
- * here rather than in Port Control 2 register.
- */
-if (ps->id == ID_6085)
-val |= 0x0008;
-}
-if (ds->dsa_port_mask & (1 << p))
-val |= 0x0100;
-REG_WRITE(addr, 0x04, val);
-
-/*
- * Port Control 1: disable trunking.  Also, if this is the
- * CPU port, enable learn messages to be sent to this port.
- */
-REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);
-
-/*
- * Port based VLAN map: give each port its own address
- * database, allow the CPU port to talk to each of the 'real'
- * ports, and allow each of the 'real' ports to only talk to
- * the upstream port.
- */
-val = (p & 0xf) << 12;
-if (dsa_is_cpu_port(ds, p))
-val |= ds->phys_port_mask;
-else
-val |= 1 << dsa_upstream_port(ds);
-REG_WRITE(addr, 0x06, val);
-
-/*
- * Default VLAN ID and priority: don't set a default VLAN
- * ID, and set the default packet priority to zero.
- */
-REG_WRITE(addr, 0x07, 0x0000);
-
-/*
- * Port Control 2: don't force a good FCS, don't use
- * VLAN-based, source address-based or destination
- * address-based priority overrides, don't let the switch
- * add or strip 802.1q tags, don't discard tagged or
- * untagged frames on this port, do a destination address
- * lookup on received packets as usual, don't send a copy
- * of all transmitted/received frames on this port to the
- * CPU, and configure the upstream port number.
- *
- * If this is the upstream port for this switch, enable
- * forwarding of unknown multicast addresses.
- */
-if (ps->id == ID_6085)
-/*
- * on 6085, bits 3:0 are reserved, bit 6 control ARP
- * mirroring, and multicast forward is handled in
- * Port Control register.
- */
-REG_WRITE(addr, 0x08, 0x0080);
-else {
-val = 0x0080 | dsa_upstream_port(ds);
-if (p == dsa_upstream_port(ds))
-val |= 0x0040;
-REG_WRITE(addr, 0x08, val);
-}
-
-/*
- * Rate Control: disable ingress rate limiting.
- */
-REG_WRITE(addr, 0x09, 0x0000);
-
-/*
- * Rate Control 2: disable egress rate limiting.
- */
-REG_WRITE(addr, 0x0a, 0x0000);
-
-/*
- * Port Association Vector: when learning source addresses
- * of packets, add the address to the address database using
- * a port bitmap that has only the bit for this port set and
- * the other bits clear.
- */
-REG_WRITE(addr, 0x0b, 1 << p);
-
-/*
- * Tag Remap: use an identity 802.1p prio -> switch prio
- * mapping.
- */
-REG_WRITE(addr, 0x18, 0x3210);
-
-/*
- * Tag Remap 2: use an identity 802.1p prio -> switch prio
- * mapping.
- */
-REG_WRITE(addr, 0x19, 0x7654);
-
-return 0;
-}
-
-static int mv88e6131_setup(struct dsa_switch *ds)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-int i;
-int ret;
-
-mutex_init(&ps->smi_mutex);
-mv88e6xxx_ppu_state_init(ds);
-mutex_init(&ps->stats_mutex);
-
-ps->id = REG_READ(REG_PORT(0), 0x03) & 0xfff0;
-
-ret = mv88e6131_switch_reset(ds);
-if (ret < 0)
-return ret;
-
-/* < at >< at >< at > initialise vtu and atu */
-
-ret = mv88e6131_setup_global(ds);
-if (ret < 0)
-return ret;
-
-for (i = 0; i < 11; i++) {
-ret = mv88e6131_setup_port(ds, i);
-if (ret < 0)
-return ret;
-}
-
-return 0;
-}
-
-static int mv88e6131_port_to_phy_addr(int port)
-{
-if (port >= 0 && port <= 11)
-return port;
-return -1;
-}
-
-static int
-mv88e6131_phy_read(struct dsa_switch *ds, int port, int regnum)
-{
-int addr = mv88e6131_port_to_phy_addr(port);
-return mv88e6xxx_phy_read_ppu(ds, addr, regnum);
-}
-
-static int
-mv88e6131_phy_write(struct dsa_switch *ds,
-      int port, int regnum, u16 val)
-{
-int addr = mv88e6131_port_to_phy_addr(port);
-return mv88e6xxx_phy_write_ppu(ds, addr, regnum, val);
-}
-
-static struct mv88e6xxx_hw_stat mv88e6131_hw_stats[] = {
-{ "in_good_octets", 8, 0x00, },
-{ "in_bad_octets", 4, 0x02, },
-{ "in_unicast", 4, 0x04, },
-{ "in_broadcasts", 4, 0x06, },
-{ "in_multicasts", 4, 0x07, },
-{ "in_pause", 4, 0x16, },
-{ "in_undersize", 4, 0x18, },
-{ "in_fragments", 4, 0x19, },
-{ "in_oversize", 4, 0x1a, },
-{ "in_jabber", 4, 0x1b, },
-{ "in_rx_error", 4, 0x1c, },
-{ "in_fcs_error", 4, 0x1d, },
-{ "out_octets", 8, 0x0e, },
-{ "out_unicast", 4, 0x10, },
-{ "out_broadcasts", 4, 0x13, },
-{ "out_multicasts", 4, 0x12, },
-{ "out_pause", 4, 0x15, },
-{ "excessive", 4, 0x11, },
-{ "collisions", 4, 0x1e, },
-{ "deferred", 4, 0x05, },
-{ "single", 4, 0x14, },
-{ "multiple", 4, 0x17, },
-{ "out_fcs_error", 4, 0x03, },
-{ "late", 4, 0x1f, },
-{ "hist_64bytes", 4, 0x08, },
-{ "hist_65_127bytes", 4, 0x09, },
-{ "hist_128_255bytes", 4, 0x0a, },
-{ "hist_256_511bytes", 4, 0x0b, },
-{ "hist_512_1023bytes", 4, 0x0c, },
-{ "hist_1024_max_bytes", 4, 0x0d, },
-};
-
-static void
-mv88e6131_get_strings(struct dsa_switch *ds, int port, uint8_t *data)
-{
-mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6131_hw_stats),
-      mv88e6131_hw_stats, port, data);
-}
-
-static void
-mv88e6131_get_ethtool_stats(struct dsa_switch *ds,
-  int port, uint64_t *data)
-{
-mv88e6xxx_get_ethtool_stats(ds, ARRAY_SIZE(mv88e6131_hw_stats),
-    mv88e6131_hw_stats, port, data);
-}
-
-static int mv88e6131_get_sset_count(struct dsa_switch *ds)
-{
-return ARRAY_SIZE(mv88e6131_hw_stats);
-}
-
-struct dsa_switch_driver mv88e6131_switch_driver = {
-.tag_protocol= cpu_to_be16(ETH_P_DSA),
-.priv_size= sizeof(struct mv88e6xxx_priv_state),
-.probe= mv88e6131_probe,
-.setup= mv88e6131_setup,
-.set_addr= mv88e6xxx_set_addr_direct,
-.phy_read= mv88e6131_phy_read,
-.phy_write= mv88e6131_phy_write,
-.poll_link= mv88e6xxx_poll_link,
-.get_strings= mv88e6131_get_strings,
-.get_ethtool_stats= mv88e6131_get_ethtool_stats,
-.get_sset_count= mv88e6131_get_sset_count,
-};
-
-MODULE_ALIAS("platform:mv88e6085");
-MODULE_ALIAS("platform:mv88e6095");
-MODULE_ALIAS("platform:mv88e6095f");
-MODULE_ALIAS("platform:mv88e6131");
diff --git a/net/dsa/mv88e6xxx.c b/net/dsa/mv88e6xxx.c
deleted file mode 100644
index 5467c04..0000000
--- a/net/dsa/mv88e6xxx.c
+++ /dev/null
< at >< at > -1,549 +0,0 < at >< at >
-/*
- * net/dsa/mv88e6xxx.c - Marvell 88e6xxx switch chip support
- * Copyright (c) 2008 Marvell Semiconductor
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/list.h>
-#include <linux/netdevice.h>
-#include <linux/phy.h>
-#include <net/dsa.h>
-#include "mv88e6xxx.h"
-
-/*
- * If the switch's ADDR[4:0] strap pins are strapped to zero, it will
- * use all 32 SMI bus addresses on its SMI bus, and all switch registers
- * will be directly accessible on some {device address,register address}
- * pair.  If the ADDR[4:0] pins are not strapped to zero, the switch
- * will only respond to SMI transactions to that specific address, and
- * an indirect addressing mechanism needs to be used to access its
- * registers.
- */
-static int mv88e6xxx_reg_wait_ready(struct mii_bus *bus, int sw_addr)
-{
-int ret;
-int i;
-
-for (i = 0; i < 16; i++) {
-ret = mdiobus_read(bus, sw_addr, 0);
-if (ret < 0)
-return ret;
-
-if ((ret & 0x8000) == 0)
-return 0;
-}
-
-return -ETIMEDOUT;
-}
-
-int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
-{
-int ret;
-
-if (sw_addr == 0)
-return mdiobus_read(bus, addr, reg);
-
-/*
- * Wait for the bus to become free.
- */
-ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
-if (ret < 0)
-return ret;
-
-/*
- * Transmit the read command.
- */
-ret = mdiobus_write(bus, sw_addr, 0, 0x9800 | (addr << 5) | reg);
-if (ret < 0)
-return ret;
-
-/*
- * Wait for the read command to complete.
- */
-ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
-if (ret < 0)
-return ret;
-
-/*
- * Read the data.
- */
-ret = mdiobus_read(bus, sw_addr, 1);
-if (ret < 0)
-return ret;
-
-return ret & 0xffff;
-}
-
-int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-int ret;
-
-mutex_lock(&ps->smi_mutex);
-ret = __mv88e6xxx_reg_read(ds->master_mii_bus,
-   ds->pd->sw_addr, addr, reg);
-mutex_unlock(&ps->smi_mutex);
-
-return ret;
-}
-
-int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
-  int reg, u16 val)
-{
-int ret;
-
-if (sw_addr == 0)
-return mdiobus_write(bus, addr, reg, val);
-
-/*
- * Wait for the bus to become free.
- */
-ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
-if (ret < 0)
-return ret;
-
-/*
- * Transmit the data to write.
- */
-ret = mdiobus_write(bus, sw_addr, 1, val);
-if (ret < 0)
-return ret;
-
-/*
- * Transmit the write command.
- */
-ret = mdiobus_write(bus, sw_addr, 0, 0x9400 | (addr << 5) | reg);
-if (ret < 0)
-return ret;
-
-/*
- * Wait for the write command to complete.
- */
-ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
-if (ret < 0)
-return ret;
-
-return 0;
-}
-
-int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-int ret;
-
-mutex_lock(&ps->smi_mutex);
-ret = __mv88e6xxx_reg_write(ds->master_mii_bus,
-    ds->pd->sw_addr, addr, reg, val);
-mutex_unlock(&ps->smi_mutex);
-
-return ret;
-}
-
-int mv88e6xxx_config_prio(struct dsa_switch *ds)
-{
-/*
- * Configure the IP ToS mapping registers.
- */
-REG_WRITE(REG_GLOBAL, 0x10, 0x0000);
-REG_WRITE(REG_GLOBAL, 0x11, 0x0000);
-REG_WRITE(REG_GLOBAL, 0x12, 0x5555);
-REG_WRITE(REG_GLOBAL, 0x13, 0x5555);
-REG_WRITE(REG_GLOBAL, 0x14, 0xaaaa);
-REG_WRITE(REG_GLOBAL, 0x15, 0xaaaa);
-REG_WRITE(REG_GLOBAL, 0x16, 0xffff);
-REG_WRITE(REG_GLOBAL, 0x17, 0xffff);
-
-/*
- * Configure the IEEE 802.1p priority mapping register.
- */
-REG_WRITE(REG_GLOBAL, 0x18, 0xfa41);
-
-return 0;
-}
-
-int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr)
-{
-REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]);
-REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]);
-REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]);
-
-return 0;
-}
-
-int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)
-{
-int i;
-int ret;
-
-for (i = 0; i < 6; i++) {
-int j;
-
-/*
- * Write the MAC address byte.
- */
-REG_WRITE(REG_GLOBAL2, 0x0d, 0x8000 | (i << 8) | addr[i]);
-
-/*
- * Wait for the write to complete.
- */
-for (j = 0; j < 16; j++) {
-ret = REG_READ(REG_GLOBAL2, 0x0d);
-if ((ret & 0x8000) == 0)
-break;
-}
-if (j == 16)
-return -ETIMEDOUT;
-}
-
-return 0;
-}
-
-int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum)
-{
-if (addr >= 0)
-return mv88e6xxx_reg_read(ds, addr, regnum);
-return 0xffff;
-}
-
-int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val)
-{
-if (addr >= 0)
-return mv88e6xxx_reg_write(ds, addr, regnum, val);
-return 0;
-}
-
-#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
-static int mv88e6xxx_ppu_disable(struct dsa_switch *ds)
-{
-int ret;
-int i;
-
-ret = REG_READ(REG_GLOBAL, 0x04);
-REG_WRITE(REG_GLOBAL, 0x04, ret & ~0x4000);
-
-for (i = 0; i < 1000; i++) {
-        ret = REG_READ(REG_GLOBAL, 0x00);
-        msleep(1);
-        if ((ret & 0xc000) != 0xc000)
-                return 0;
-}
-
-return -ETIMEDOUT;
-}
-
-static int mv88e6xxx_ppu_enable(struct dsa_switch *ds)
-{
-int ret;
-int i;
-
-ret = REG_READ(REG_GLOBAL, 0x04);
-REG_WRITE(REG_GLOBAL, 0x04, ret | 0x4000);
-
-for (i = 0; i < 1000; i++) {
-        ret = REG_READ(REG_GLOBAL, 0x00);
-        msleep(1);
-        if ((ret & 0xc000) == 0xc000)
-                return 0;
-}
-
-return -ETIMEDOUT;
-}
-
-static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
-{
-struct mv88e6xxx_priv_state *ps;
-
-ps = container_of(ugly, struct mv88e6xxx_priv_state, ppu_work);
-if (mutex_trylock(&ps->ppu_mutex)) {
-        struct dsa_switch *ds = ((struct dsa_switch *)ps) - 1;
-
-        if (mv88e6xxx_ppu_enable(ds) == 0)
-                ps->ppu_disabled = 0;
-        mutex_unlock(&ps->ppu_mutex);
-}
-}
-
-static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)
-{
-struct mv88e6xxx_priv_state *ps = (void *)_ps;
-
-schedule_work(&ps->ppu_work);
-}
-
-static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-int ret;
-
-mutex_lock(&ps->ppu_mutex);
-
-/*
- * If the PHY polling unit is enabled, disable it so that
- * we can access the PHY registers.  If it was already
- * disabled, cancel the timer that is going to re-enable
- * it.
- */
-if (!ps->ppu_disabled) {
-        ret = mv88e6xxx_ppu_disable(ds);
-        if (ret < 0) {
-                mutex_unlock(&ps->ppu_mutex);
-                return ret;
-        }
-        ps->ppu_disabled = 1;
-} else {
-        del_timer(&ps->ppu_timer);
-        ret = 0;
-}
-
-return ret;
-}
-
-static void mv88e6xxx_ppu_access_put(struct dsa_switch *ds)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-
-/*
- * Schedule a timer to re-enable the PHY polling unit.
- */
-mod_timer(&ps->ppu_timer, jiffies + msecs_to_jiffies(10));
-mutex_unlock(&ps->ppu_mutex);
-}
-
-void mv88e6xxx_ppu_state_init(struct dsa_switch *ds)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-
-mutex_init(&ps->ppu_mutex);
-INIT_WORK(&ps->ppu_work, mv88e6xxx_ppu_reenable_work);
-init_timer(&ps->ppu_timer);
-ps->ppu_timer.data = (unsigned long)ps;
-ps->ppu_timer.function = mv88e6xxx_ppu_reenable_timer;
-}
-
-int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum)
-{
-int ret;
-
-ret = mv88e6xxx_ppu_access_get(ds);
-if (ret >= 0) {
-        ret = mv88e6xxx_reg_read(ds, addr, regnum);
-        mv88e6xxx_ppu_access_put(ds);
-}
-
-return ret;
-}
-
-int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
-    int regnum, u16 val)
-{
-int ret;
-
-ret = mv88e6xxx_ppu_access_get(ds);
-if (ret >= 0) {
-        ret = mv88e6xxx_reg_write(ds, addr, regnum, val);
-        mv88e6xxx_ppu_access_put(ds);
-}
-
-return ret;
-}
-#endif
-
-void mv88e6xxx_poll_link(struct dsa_switch *ds)
-{
-int i;
-
-for (i = 0; i < DSA_MAX_PORTS; i++) {
-struct net_device *dev;
-int uninitialized_var(port_status);
-int link;
-int speed;
-int duplex;
-int fc;
-
-dev = ds->ports[i];
-if (dev == NULL)
-continue;
-
-link = 0;
-if (dev->flags & IFF_UP) {
-port_status = mv88e6xxx_reg_read(ds, REG_PORT(i), 0x00);
-if (port_status < 0)
-continue;
-
-link = !!(port_status & 0x0800);
-}
-
-if (!link) {
-if (netif_carrier_ok(dev)) {
-printk(KERN_INFO "%s: link down\n", dev->name);
-netif_carrier_off(dev);
-}
-continue;
-}
-
-switch (port_status & 0x0300) {
-case 0x0000:
-speed = 10;
-break;
-case 0x0100:
-speed = 100;
-break;
-case 0x0200:
-speed = 1000;
-break;
-default:
-speed = -1;
-break;
-}
-duplex = (port_status & 0x0400) ? 1 : 0;
-fc = (port_status & 0x8000) ? 1 : 0;
-
-if (!netif_carrier_ok(dev)) {
-printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, "
- "flow control %sabled\n", dev->name,
- speed, duplex ? "full" : "half",
- fc ? "en" : "dis");
-netif_carrier_on(dev);
-}
-}
-}
-
-static int mv88e6xxx_stats_wait(struct dsa_switch *ds)
-{
-int ret;
-int i;
-
-for (i = 0; i < 10; i++) {
-ret = REG_READ(REG_GLOBAL, 0x1d);
-if ((ret & 0x8000) == 0)
-return 0;
-}
-
-return -ETIMEDOUT;
-}
-
-static int mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port)
-{
-int ret;
-
-/*
- * Snapshot the hardware statistics counters for this port.
- */
-REG_WRITE(REG_GLOBAL, 0x1d, 0xdc00 | port);
-
-/*
- * Wait for the snapshotting to complete.
- */
-ret = mv88e6xxx_stats_wait(ds);
-if (ret < 0)
-return ret;
-
-return 0;
-}
-
-static void mv88e6xxx_stats_read(struct dsa_switch *ds, int stat, u32 *val)
-{
-u32 _val;
-int ret;
-
-*val = 0;
-
-ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1d, 0xcc00 | stat);
-if (ret < 0)
-return;
-
-ret = mv88e6xxx_stats_wait(ds);
-if (ret < 0)
-return;
-
-ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, 0x1e);
-if (ret < 0)
-return;
-
-_val = ret << 16;
-
-ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, 0x1f);
-if (ret < 0)
-return;
-
-*val = _val | ret;
-}
-
-void mv88e6xxx_get_strings(struct dsa_switch *ds,
-   int nr_stats, struct mv88e6xxx_hw_stat *stats,
-   int port, uint8_t *data)
-{
-int i;
-
-for (i = 0; i < nr_stats; i++) {
-memcpy(data + i * ETH_GSTRING_LEN,
-       stats[i].string, ETH_GSTRING_LEN);
-}
-}
-
-void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
- int nr_stats, struct mv88e6xxx_hw_stat *stats,
- int port, uint64_t *data)
-{
-struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
-int ret;
-int i;
-
-mutex_lock(&ps->stats_mutex);
-
-ret = mv88e6xxx_stats_snapshot(ds, port);
-if (ret < 0) {
-mutex_unlock(&ps->stats_mutex);
-return;
-}
-
-/*
- * Read each of the counters.
- */
-for (i = 0; i < nr_stats; i++) {
-struct mv88e6xxx_hw_stat *s = stats + i;
-u32 low;
-u32 high;
-
-mv88e6xxx_stats_read(ds, s->reg, &low);
-if (s->sizeof_stat == 8)
-mv88e6xxx_stats_read(ds, s->reg + 1, &high);
-else
-high = 0;
-
-data[i] = (((u64)high) << 32) | low;
-}
-
-mutex_unlock(&ps->stats_mutex);
-}
-
-static int __init mv88e6xxx_init(void)
-{
-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)
-register_switch_driver(&mv88e6131_switch_driver);
-#endif
-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6123_61_65)
-register_switch_driver(&mv88e6123_61_65_switch_driver);
-#endif
-return 0;
-}
-module_init(mv88e6xxx_init);
-
-static void __exit mv88e6xxx_cleanup(void)
-{
-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6123_61_65)
-unregister_switch_driver(&mv88e6123_61_65_switch_driver);
-#endif
-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)
-unregister_switch_driver(&mv88e6131_switch_driver);
-#endif
-}
-module_exit(mv88e6xxx_cleanup);
-
-MODULE_AUTHOR("Lennert Buytenhek <buytenh< at >wantstofly.org>");
-MODULE_DESCRIPTION("Driver for Marvell 88E6XXX ethernet switch chips");
-MODULE_LICENSE("GPL");
diff --git a/net/dsa/mv88e6xxx.h b/net/dsa/mv88e6xxx.h
deleted file mode 100644
index fc2cd7b..0000000
--- a/net/dsa/mv88e6xxx.h
+++ /dev/null
< at >< at > -1,98 +0,0 < at >< at >
-/*
- * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
- * Copyright (c) 2008 Marvell Semiconductor
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __MV88E6XXX_H
-#define __MV88E6XXX_H
-
-#define REG_PORT(p)(0x10 + (p))
-#define REG_GLOBAL0x1b
-#define REG_GLOBAL20x1c
-
-struct mv88e6xxx_priv_state {
-/*
- * When using multi-chip addressing, this mutex protects
- * access to the indirect access registers.  (In single-chip
- * mode, this mutex is effectively useless.)
- */
-struct mutexsmi_mutex;
-
-#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
-/*
- * Handles automatic disabling and re-enabling of the PHY
- * polling unit.
- */
-struct mutexppu_mutex;
-intppu_disabled;
-struct work_structppu_work;
-struct timer_listppu_timer;
-#endif
-
-/*
- * This mutex serialises access to the statistics unit.
- * Hold this mutex over snapshot + dump sequences.
- */
-struct mutexstats_mutex;
-
-intid; /* switch product id */
-};
-
-struct mv88e6xxx_hw_stat {
-char string[ETH_GSTRING_LEN];
-int sizeof_stat;
-int reg;
-};
-
-int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
-int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
-int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
-                          int reg, u16 val);
-int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
-int mv88e6xxx_config_prio(struct dsa_switch *ds);
-int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
-int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
-int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
-int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
-void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
-int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
-int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
-    int regnum, u16 val);
-void mv88e6xxx_poll_link(struct dsa_switch *ds);
-void mv88e6xxx_get_strings(struct dsa_switch *ds,
-   int nr_stats, struct mv88e6xxx_hw_stat *stats,
-   int port, uint8_t *data);
-void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
- int nr_stats, struct mv88e6xxx_hw_stat *stats,
- int port, uint64_t *data);
-
-extern struct dsa_switch_driver mv88e6131_switch_driver;
-extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
-
-#define REG_READ(addr, reg)\
-({\
-int __ret;\
-\
-__ret = mv88e6xxx_reg_read(ds, addr, reg);\
-if (__ret < 0)\
-return __ret;\
-__ret;\
-})
-
-#define REG_WRITE(addr, reg, val)\
-({\
-int __ret;\
-\
-__ret = mv88e6xxx_reg_write(ds, addr, reg, val);\
-if (__ret < 0)\
-return __ret;\
-})
-
-
-
-#endif

[PATCH 07/12] dsa: Remove unnecessary exports

Tim Gardner — 2012-05-24T20:58:19

From: Ben Hutchings <ben< at >decadent.org.uk>

BugLink: http://bugs.launchpad.net/bugs/1004148

I mistakenly exported functions from slave.c that are only called from
dsa.c, part of the same module.

Signed-off-by: Ben Hutchings <ben< at >decadent.org.uk>
Acked-by: Lennert Buytenhek <buytenh< at >wantstofly.org>
Signed-off-by: David S. Miller <davem< at >davemloft.net>
(cherry picked from commit fa67a04497c03a1ead12cd896262de14980311e8)
Signed-off-by: Tim Gardner <tim.gardner< at >canonical.com>
---
 net/dsa/slave.c |    2 --
 1 file changed, 2 deletions(-)

diff --git a/net/dsa/slave.c b/net/dsa/slave.c
index c9d52ca..56cf9b8 100644
--- a/net/dsa/slave.c
+++ b/net/dsa/slave.c
< at >< at > -45,7 +45,6 < at >< at > void dsa_slave_mii_bus_init(struct dsa_switch *ds)
 ds->master_mii_bus->id, ds->pd->sw_addr);
 ds->slave_mii_bus->parent = &ds->master_mii_bus->dev;
 }
-EXPORT_SYMBOL_GPL(dsa_slave_mii_bus_init);
 
 
 /* slave device handling ****************************************************/
< at >< at > -403,4 +402,3 < at >< at > dsa_slave_create(struct dsa_switch *ds, struct device *parent,
 
 return slave_dev;
 }
-EXPORT_SYMBOL_GPL(dsa_slave_create);