gmane.linux.serial

Re: [PATCH v2 2/4] tty/8250_dw: Add support for OCTEON UARTS.

Arnd Bergmann — 2013-06-19T22:42:18

Acked-by: Arnd Bergmann <arnd< at >arndb.de>
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[PATCH v2 4/4] MIPS: Update cavium_octeon_defconfig

David Daney — 2013-06-19T21:37:29

From: David Daney <david.daney< at >cavium.com>

The serial port changes make it advisable to enable the proper UART
drivers.

Signed-off-by: David Daney <david.daney< at >cavium.com>
---
 arch/mips/configs/cavium_octeon_defconfig | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig
index 1888e5f..dace582 100644
--- a/arch/mips/configs/cavium_octeon_defconfig
+++ b/arch/mips/configs/cavium_octeon_defconfig
< at >< at > -1,13 +1,11 < at >< at >
 CONFIG_CAVIUM_OCTEON_SOC=y
 CONFIG_CAVIUM_CN63XXP1=y
 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2
-CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=32
 CONFIG_HZ_100=y
 CONFIG_PREEMPT=y
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
< at >< at > -50,7 +48,6 < at >< at > CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
 # CONFIG_MTD_OF_PARTS is not set
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
< at >< at > -114,6 +111,7 < at >< at > CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_DW=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_OCTEON=y

Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS.

David Daney — 2013-06-19T19:12:09

Well, I do know that for the cases of interest, it will be a single load 
or store, but it is moot, as I rewrote that part.


Yes, I know that.


Please see the instruction set reference manual 
(MD00087-2B-MIPS64BIS-AFP-03.51 or similar) available at:

http://www.mips.com/products/architectures/mips64/#specifications

... for why you are mistaken.  Pay particular attention to the low order 
address bit scrambling on narrow loads and stores and how this results 
in uniform (not affected by processor endian mode) load and store 
results for aligned 64-bit accesses.  In effect, it is magic, and 
__raw_writeq yields correct results in both big and little endian modes 
of operation.

David Daney.


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Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS.

David Daney — 2013-06-19T16:47:08

I am reworking the patch because other problems were found.  I will try 
to get this part right in the next version.

David Daney

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Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS.

David Daney — 2013-06-19T16:45:28

I will rework the patch to avoid this problem.



We do runtime probing and only use this function on platforms where it 
is appropriate, so atomicity is not an issue.  As for endianess, I used 
the __raw_ variant precisely because it is correct for both big and 
little endian kernels.

David Daney


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Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS.

Arnd Bergmann — 2013-06-19T10:01:06

This breaks building on 32 bit architectures as I found on my daily ARM
builds: __raw_writeq cannot be defined on architectures that don't have
native 64 bit data access instructions. It's also wrong to use the
__raw_* variant, which is not guaranteed to be atomic and is not
endian-safe.

Arnd
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[PATCH v3 5/5] ARM: davinci: serial: platform code cleanup

Manjunathappa, Prakash — 2013-06-19T09:15:42

1) "struct davinci_uart_config" is introduced to specify
   UART ports brought out or enabled on the board. But
   none of the boards use them for that purpose, so clean
   it up.
2) Have pointer to platform device as a argument for
   davinci_serial_init(), no need of serial_dev in
   struct soc_info now.
3) No need of davinci_serial_setup_clk(), not called from
   multiple places, hence reduce function call overhead.

Signed-off-by: Manjunathappa, Prakash <prakash.pm< at >ti.com>
Suggested-by: Sekhar Nori <nsekhar< at >ti.com>
---
 arch/arm/mach-davinci/board-da830-evm.c        |    6 +---
 arch/arm/mach-davinci/board-da850-evm.c        |    6 +---
 arch/arm/mach-davinci/board-dm355-evm.c        |    6 +---
 arch/arm/mach-davinci/board-dm355-leopard.c    |    6 +---
 arch/arm/mach-davinci/board-dm365-evm.c        |    6 +---
 arch/arm/mach-davinci/board-dm644x-evm.c       |    6 +---
 arch/arm/mach-davinci/board-dm646x-evm.c       |    6 +---
 arch/arm/mach-davinci/board-mityomapl138.c     |    6 +---
 arch/arm/mach-davinci/board-neuros-osd2.c      |    6 +---
 arch/arm/mach-davinci/board-omapl138-hawk.c    |    6 +---
 arch/arm/mach-davinci/board-sffsdr.c           |    7 +---
 arch/arm/mach-davinci/da830.c                  |    1 -
 arch/arm/mach-davinci/da850.c                  |    1 -
 arch/arm/mach-davinci/davinci.h                |    5 +++
 arch/arm/mach-davinci/devices-tnetv107x.c      |    2 +-
 arch/arm/mach-davinci/dm355.c                  |    3 +-
 arch/arm/mach-davinci/dm365.c                  |    3 +-
 arch/arm/mach-davinci/dm644x.c                 |    3 +-
 arch/arm/mach-davinci/dm646x.c                 |    3 +-
 arch/arm/mach-davinci/include/mach/common.h    |    1 -
 arch/arm/mach-davinci/include/mach/serial.h    |   10 ++----
 arch/arm/mach-davinci/include/mach/tnetv107x.h |    1 -
 arch/arm/mach-davinci/serial.c                 |   47 +++++++-----------------
 23 files changed, 39 insertions(+), 108 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 1332de8..c4bdc0a 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
< at >< at > -185,10 +185,6 < at >< at > static __init void da830_evm_usb_init(void)
    __func__, ret);
 }
 
-static struct davinci_uart_config da830_evm_uart_config __initdata = {
-.enabled_uarts = 0x7,
-};
-
 static const short da830_evm_mcasp1_pins[] = {
 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
< at >< at > -630,7 +626,7 < at >< at > static __init void da830_evm_init(void)
 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
 ret);
 
-davinci_serial_init(&da830_evm_uart_config);
+davinci_serial_init(da8xx_serial_device);
 i2c_register_board_info(1, da830_evm_i2c_devices,
 ARRAY_SIZE(da830_evm_i2c_devices));
 
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 8a24b6c..9ac76ee 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
< at >< at > -746,10 +746,6 < at >< at > static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
 .bus_delay= 0,/* usec */
 };
 
-static struct davinci_uart_config da850_evm_uart_config __initdata = {
-.enabled_uarts = 0x7,
-};
-
 /* davinci da850 evm audio machine driver */
 static u8 da850_iis_serializer_direction[] = {
 INACTIVE_MODE,INACTIVE_MODE,INACTIVE_MODE,INACTIVE_MODE,
< at >< at > -1495,7 +1491,7 < at >< at > static __init void da850_evm_init(void)
 __func__, ret);
 }
 
-davinci_serial_init(&da850_evm_uart_config);
+davinci_serial_init(da8xx_serial_device);
 
 i2c_register_board_info(1, da850_evm_i2c_devices,
 ARRAY_SIZE(da850_evm_i2c_devices));
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index c2a0a67..42b23a3 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
< at >< at > -314,10 +314,6 < at >< at > static struct platform_device *davinci_evm_devices[] __initdata = {
 &davinci_nand_device,
 };
 
-static struct davinci_uart_config uart_config __initdata = {
-.enabled_uarts = (1 << 0),
-};
-
 static void __init dm355_evm_map_io(void)
 {
 dm355_init();
< at >< at > -393,7 +389,7 < at >< at > static __init void dm355_evm_init(void)
 platform_add_devices(davinci_evm_devices,
      ARRAY_SIZE(davinci_evm_devices));
 evm_init_i2c();
-davinci_serial_init(&uart_config);
+davinci_serial_init(dm355_serial_device);
 
 /* NOTE:  NAND flash timings set by the UBL are slower than
  * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index dff4ddc..d9eb1c9 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
< at >< at > -172,10 +172,6 < at >< at > static struct platform_device *davinci_leopard_devices[] __initdata = {
 &davinci_nand_device,
 };
 
-static struct davinci_uart_config uart_config __initdata = {
-.enabled_uarts = (1 << 0),
-};
-
 static void __init dm355_leopard_map_io(void)
 {
 dm355_init();
< at >< at > -251,7 +247,7 < at >< at > static __init void dm355_leopard_init(void)
 platform_add_devices(davinci_leopard_devices,
      ARRAY_SIZE(davinci_leopard_devices));
 leopard_init_i2c();
-davinci_serial_init(&uart_config);
+davinci_serial_init(dm355_serial_device);
 
 /* NOTE:  NAND flash timings set by the UBL are slower than
  * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index fd38c8d..5f1ec9d 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
< at >< at > -719,10 +719,6 < at >< at > fail:
 /* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */
 }
 
-static struct davinci_uart_config uart_config __initdata = {
-.enabled_uarts = (1 << 0),
-};
-
 static void __init dm365_evm_map_io(void)
 {
 dm365_init();
< at >< at > -749,7 +745,7 < at >< at > static struct spi_board_info dm365_evm_spi_info[] __initconst = {
 static __init void dm365_evm_init(void)
 {
 evm_init_i2c();
-davinci_serial_init(&uart_config);
+davinci_serial_init(dm365_serial_device);
 
 dm365evm_emac_configure();
 dm365evm_mmc_configure();
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index a33686a..462812b 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
< at >< at > -726,10 +726,6 < at >< at > static struct platform_device *davinci_evm_devices[] __initdata = {
 &rtc_dev,
 };
 
-static struct davinci_uart_config uart_config __initdata = {
-.enabled_uarts = (1 << 0),
-};
-
 static void __init
 davinci_evm_map_io(void)
 {
< at >< at > -791,7 +787,7 < at >< at > static __init void davinci_evm_init(void)
 davinci_setup_mmc(0, &dm6446evm_mmc_config);
 dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
 
-davinci_serial_init(&uart_config);
+davinci_serial_init(dm644x_serial_device);
 dm644x_init_asp(&dm644x_evm_snd_data);
 
 /* irlml6401 switches over 1A, in under 8 msec */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index fbb8e5a..734cc02 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
< at >< at > -749,10 +749,6 < at >< at > static void __init davinci_map_io(void)
 cdce_clk_init();
 }
 
-static struct davinci_uart_config uart_config __initdata = {
-.enabled_uarts = (1 << 0),
-};
-
 #define DM646X_EVM_PHY_ID"davinci_mdio-0:01"
 /*
  * The following EDMA channels/slots are not being used by drivers (for
< at >< at > -792,7 +788,7 < at >< at > static __init void evm_init(void)
 struct davinci_soc_info *soc_info = &davinci_soc_info;
 
 evm_init_i2c();
-davinci_serial_init(&uart_config);
+davinci_serial_init(dm646x_serial_device);
 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
 
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 9549d53..cd0f587 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
< at >< at > -434,10 +434,6 < at >< at > static void __init mityomapl138_setup_nand(void)
  ARRAY_SIZE(mityomapl138_devices));
 }
 
-static struct davinci_uart_config mityomapl138_uart_config __initdata = {
-.enabled_uarts = 0x7,
-};
-
 static const short mityomap_mii_pins[] = {
 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
< at >< at > -517,7 +513,7 < at >< at > static void __init mityomapl138_init(void)
 if (ret)
 pr_warning("watchdog registration failed: %d\n", ret);
 
-davinci_serial_init(&mityomapl138_uart_config);
+davinci_serial_init(da8xx_serial_device);
 
 ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata);
 if (ret)
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 2bc112a..8e156e0 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
< at >< at > -153,10 +153,6 < at >< at > static struct platform_device *davinci_ntosd2_devices[] __initdata = {
 &ntosd2_leds_dev,
 };
 
-static struct davinci_uart_config uart_config __initdata = {
-.enabled_uarts = (1 << 0),
-};
-
 static void __init davinci_ntosd2_map_io(void)
 {
 dm644x_init();
< at >< at > -197,7 +193,7 < at >< at > static __init void davinci_ntosd2_init(void)
 platform_add_devices(davinci_ntosd2_devices,
 ARRAY_SIZE(davinci_ntosd2_devices));
 
-davinci_serial_init(&uart_config);
+davinci_serial_init(dm644x_serial_device);
 dm644x_init_asp(&dm644x_ntosd2_snd_data);
 
 soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index b8c20de..ab98c75 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
< at >< at > -286,15 +286,11 < at >< at > usb11_setup_oc_fail:
 gpio_free(DA850_USB1_VBUS_PIN);
 }
 
-static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
-.enabled_uarts = 0x7,
-};
-
 static __init void omapl138_hawk_init(void)
 {
 int ret;
 
-davinci_serial_init(&omapl138_hawk_uart_config);
+davinci_serial_init(da8xx_serial_device);
 
 omapl138_hawk_config_emac();
 
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 739be7e..96ca11b 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
< at >< at > -44,6 +44,7 < at >< at >
 #include "davinci.h"
 
 #define SFFSDR_PHY_ID"davinci_mdio-0:01"
+
 static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
 /* U-Boot Environment: Block 0
  * UBL:                Block 1
< at >< at > -125,10 +126,6 < at >< at > static struct platform_device *davinci_sffsdr_devices[] __initdata = {
 &davinci_sffsdr_nandflash_device,
 };
 
-static struct davinci_uart_config uart_config __initdata = {
-.enabled_uarts = (1 << 0),
-};
-
 static void __init davinci_sffsdr_map_io(void)
 {
 dm644x_init();
< at >< at > -141,7 +138,7 < at >< at > static __init void davinci_sffsdr_init(void)
 platform_add_devices(davinci_sffsdr_devices,
      ARRAY_SIZE(davinci_sffsdr_devices));
 sffsdr_init_i2c();
-davinci_serial_init(&uart_config);
+davinci_serial_init(dm644x_serial_device);
 soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID;
 davinci_setup_usb(0, 0); /* We support only peripheral mode. */
 
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a3ffd52..111613b 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
< at >< at > -1199,7 +1199,6 < at >< at > static struct davinci_soc_info davinci_soc_info_da830 = {
 .gpio_base= DA8XX_GPIO_BASE,
 .gpio_num= 128,
 .gpio_irq= IRQ_DA8XX_GPIO0,
-.serial_dev= da8xx_serial_device,
 .emac_pdata= &da8xx_emac_pdata,
 };
 
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 7ce691c..b1d56e5 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
< at >< at > -1301,7 +1301,6 < at >< at > static struct davinci_soc_info davinci_soc_info_da850 = {
 .gpio_base= DA8XX_GPIO_BASE,
 .gpio_num= 144,
 .gpio_irq= IRQ_DA8XX_GPIO0,
-.serial_dev= da8xx_serial_device,
 .emac_pdata= &da8xx_emac_pdata,
 .sram_dma= DA8XX_SHARED_RAM_BASE,
 .sram_len= SZ_128K,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 1ab3df4..d6049e8 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
< at >< at > -106,4 +106,9 < at >< at > int __init dm646x_init_edma(struct edma_rsv_info *rsv);
 void dm646x_video_init(void);
 void dm646x_setup_vpif(struct vpif_display_config *,
        struct vpif_capture_config *);
+
+extern struct platform_device dm365_serial_device[];
+extern struct platform_device dm355_serial_device[];
+extern struct platform_device dm644x_serial_device[];
+extern struct platform_device dm646x_serial_device[];
 #endif /*__DAVINCI_H */
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index d2d8db0..8101910 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
< at >< at > -410,7 +410,7 < at >< at > void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
 platform_device_register(&tsc_device);
 
 if (info->serial_config)
-davinci_serial_init(info->serial_config);
+davinci_serial_init(tnetv107x_serial_device);
 
 for (i = 0; i < 2; i++)
 if (info->mmc_config[i]) {
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 1078cd6..b86e265 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
< at >< at > -962,7 +962,7 < at >< at > static struct plat_serial8250_port dm355_serial2_platform_data[] = {
 }
 };
 
-static struct platform_device dm355_serial_device[] = {
+struct platform_device dm355_serial_device[] = {
 {
 .name= "serial8250",
 .id= PLAT8250_DEV_PLATFORM,
< at >< at > -1009,7 +1009,6 < at >< at > static struct davinci_soc_info davinci_soc_info_dm355 = {
 .gpio_base= DAVINCI_GPIO_BASE,
 .gpio_num= 104,
 .gpio_irq= IRQ_DM355_GPIOBNK0,
-.serial_dev= dm355_serial_device,
 .sram_dma= 0x00010000,
 .sram_len= SZ_32K,
 };
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6a78856..a34ec22 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
< at >< at > -1068,7 +1068,7 < at >< at > static struct plat_serial8250_port dm365_serial1_platform_data[] = {
 }
 };
 
-static struct platform_device dm365_serial_device[] = {
+struct platform_device dm365_serial_device[] = {
 {
 .name= "serial8250",
 .id= PLAT8250_DEV_PLATFORM,
< at >< at > -1109,7 +1109,6 < at >< at > static struct davinci_soc_info davinci_soc_info_dm365 = {
 .gpio_num= 104,
 .gpio_irq= IRQ_DM365_GPIO0,
 .gpio_unbanked= 8,/* really 16 ... skip muxed GPIOs */
-.serial_dev= dm365_serial_device,
 .emac_pdata= &dm365_emac_pdata,
 .sram_dma= 0x00010000,
 .sram_len= SZ_32K,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 1129ff1..8428f61 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
< at >< at > -853,7 +853,7 < at >< at > static struct plat_serial8250_port dm644x_serial2_platform_data[] = {
 }
 };
 
-static struct platform_device dm644x_serial_device[] = {
+struct platform_device dm644x_serial_device[] = {
 {
 .name= "serial8250",
 .id= PLAT8250_DEV_PLATFORM,
< at >< at > -900,7 +900,6 < at >< at > static struct davinci_soc_info davinci_soc_info_dm644x = {
 .gpio_base= DAVINCI_GPIO_BASE,
 .gpio_num= 71,
 .gpio_irq= IRQ_GPIOBNK0,
-.serial_dev= dm644x_serial_device,
 .emac_pdata= &dm644x_emac_pdata,
 .sram_dma= 0x00008000,
 .sram_len= SZ_16K,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index d3fd760..3e44a97 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
< at >< at > -830,7 +830,7 < at >< at > static struct plat_serial8250_port dm646x_serial2_platform_data[] = {
 }
 };
 
-static struct platform_device dm646x_serial_device[] = {
+struct platform_device dm646x_serial_device[] = {
 {
 .name= "serial8250",
 .id= PLAT8250_DEV_PLATFORM,
< at >< at > -877,7 +877,6 < at >< at > static struct davinci_soc_info davinci_soc_info_dm646x = {
 .gpio_base= DAVINCI_GPIO_BASE,
 .gpio_num= 43, /* Only 33 usable */
 .gpio_irq= IRQ_DM646X_GPIOBNK0,
-.serial_dev= dm646x_serial_device,
 .emac_pdata= &dm646x_emac_pdata,
 .sram_dma= 0x10010000,
 .sram_len= SZ_32K,
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index b124b77..7f5a2e9 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
< at >< at > -71,7 +71,6 < at >< at > struct davinci_soc_info {
 unsignedgpio_unbanked;
 struct davinci_gpio_controller*gpio_ctlrs;
 intgpio_ctlrs_num;
-struct platform_device*serial_dev;
 struct emac_platform_data*emac_pdata;
 dma_addr_tsram_dma;
 unsignedsram_len;
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index 62ad300..52b8571 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
< at >< at > -15,6 +15,8 < at >< at >
 
 #include <mach/hardware.h>
 
+#include <linux/platform_device.h>
+
 #define DAVINCI_UART0_BASE(IO_PHYS + 0x20000)
 #define DAVINCI_UART1_BASE(IO_PHYS + 0x20400)
 #define DAVINCI_UART2_BASE(IO_PHYS + 0x20800)
< at >< at > -37,13 +39,7 < at >< at >
 #define UART_DM646X_SCR_TX_WATERMARK0x08
 
 #ifndef __ASSEMBLY__
-struct davinci_uart_config {
-/* Bit field of UARTs present; bit 0 --> UART0 */
-unsigned int enabled_uarts;
-};
-
-extern int davinci_serial_init(struct davinci_uart_config *);
-extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate);
+extern int davinci_serial_init(struct platform_device *);
 #endif
 
 #endif /* __ASM_ARCH_SERIAL_H */
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 07948a5..c68c7a9 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
< at >< at > -41,7 +41,6 < at >< at >
 #include <mach/serial.h>
 
 struct tnetv107x_device_info {
-struct davinci_uart_config*serial_config;
 struct davinci_mmc_config*mmc_config[2];  /* 2 controllers */
 struct davinci_nand_pdata*nand_config[4]; /* 4 chipsels */
 struct matrix_keypad_platform_data *keypad_config;
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index 57e6150..5e93a73 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
< at >< at > -70,54 +70,35 < at >< at > static void __init davinci_serial_reset(struct plat_serial8250_port *p)
  UART_DM646X_SCR_TX_WATERMARK);
 }
 
-/* Enable UART clock and obtain its rate */
-int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate)
-{
-char name[16];
-struct clk *clk;
-struct davinci_soc_info *soc_info = &davinci_soc_info;
-struct device *dev = &soc_info->serial_dev[instance].dev;
-
-sprintf(name, "uart%d", instance);
-clk = clk_get(dev, name);
-if (IS_ERR(clk)) {
-pr_err("%s:%d: failed to get UART%d clock\n",
-__func__, __LINE__, instance);
-return PTR_ERR(clk);
-}
-
-clk_prepare_enable(clk);
-
-if (rate)
-*rate = clk_get_rate(clk);
-
-return 0;
-}
-
-int __init davinci_serial_init(struct davinci_uart_config *info)
+int __init davinci_serial_init(struct platform_device *serial_dev)
 {
 int i, ret = 0;
-struct davinci_soc_info *soc_info = &davinci_soc_info;
 struct device *dev;
 struct plat_serial8250_port *p;
+struct clk *clk;
 
 /*
  * Make sure the serial ports are muxed on at this point.
  * You have to mux them off in device drivers later on if not needed.
  */
-for (i = 0; soc_info->serial_dev[i].dev.platform_data != NULL; i++) {
-dev = &soc_info->serial_dev[i].dev;
+for (i = 0; serial_dev[i].dev.platform_data != NULL; i++) {
+dev = &serial_dev[i].dev;
 p = dev->platform_data;
-if (!(info->enabled_uarts & (1 << i)))
-continue;
 
-ret = platform_device_register(&soc_info->serial_dev[i]);
+ret = platform_device_register(&serial_dev[i]);
 if (ret)
 continue;
 
-ret = davinci_serial_setup_clk(i, &p->uartclk);
-if (ret)
+clk = clk_get(dev, NULL);
+if (IS_ERR(clk)) {
+pr_err("%s:%d: failed to get UART%d clock\n",
+       __func__, __LINE__, i);
 continue;
+}
+
+clk_prepare_enable(clk);
+
+p->uartclk = clk_get_rate(clk);
 
 if (!p->membase && p->mapbase) {
 p->membase = ioremap(p->mapbase, SZ_4K);

[PATCH v3 4/5] ARM: davinci: da8xx: remove da8xx_uart_clk_enable

Manjunathappa, Prakash — 2013-06-19T09:15:41

Serial clocks are enabled from of_platform_serial_setup:of_serial.c,
so remove davinci_serial_setup_clk from here.

Signed-off-by: Manjunathappa, Prakash <prakash.pm< at >ti.com>
---
 arch/arm/mach-davinci/da8xx-dt.c |    8 --------
 1 files changed, 0 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index e429945..9683cbd 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
< at >< at > -20,13 +20,6 < at >< at >
 
 #define DA8XX_NUM_UARTS3
 
-static void __init da8xx_uart_clk_enable(void)
-{
-int i;
-for (i = 0; i < DA8XX_NUM_UARTS; i++)
-davinci_serial_setup_clk(i, NULL);
-}
-
 static struct of_device_id da8xx_irq_match[] __initdata = {
 { .compatible = "ti,cp-intc", .data = cp_intc_of_init, },
 { }
< at >< at > -60,7 +53,6 < at >< at > static void __init da850_init_machine(void)
 of_platform_populate(NULL, of_default_bus_match_table,
      da850_auxdata_lookup, NULL);
 
-da8xx_uart_clk_enable();
 }
 
 static const char *da850_boards_compat[] __initdata = {

Re: [PATCH 0/5] MIPS/tty/8250: Use standard 8250 drivers for OCTEON

Jamie Iles — 2013-06-18T21:28:36

Looks good!

Reviewed-by: Jamie Iles <jamie< at >jamieiles.com>

for the series.

Thanks,

Jamie
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Re: [PATCH 0/5] MIPS/tty/8250: Use standard 8250 drivers for OCTEON

Ralf Baechle — 2013-06-18T19:36:18


Looks good - I was trying to come up with a kludge good enough for 3.10;
this may be a bit too large ...

  Ralf
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Re: [PATCH 0/5] MIPS/tty/8250: Use standard 8250 drivers for OCTEON

Greg Kroah-Hartman — 2013-06-18T19:26:31

That's fine with me, I've acked the tty driver changes so feel free to
take all of these through the mips tree.

thanks,

greg k-h
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[PATCH 4/5] MIPS: OCTEON: Remove custom serial setup code.

David Daney — 2013-06-18T19:12:54

From: David Daney <david.daney< at >cavium.com>

We will use 8250_dw instead.

Signed-off-by: David Daney <david.daney< at >cavium.com>
---
 arch/mips/cavium-octeon/Makefile |   2 +-
 arch/mips/cavium-octeon/serial.c | 109 ---------------------------------------
 2 files changed, 1 insertion(+), 110 deletions(-)
 delete mode 100644 arch/mips/cavium-octeon/serial.c

diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index e3fd50c..4e95204 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
< at >< at > -12,7 +12,7 < at >< at >
 CFLAGS_octeon-platform.o = -I$(src)/../../../scripts/dtc/libfdt
 CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
 
-obj-y := cpu.o setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o
+obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o
 obj-y += dma-octeon.o
 obj-y += octeon-memcpy.o
 obj-y += executive/
diff --git a/arch/mips/cavium-octeon/serial.c b/arch/mips/cavium-octeon/serial.c
deleted file mode 100644
index f393f65..0000000
--- a/arch/mips/cavium-octeon/serial.c
+++ /dev/null
< at >< at > -1,109 +0,0 < at >< at >
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2004-2007 Cavium Networks
- */
-#include <linux/console.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/serial.h>
-#include <linux/serial_8250.h>
-#include <linux/serial_reg.h>
-#include <linux/tty.h>
-#include <linux/irq.h>
-
-#include <asm/time.h>
-
-#include <asm/octeon/octeon.h>
-
-#define DEBUG_UART 1
-
-unsigned int octeon_serial_in(struct uart_port *up, int offset)
-{
-int rv = cvmx_read_csr((uint64_t)(up->membase + (offset << 3)));
-if (offset == UART_IIR && (rv & 0xf) == 7) {
-/* Busy interrupt, read the USR (39) and try again. */
-cvmx_read_csr((uint64_t)(up->membase + (39 << 3)));
-rv = cvmx_read_csr((uint64_t)(up->membase + (offset << 3)));
-}
-return rv;
-}
-
-void octeon_serial_out(struct uart_port *up, int offset, int value)
-{
-/*
- * If bits 6 or 7 of the OCTEON UART's LCR are set, it quits
- * working.
- */
-if (offset == UART_LCR)
-value &= 0x9f;
-cvmx_write_csr((uint64_t)(up->membase + (offset << 3)), (u8)value);
-}
-
-static int octeon_serial_probe(struct platform_device *pdev)
-{
-int irq, res;
-struct resource *res_mem;
-struct uart_8250_port up;
-
-/* All adaptors have an irq.  */
-irq = platform_get_irq(pdev, 0);
-if (irq < 0)
-return irq;
-
-memset(&up, 0, sizeof(up));
-
-up.port.flags = ASYNC_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE;
-up.port.type = PORT_OCTEON;
-up.port.iotype = UPIO_MEM;
-up.port.regshift = 3;
-up.port.dev = &pdev->dev;
-
-if (octeon_is_simulation())
-/* Make simulator output fast*/
-up.port.uartclk = 115200 * 16;
-else
-up.port.uartclk = octeon_get_io_clock_rate();
-
-up.port.serial_in = octeon_serial_in;
-up.port.serial_out = octeon_serial_out;
-up.port.irq = irq;
-
-res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-if (res_mem == NULL) {
-dev_err(&pdev->dev, "found no memory resource\n");
-return -ENXIO;
-}
-up.port.mapbase = res_mem->start;
-up.port.membase = ioremap(res_mem->start, resource_size(res_mem));
-
-res = serial8250_register_8250_port(&up);
-
-return res >= 0 ? 0 : res;
-}
-
-static struct of_device_id octeon_serial_match[] = {
-{
-.compatible = "cavium,octeon-3860-uart",
-},
-{},
-};
-MODULE_DEVICE_TABLE(of, octeon_serial_match);
-
-static struct platform_driver octeon_serial_driver = {
-.probe= octeon_serial_probe,
-.driver= {
-.owner= THIS_MODULE,
-.name= "octeon_serial",
-.of_match_table = octeon_serial_match,
-},
-};
-
-static int __init octeon_serial_init(void)
-{
-return platform_driver_register(&octeon_serial_driver);
-}
-late_initcall(octeon_serial_init);

[PATCH 1/5] Revert "MIPS: Octeon: Fix build error if CONFIG_SERIAL_8250=n"

David Daney — 2013-06-18T19:12:51

From: David Daney <david.daney< at >cavium.com>

This reverts commit fc0fcde2ea9740944acf6134d2c84983d1297bc1.
---
 arch/mips/cavium-octeon/Makefile | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 643809f..e3fd50c 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
< at >< at > -12,13 +12,12 < at >< at >
 CFLAGS_octeon-platform.o = -I$(src)/../../../scripts/dtc/libfdt
 CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
 
-obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o
+obj-y := cpu.o setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o
 obj-y += dma-octeon.o
 obj-y += octeon-memcpy.o
 obj-y += executive/
 
 obj-$(CONFIG_MTD)      += flash_setup.o
-obj-$(CONFIG_SERIAL_8250)      += serial.o
 obj-$(CONFIG_SMP)      += smp.o
 obj-$(CONFIG_OCTEON_ILM)      += oct_ilm.o

RE: [PATCH v3 04/10] serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is defined

Kukjin Kim — 2013-06-18T10:31:06

Greg, Jiri, since there are other changes for this in samsung tree so would
be nice if this could be sent to upstream with others via samsung tree. If
you have any concerns, please kindly let me know.

Thanks,
- Kukjin

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Re: [PATCH v4 00/10] ARM: Exynos: Add Exynos5420 SoC support

Tomasz Figa — 2013-06-18T09:49:38

Hi Chander,

On Tuesday 18 of June 2013 11:59:12 Chander Kashyap wrote:

Looks good.

Reviewed-by: Tomasz Figa <t.figa< at >samsung.com>

Best regards,
Tomasz

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[PATCH v4 10/10] ARM: Exynos: extend soft-reset support for Exynos5420

Chander Kashyap — 2013-06-18T06:29:22

Extend the soft reset support for Exynos5420 SoC.
Reviewed-by: Tomasz Figa <t.figa< at >samsung.com>

Signed-off-by: Chander Kashyap <chander.kashyap< at >linaro.org>
---
 arch/arm/mach-exynos/common.c |   11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 6f435da..4e6c227 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
< at >< at > -330,10 +330,10 < at >< at > void exynos5_restart(char mode, const char *cmd)
 u32 val;
 void __iomem *addr;
 
-if (of_machine_is_compatible("samsung,exynos5250")) {
-val = 0x1;
-addr = EXYNOS_SWRESET;
-} else if (of_machine_is_compatible("samsung,exynos5440")) {
+val = 0x1;
+addr = EXYNOS_SWRESET;
+
+if (of_machine_is_compatible("samsung,exynos5440")) {
 u32 status;
 np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
 
< at >< at > -344,9 +344,6 < at >< at > void exynos5_restart(char mode, const char *cmd)
 val = __raw_readl(addr);
 
 val = (val & 0xffff0000) | (status & 0xffff);
-} else {
-pr_err("%s: cannot support non-DT\n", __func__);
-return;
 }
 
 __raw_writel(val, addr);

[PATCH v4 09/10] ARM: Exynos: add secondary CPU boot base location for Exynos5420

Chander Kashyap — 2013-06-18T06:29:21

The location at which the boot address is specified for secondary CPUs of
Exynos5420 is SYSRAM base + 4. Update the cpu_boot_reg function accordingly.

Signed-off-by: Chander Kashyap <chander.kashyap< at >linaro.org>
Reviewed-by: Tomasz Figa <t.figa< at >samsung.com>
---
 arch/arm/mach-exynos/platsmp.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 85ea4ca..7b4c03e 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
< at >< at > -50,6 +50,8 < at >< at > static inline void __iomem *cpu_boot_reg(int cpu)
 boot_reg = cpu_boot_reg_base();
 if (soc_is_exynos4412())
 boot_reg += 4*cpu;
+else if (soc_is_exynos5420())
+boot_reg += 4;
 return boot_reg;
 }

[PATCH v4 08/10] clocksource: exynos_mct: use (request/free)_irq calls for local timer registration

Chander Kashyap — 2013-06-18T06:29:20

Replace the (setup/remove)_irq calls for local timer registration with
(request/free)_irq calls. This generalizes the local timer registration API.
Suggested by Mark Rutland.

Signed-off-by: Chander Kashyap <chander.kashyap< at >linaro.org>
Acked-by: Mark Rutland <mark.rutland< at >arm.com>
Reviewed-by: Tomasz Figa <t.figa< at >samsung.com>
---
 drivers/clocksource/exynos_mct.c |   35 +++++++++--------------------------
 1 file changed, 9 insertions(+), 26 deletions(-)

diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 662fcc0..a704804 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
< at >< at > -400,18 +400,6 < at >< at > static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
 return IRQ_HANDLED;
 }
 
-static struct irqaction mct_tick0_event_irq = {
-.name= "mct_tick0_irq",
-.flags= IRQF_TIMER | IRQF_NOBALANCING,
-.handler= exynos4_mct_tick_isr,
-};
-
-static struct irqaction mct_tick1_event_irq = {
-.name= "mct_tick1_irq",
-.flags= IRQF_TIMER | IRQF_NOBALANCING,
-.handler= exynos4_mct_tick_isr,
-};
-
 static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
 {
 struct mct_clock_event_device *mevt;
< at >< at > -435,16 +423,15 < at >< at > static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
 
 if (mct_int_type == MCT_INT_SPI) {
-if (cpu == 0) {
-mct_tick0_event_irq.dev_id = mevt;
-evt->irq = mct_irqs[MCT_L0_IRQ];
-setup_irq(evt->irq, &mct_tick0_event_irq);
-} else {
-mct_tick1_event_irq.dev_id = mevt;
-evt->irq = mct_irqs[MCT_L1_IRQ];
-setup_irq(evt->irq, &mct_tick1_event_irq);
-irq_set_affinity(evt->irq, cpumask_of(1));
+evt->irq = mct_irqs[MCT_L0_IRQ + cpu];
+if (request_irq(evt->irq, exynos4_mct_tick_isr,
+IRQF_TIMER | IRQF_NOBALANCING,
+evt->name, mevt)) {
+pr_err("exynos-mct: cannot register IRQ %d\n",
+evt->irq);
+return -EIO;
 }
+irq_set_affinity(evt->irq, cpumask_of(cpu));
 } else {
 enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
 }
< at >< at > -454,13 +441,9 < at >< at > static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
 
 static void exynos4_local_timer_stop(struct clock_event_device *evt)
 {
-unsigned int cpu = smp_processor_id();
 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
 if (mct_int_type == MCT_INT_SPI)
-if (cpu == 0)
-remove_irq(evt->irq, &mct_tick0_event_irq);
-else
-remove_irq(evt->irq, &mct_tick1_event_irq);
+free_irq(evt->irq, this_cpu_ptr(&percpu_mct_tick));
 else
 disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
 }

[PATCH v4 05/10] ARM: Exynos: use four additional chipid bits to identify Exynos family

Chander Kashyap — 2013-06-18T06:29:17

Use chipid[27:20] bits to identify the Exynos family while setting up
the serial port during the uncompression setup. This uses four additional
bits of chipid to identify the Exynos family since this is required for
identifying Exynos5420 SoC.

Signed-off-by: Chander Kashyap <chander.kashyap< at >linaro.org>
Signed-off-by: Thomas Abraham <thomas.abraham< at >linaro.org>
Reviewed-by: Tomasz Figa <t.figa< at >samsung.com>
---
 arch/arm/mach-exynos/include/mach/uncompress.h |    7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index 2979995..1937e0f 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
< at >< at > -31,13 +31,12 < at >< at > static void arch_detect_cpu(void)
 
 /*
  * product_id is bits 31:12
- *    bits 23:20 describe the exynosX family
- *
+ * bits 23:20 describe the exynosX family
+ * bits 27:24 describe the exynosX family in exynos5420
  */
 chip_id >>= 20;
-chip_id &= 0xf;
 
-if (chip_id == 0x5)
+if ((chip_id & 0x0f) == 0x5 || (chip_id & 0xf0) == 0x50)
 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
 else
 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);

[PATCH v4 04/10] serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is defined

Chander Kashyap — 2013-06-18T06:29:16

All Exynos4/5 SoCs share a common driver data in the samsung serial
driver. Hence, let the driver data inclusion be based on ARCH_EXYNOS
instead of SOC specific definition.

Signed-off-by: Chander Kashyap <chander.kashyap< at >linaro.org>
Reviewed-by: Tomasz Figa <t.figa< at >samsung.com>
---
 drivers/tty/serial/samsung.c |    4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 2552c7f..e70d19a 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
< at >< at > -1703,9 +1703,7 < at >< at > static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
 #define S5PV210_SERIAL_DRV_DATA(kernel_ulong_t)NULL
 #endif
 
-#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) || \
-defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) || \
-defined(CONFIG_SOC_EXYNOS5440)
+#if defined(CONFIG_ARCH_EXYNOS)
 static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
 .info = &(struct s3c24xx_uart_info) {
 .name= "Samsung Exynos4 UART",

[PATCH v4 02/10] ARM: dts: list the CPU nodes for Exynos5250

Chander Kashyap — 2013-06-18T06:29:14

Instead of having to specify the number for CPUs in Exynos5250 in platsmp.c
file, let the number of CPUs be determined by having this information listed
in Exynos5250 device tree file.

Signed-off-by: Chander Kashyap <chander.kashyap< at >linaro.org>
Reviewed-by: Tomasz Figa <t.figa< at >samsung.com>
---
 arch/arm/boot/dts/exynos5250.dtsi |   16 ++++++++++++++++
 arch/arm/mach-exynos/platsmp.c    |   10 +++++++---
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 63ca03d..1aeef98 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
< at >< at > -50,6 +50,22 < at >< at >
 pinctrl3 = &pinctrl_3;
 };
 
+cpus {
+#address-cells = <1>;
+#size-cells = <0>;
+
+cpu< at >0 {
+device_type = "cpu";
+compatible = "arm,cortex-a15";
+reg = <0>;
+};
+cpu< at >1 {
+device_type = "cpu";
+compatible = "arm,cortex-a15";
+reg = <1>;
+};
+};
+
 pd_gsc: gsc-power-domain< at >0x10044000 {
 compatible = "samsung,exynos4210-pd";
 reg = <0x10044000 0x20>;
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 1a4e4e5..85ea4ca 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
< at >< at > -180,10 +180,14 < at >< at > static void __init exynos_smp_init_cpus(void)
 void __iomem *scu_base = scu_base_addr();
 unsigned int i, ncores;
 
-if (soc_is_exynos5250())
-ncores = 2;
-else
+if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+else
+/*
+ * CPU Nodes are passed thru DT and set_cpu_possible
+ * is set by "arm_dt_init_cpu_maps".
+ */
+return;
 
 /* sanity check */
 if (ncores > nr_cpu_ids) {