gmane.linux.ports.ppc.embedded

pread() and pwrite() system calls

David Laight — 2012-05-25T13:29:06

We have a system with linux 2.6.32 and the somewhat archaic
uClibc 0.9.27 (but I'm not sure the current version is
any better, and I think there are binary compatibility
if we update).

I've just discovered that pread() is 'implemented'
by using 3 lseek() system calls and read().
(the same is true for the 64bit versions).

I thought that pread() was supposed to be atomic
(so usable concurrently by multiple threads) which
means that this implementation is completely broken.

I've not looked to see what glibc does.

I can see that part of the problem is the alignment
of the 64bit value on the argument list of syscall()
(when the register save area is cast to a sycall
argument structure).
But it also looks as though the uClibc syscall()
stub can only pass 5 arguments in registers, and
pread() (with an aligned 64bit offset) requires 6.

The ucLibc source seems to be predicated by __NR_pread,
but if that were defined it would try to call
__syscall_pread() and I can't find that anywhere.

A special pread/pwrite asm stub that just copies
r7 to r0 could be used.

Would it be enough to do:
syscall_pread_pwrite:
mov 0,7
sc
blr
and handle the -ve -> errno in C?

I've seen other parts of linux pass structures to
avoid issues with excessive number of arguments.
Unlike things like NetBSD amd64 which will read
additional args off the user stack (and has per-system
call stubs in libc so doesn't lose one argument).
(I rearranged the NetBSD amd64 kernel trap frame
layout so all the args ended up adjacent...)

David

Re: module loading issue/flaw in busy memory situation?

Steffen Rumler — 2012-05-25T07:56:07

Hi,

The basic question is, has the GPR r11 a dedicated function (to point to the previous stack frame)
or is it still a volatile GPR, according to EABI definition ?
In the case of a dedicated function was assigned, the trampoline code generation in

     arch/powerpc/kernel/module_32.c

must be corrected. I'd suggest to use r12 instead of r11, in this case.

Best Regards
Steffen

Re: [PATCH v3 1/2] powerpc/PCI: move DMA & IRQ init to device_add() notification path

Benjamin Herrenschmidt — 2012-05-25T03:38:25

I'm not that worried about cardbus ... in fact I wouldn't be surprised
if it's already somewhat broken, I haven't tested it in a long time...

I'm more worried about basic functionality and expectations about when
things happen during boot vs. platform hacks, that and pseries specific
kind of hotplug which can be a bit odd.

Cheers,
Ben.

Re: [PATCH v3 1/2] powerpc/PCI: move DMA & IRQ init to device_add() notification path

Bjorn Helgaas — 2012-05-25T03:08:24

On Thu, May 24, 2012 at 9:00 PM, Benjamin Herrenschmidt
<benh< at >kernel.crashing.org> wrote:

OK.  Are you worried about cardbus in particular?

This is headed for the 3.6, not 3.5, so we should have plenty of time.
 As soon as everything for the current merge window gets merged and
-next is ready for the next batch, I'll put this in there.

Re: [PATCH v3 1/2] powerpc/PCI: move DMA & IRQ init to device_add() notification path

Benjamin Herrenschmidt — 2012-05-25T03:00:11

Hrm. That will require a good deal of testing... Unfortunately I'm out
for a few weeks getting some surgery and then recovering...

Our PCI code has ancient roots and I wouldn't be surprised if that
change breaks subtle assumptions made here or there, we'd need to test
at least on a good range of macs and ibm hotplug stuff.

Cheers,
Ben.

Re: Oops with Radeon/Uninorth on Maple

Benjamin Herrenschmidt — 2012-05-25T00:59:55

Machine Check probably means that there's a HW configuration issue,
possibly something missing in the initialization of the AGP hardware to
make it actually work.

Cheers,
Ben.

module loading issue/flaw in busy memory situation?

Wrobel Heinz-R39252 — 2012-05-24T20:05:19

Hi,

let's assume a module gets loaded into an already busy system, and the ".init.text" section with the __init function gets loaded into one memory region, and the normal ".text" section gets loaded into a totally different memory region.
Now assume that both regions are >32MB apart in addressing, so that a call from the __init .init.text function to any function in .text requires a trampoline as set up by the do_plt_call() function in arch/kernel/module*.c
So far so good for user code.

Now assume that the __init function is not trivial and will require register save/restore functions in prologue/epilogue with such calls generated by gcc, e.g., the __init function calls _rest32gpr_28_x() in the epilogue. This restore functions however is in the .text section due to the static link of the normal libs.

Now we have the __init function calling the trampoline, which is destroying r11. The trampoline is then jumping to the register restore function which relies on r11 still being intact, which it now isn't anymore.
Net result is a crash because the trampoline ABI conflicts with the register restore ABI and you get a case of garbage in leading to garbage out.

This situation has apparently occurred based on the debug results I have here.

In the general case of module development it seems unpredictable if gcc will actually call a register restore function from the __init function, or if the sections get loaded to require a trampoline, so for any non-trivial function in non-trivial memory setups, a crash would have to be expected, depending on the time of day and moon phase when the module gets loaded.

Is this a fundamental flaw in the interaction of the module section use specification and the module load mechanism with the ABI definition?

Or am I missing some incorrect setup or requirement for __init functions that I should deal with?

Thanks,

Heinz
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Re: [PATCH v6 0/3] netdev/of/phy: MDIO bus multiplexer support.

David Daney — 2012-05-24T19:19:53

You will have to debug it and find out why the device match is failing, 
then fix it.

David Daney

Re: [PATCH] gianfar:don't add FCB length to hard_header_len

Jan Ceuleers — 2012-05-24T18:03:13

Thanks Joe.

I also don't have the card; the kinds of changes I was proposing to make
are code-neutral, whose correctness I was intending to prove by a binary
compare of the before-and-after .o.

Still happy to do that taking your contribution as a starting point.

Thanks, Jan

Re: [PATCH] gianfar:don't add FCB length to hard_header_len

Jan Ceuleers — 2012-05-24T15:04:34

May I give that a go?

Re: [PATCH v6 0/3] netdev/of/phy: MDIO bus multiplexer support.

Timur Tabi — 2012-05-24T19:03:33


Ok, let me give you some background.  We actually already have MDIO muxing
code in-house, but it's different from yours.  So now I'm rewriting it to
use your design instead.

So our current code looks for "virtual MDIO nodes", and we call
mdiobus_alloc() and then of_mdiobus_register().  I think this is what I'm
missing now.

I just don't know what to do next.  Part of the problem is that I don't
have much experience with MDIO drivers.


Ok, that makes sense.


I only gave you part of the device tree.  Here's my mdio mux node:

mdio-mux {
compatible = "mdio-mux-gpio";
gpios = <&gpio0 0 0>, <&gpio0 1 0>;
mdio-parent-bus = <&mdio0>;
#address-cells = <1>;
#size-cells = <0>;

mdio< at >2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;

phy21: ethernet-phy< at >1 {
reg = <1>;
//compatible = "marvell,88e1149r", "ethernet-phy-ieee802.3-c22";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
interrupt-parent = <&gpio0>;
//interrupts = <10 8>; /* Pin 10, active low */
};
};
};
};

Re: [PATCH v6 0/3] netdev/of/phy: MDIO bus multiplexer support.

David Daney — 2012-05-24T18:50:26

Well, the MDIO bus must have an associated device tree node.

For my OCTEON code, the MDIO bus device is created as a result of the 
call to of_platform_bus_probe(), which takes care of filling in all the 
device tree nodes of the devices it finds and creates.


For starters, I do not see any compatible properties that would allow 
the proper drivers to be bound to anything.

Also I see no MDIO mux node there, so it is unclear why you are even 
asking these questions.

David Daney

Re: [PATCH v6 0/3] netdev/of/phy: MDIO bus multiplexer support.

Timur Tabi — 2012-05-24T18:28:40

I'm till have trouble understanding all this.  I'm just hacking things up
in order to help me understand it, but it's a slow and painful process.

This call in mdio_mux_init() is failing:

parent_bus = of_mdio_find_bus(parent_bus_node);

It returns NULL.  Here is my MDIO node:

fman0: fman< at >400000 {
enet0: ethernet< at >e0000 {
tbi-handle = <&tbi0>;
phy-handle = <&phy0>;
phy-connection-type = "sgmii";
};

mdio0: mdio< at >e1120 {
gpios = <&gpio0 0 0
 &gpio0 1 0>;

tbi0: tbi-phy< at >8 {
reg = <0x8>;
device_type = "tbi-phy";
};

phy0: ethernet-phy< at >1c {
reg = <0x1c>;
};
};
};

What am I missing?  What do I need to do in order to get
of_mdio_find_bus() to return a real value?

Re: [PATCH] gianfar:don't add FCB length to hard_header_len

Joe Perches — 2012-05-24T16:16:50

I have scripts that automate most of this.
I don't have the card though.

Maybe this is a starting point?
It doesn't fix most 80 column warnings.

 drivers/net/ethernet/freescale/gianfar.c         |  299 +++++++++++-----------
 drivers/net/ethernet/freescale/gianfar_ethtool.c |  131 +++++-----
 drivers/net/ethernet/freescale/gianfar_ptp.c     |    8 +-
 drivers/net/ethernet/freescale/gianfar_sysfs.c   |    2 +-
 4 files changed, 225 insertions(+), 215 deletions(-)

diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 1adb024..b1985aa 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
< at >< at > -87,10 +87,10 < at >< at >
 #include <linux/in.h>
 #include <linux/net_tstamp.h>
 
-#include <asm/io.h>
+#include <linux/io.h>
 #include <asm/reg.h>
 #include <asm/irq.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
 #include <linux/crc32.h>
< at >< at > -114,7 +114,7 < at >< at > static void gfar_timeout(struct net_device *dev);
 static int gfar_close(struct net_device *dev);
 struct sk_buff *gfar_new_skb(struct net_device *dev);
 static void gfar_new_rxbdp(struct gfar_priv_rx_q *rx_queue, struct rxbd8 *bdp,
-struct sk_buff *skb);
+   struct sk_buff *skb);
 static int gfar_set_mac_address(struct net_device *dev);
 static int gfar_change_mtu(struct net_device *dev, int new_mtu);
 static irqreturn_t gfar_error(int irq, void *dev_id);
< at >< at > -251,9 +251,9 < at >< at > static int gfar_alloc_skb_resources(struct net_device *ndev)
 
 /* Allocate memory for the buffer descriptors */
 vaddr = dma_alloc_coherent(dev,
-sizeof(struct txbd8) * priv->total_tx_ring_size +
-sizeof(struct rxbd8) * priv->total_rx_ring_size,
-&addr, GFP_KERNEL);
+   sizeof(struct txbd8) * priv->total_tx_ring_size +
+   sizeof(struct rxbd8) * priv->total_rx_ring_size,
+   &addr, GFP_KERNEL);
 if (!vaddr) {
 netif_err(priv, ifup, ndev,
   "Could not allocate buffer descriptors!\n");
< at >< at > -266,8 +266,8 < at >< at > static int gfar_alloc_skb_resources(struct net_device *ndev)
 tx_queue->tx_bd_dma_base = addr;
 tx_queue->dev = ndev;
 /* enet DMA only understands physical addresses */
-addr    += sizeof(struct txbd8) *tx_queue->tx_ring_size;
-vaddr   += sizeof(struct txbd8) *tx_queue->tx_ring_size;
+addr    += sizeof(struct txbd8) * tx_queue->tx_ring_size;
+vaddr   += sizeof(struct txbd8) * tx_queue->tx_ring_size;
 }
 
 /* Start the rx descriptor ring where the tx ring leaves off */
< at >< at > -276,15 +276,16 < at >< at > static int gfar_alloc_skb_resources(struct net_device *ndev)
 rx_queue->rx_bd_base = vaddr;
 rx_queue->rx_bd_dma_base = addr;
 rx_queue->dev = ndev;
-addr    += sizeof (struct rxbd8) * rx_queue->rx_ring_size;
-vaddr   += sizeof (struct rxbd8) * rx_queue->rx_ring_size;
+addr    += sizeof(struct rxbd8) * rx_queue->rx_ring_size;
+vaddr   += sizeof(struct rxbd8) * rx_queue->rx_ring_size;
 }
 
 /* Setup the skbuff rings */
 for (i = 0; i < priv->num_tx_queues; i++) {
 tx_queue = priv->tx_queue[i];
 tx_queue->tx_skbuff = kmalloc(sizeof(*tx_queue->tx_skbuff) *
-  tx_queue->tx_ring_size, GFP_KERNEL);
+      tx_queue->tx_ring_size,
+      GFP_KERNEL);
 if (!tx_queue->tx_skbuff) {
 netif_err(priv, ifup, ndev,
   "Could not allocate tx_skbuff\n");
< at >< at > -298,7 +299,8 < at >< at > static int gfar_alloc_skb_resources(struct net_device *ndev)
 for (i = 0; i < priv->num_rx_queues; i++) {
 rx_queue = priv->rx_queue[i];
 rx_queue->rx_skbuff = kmalloc(sizeof(*rx_queue->rx_skbuff) *
-  rx_queue->rx_ring_size, GFP_KERNEL);
+      rx_queue->rx_ring_size,
+      GFP_KERNEL);
 
 if (!rx_queue->rx_skbuff) {
 netif_err(priv, ifup, ndev,
< at >< at > -327,13 +329,13 < at >< at > static void gfar_init_tx_rx_base(struct gfar_private *priv)
 int i;
 
 baddr = &regs->tbase0;
-for(i = 0; i < priv->num_tx_queues; i++) {
+for (i = 0; i < priv->num_tx_queues; i++) {
 gfar_write(baddr, priv->tx_queue[i]->tx_bd_dma_base);
 baddr+= 2;
 }
 
 baddr = &regs->rbase0;
-for(i = 0; i < priv->num_rx_queues; i++) {
+for (i = 0; i < priv->num_rx_queues; i++) {
 gfar_write(baddr, priv->rx_queue[i]->rx_bd_dma_base);
 baddr   += 2;
 }
< at >< at > -501,7 +503,7 < at >< at > void unlock_tx_qs(struct gfar_private *priv)
 static bool gfar_is_vlan_on(struct gfar_private *priv)
 {
 return (priv->ndev->features & NETIF_F_HW_VLAN_RX) ||
-       (priv->ndev->features & NETIF_F_HW_VLAN_TX);
+(priv->ndev->features & NETIF_F_HW_VLAN_TX);
 }
 
 /* Returns 1 if incoming frames use an FCB */
< at >< at > -554,7 +556,7 < at >< at > static void enable_napi(struct gfar_private *priv)
 }
 
 static int gfar_parse_group(struct device_node *np,
-struct gfar_private *priv, const char *model)
+    struct gfar_private *priv, const char *model)
 {
 u32 *queue_mask;
 
< at >< at > -563,14 +565,14 < at >< at > static int gfar_parse_group(struct device_node *np,
 return -ENOMEM;
 
 priv->gfargrp[priv->num_grps].interruptTransmit =
-irq_of_parse_and_map(np, 0);
+irq_of_parse_and_map(np, 0);
 
 /* If we aren't the FEC we have multiple interrupts */
 if (model && strcasecmp(model, "FEC")) {
 priv->gfargrp[priv->num_grps].interruptReceive =
 irq_of_parse_and_map(np, 1);
 priv->gfargrp[priv->num_grps].interruptError =
-irq_of_parse_and_map(np,2);
+irq_of_parse_and_map(np, 2);
 if (priv->gfargrp[priv->num_grps].interruptTransmit == NO_IRQ ||
     priv->gfargrp[priv->num_grps].interruptReceive  == NO_IRQ ||
     priv->gfargrp[priv->num_grps].interruptError    == NO_IRQ)
< at >< at > -580,15 +582,15 < at >< at > static int gfar_parse_group(struct device_node *np,
 priv->gfargrp[priv->num_grps].grp_id = priv->num_grps;
 priv->gfargrp[priv->num_grps].priv = priv;
 spin_lock_init(&priv->gfargrp[priv->num_grps].grplock);
-if(priv->mode == MQ_MG_MODE) {
-queue_mask = (u32 *)of_get_property(np,
-"fsl,rx-bit-map", NULL);
+if (priv->mode == MQ_MG_MODE) {
+queue_mask = (u32 *)of_get_property(np, "fsl,rx-bit-map", NULL);
 priv->gfargrp[priv->num_grps].rx_bit_map =
-queue_mask ?  *queue_mask :(DEFAULT_MAPPING >> priv->num_grps);
-queue_mask = (u32 *)of_get_property(np,
-"fsl,tx-bit-map", NULL);
+queue_mask ? *queue_mask
+   : (DEFAULT_MAPPING >> priv->num_grps);
+queue_mask = (u32 *)of_get_property(np, "fsl,tx-bit-map", NULL);
 priv->gfargrp[priv->num_grps].tx_bit_map =
-queue_mask ? *queue_mask : (DEFAULT_MAPPING >> priv->num_grps);
+queue_mask ? *queue_mask
+   : (DEFAULT_MAPPING >> priv->num_grps);
 } else {
 priv->gfargrp[priv->num_grps].rx_bit_map = 0xFF;
 priv->gfargrp[priv->num_grps].tx_bit_map = 0xFF;
< at >< at > -673,12 +675,12 < at >< at > static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
 } else {
 priv->mode = SQ_SG_MODE;
 err = gfar_parse_group(np, priv, model);
-if(err)
+if (err)
 goto err_grp_init;
 }
 
 for (i = 0; i < priv->num_tx_queues; i++)
-       priv->tx_queue[i] = NULL;
+priv->tx_queue[i] = NULL;
 for (i = 0; i < priv->num_rx_queues; i++)
 priv->rx_queue[i] = NULL;
 
< at >< at > -781,7 +783,7 < at >< at > err_grp_init:
 }
 
 static int gfar_hwtstamp_ioctl(struct net_device *netdev,
-struct ifreq *ifr, int cmd)
+       struct ifreq *ifr, int cmd)
 {
 struct hwtstamp_config config;
 struct gfar_private *priv = netdev_priv(netdev);
< at >< at > -936,22 +938,22 < at >< at > static void gfar_detect_errata(struct gfar_private *priv)
 
 /* MPC8313 Rev 2.0 and higher; All MPC837x */
 if ((pvr == 0x80850010 && mod == 0x80b0 && rev >= 0x0020) ||
-(pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
+    (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
 priv->errata |= GFAR_ERRATA_74;
 
 /* MPC8313 and MPC837x all rev */
 if ((pvr == 0x80850010 && mod == 0x80b0) ||
-(pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
+    (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
 priv->errata |= GFAR_ERRATA_76;
 
 /* MPC8313 and MPC837x all rev */
 if ((pvr == 0x80850010 && mod == 0x80b0) ||
-(pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
+    (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0))
 priv->errata |= GFAR_ERRATA_A002;
 
 /* MPC8313 Rev < 2.0, MPC8548 rev 2.0 */
 if ((pvr == 0x80850010 && mod == 0x80b0 && rev < 0x0020) ||
-(pvr == 0x80210020 && mod == 0x8030 && rev == 0x0020))
+    (pvr == 0x80210020 && mod == 0x8030 && rev == 0x0020))
 priv->errata |= GFAR_ERRATA_12;
 
 if (priv->errata)
< at >< at > -1026,7 +1028,8 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 
 /* Register for napi ...We are registering NAPI for each grp */
 for (i = 0; i < priv->num_grps; i++)
-netif_napi_add(dev, &priv->gfargrp[i].napi, gfar_poll, GFAR_DEV_WEIGHT);
+netif_napi_add(dev, &priv->gfargrp[i].napi,
+       gfar_poll, GFAR_DEV_WEIGHT);
 
 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG |
< at >< at > -1081,7 +1084,7 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 priv->padding = 0;
 
 if (dev->features & NETIF_F_IP_CSUM ||
-priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
+    priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
 dev->hard_header_len += GMAC_FCB_LEN;
 
 /* Program the isrg regs only if number of grps > 1 */
< at >< at > -1099,11 +1102,11 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 /* Need to reverse the bit maps as  bit_map's MSB is q0
  * but, for_each_set_bit parses from right to left, which
  * basically reverses the queue numbers */
-for (i = 0; i< priv->num_grps; i++) {
+for (i = 0; i < priv->num_grps; i++) {
 priv->gfargrp[i].tx_bit_map = reverse_bitmap(
-priv->gfargrp[i].tx_bit_map, MAX_TX_QS);
+priv->gfargrp[i].tx_bit_map, MAX_TX_QS);
 priv->gfargrp[i].rx_bit_map = reverse_bitmap(
-priv->gfargrp[i].rx_bit_map, MAX_RX_QS);
+priv->gfargrp[i].rx_bit_map, MAX_RX_QS);
 }
 
 /* Calculate RSTAT, TSTAT, RQUEUE and TQUEUE values,
< at >< at > -1111,7 +1114,7 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 for (grp_idx = 0; grp_idx < priv->num_grps; grp_idx++) {
 priv->gfargrp[grp_idx].num_rx_queues = 0x0;
 for_each_set_bit(i, &priv->gfargrp[grp_idx].rx_bit_map,
-priv->num_rx_queues) {
+ priv->num_rx_queues) {
 priv->gfargrp[grp_idx].num_rx_queues++;
 priv->rx_queue[i]->grp = &priv->gfargrp[grp_idx];
 rstat = rstat | (RSTAT_CLEAR_RHALT >> i);
< at >< at > -1119,7 +1122,7 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 }
 priv->gfargrp[grp_idx].num_tx_queues = 0x0;
 for_each_set_bit(i, &priv->gfargrp[grp_idx].tx_bit_map,
-priv->num_tx_queues) {
+ priv->num_tx_queues) {
 priv->gfargrp[grp_idx].num_tx_queues++;
 priv->tx_queue[i]->grp = &priv->gfargrp[grp_idx];
 tstat = tstat | (TSTAT_CLEAR_THALT >> i);
< at >< at > -1127,7 +1130,7 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 }
 priv->gfargrp[grp_idx].rstat = rstat;
 priv->gfargrp[grp_idx].tstat = tstat;
-rstat = tstat =0;
+rstat = tstat = 0;
 }
 
 gfar_write(&regs->rqueue, rqueue);
< at >< at > -1152,7 +1155,7 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 /* always enable rx filer*/
 priv->rx_filer_enable = 1;
 /* Enable most messages by default */
-priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
+priv->msg_enable = (NETIF_MSG_IFUP << 1) - 1;
 
 /* Carrier starts down, phylib will bring it up */
 netif_carrier_off(dev);
< at >< at > -1165,7 +1168,7 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 }
 
 device_init_wakeup(&dev->dev,
-priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
+   priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
 
 /* fill out IRQ number and name fields */
 for (i = 0; i < priv->num_grps; i++) {
< at >< at > -1176,8 +1179,9 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 dev->name, "_g", '0' + i, "_rx");
 sprintf(priv->gfargrp[i].int_name_er, "%s%s%c%s",
 dev->name, "_g", '0' + i, "_er");
-} else
+} else {
 strcpy(priv->gfargrp[i].int_name_tx, dev->name);
+}
 }
 
 /* Initialize the filer table */
< at >< at > -1195,7 +1199,7 < at >< at > static int gfar_probe(struct platform_device *ofdev)
 for (i = 0; i < priv->num_rx_queues; i++)
 netdev_info(dev, "RX BD ring size for Q[%d]: %d\n",
     i, priv->rx_queue[i]->rx_ring_size);
-for(i = 0; i < priv->num_tx_queues; i++)
+for (i = 0; i < priv->num_tx_queues; i++)
 netdev_info(dev, "TX BD ring size for Q[%d]: %d\n",
     i, priv->tx_queue[i]->tx_ring_size);
 
< at >< at > -1355,7 +1359,7 < at >< at > static int gfar_restore(struct device *dev)
 return 0;
 }
 
-static struct dev_pm_ops gfar_pm_ops = {
+static const struct dev_pm_ops gfar_pm_ops = {
 .suspend = gfar_suspend,
 .resume = gfar_resume,
 .freeze = gfar_suspend,
< at >< at > -1393,9 +1397,9 < at >< at > static phy_interface_t gfar_get_interface(struct net_device *dev)
 }
 
 if (ecntrl & ECNTRL_REDUCED_MODE) {
-if (ecntrl & ECNTRL_REDUCED_MII_MODE)
+if (ecntrl & ECNTRL_REDUCED_MII_MODE) {
 return PHY_INTERFACE_MODE_RMII;
-else {
+} else {
 phy_interface_t interface = priv->interface;
 
 /*
< at >< at > -1468,8 +1472,7 < at >< at > static void gfar_configure_serdes(struct net_device *dev)
 struct phy_device *tbiphy;
 
 if (!priv->tbi_node) {
-dev_warn(&dev->dev, "error: SGMII mode requires that the "
-    "device tree specify a tbi-handle\n");
+dev_warn(&dev->dev, "error: SGMII mode requires that the device tree specify a tbi-handle\n");
 return;
 }
 
< at >< at > -1492,11 +1495,11 < at >< at > static void gfar_configure_serdes(struct net_device *dev)
 phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
 
 phy_write(tbiphy, MII_ADVERTISE,
-ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
-ADVERTISE_1000XPSE_ASYM);
+  ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
+  ADVERTISE_1000XPSE_ASYM);
 
 phy_write(tbiphy, MII_BMCR, BMCR_ANENABLE |
-BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
+  BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
 }
 
 static void init_registers(struct net_device *dev)
< at >< at > -1536,7 +1539,7 < at >< at > static void init_registers(struct net_device *dev)
 
 /* Zero out the rmon mib registers if it has them */
 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
-memset_io(&(regs->rmon), 0, sizeof (struct rmon_mib));
+memset_io(&(regs->rmon), 0, sizeof(struct rmon_mib));
 
 /* Mask off the CAM interrupts */
 gfar_write(&regs->rmon.cam1, 0xffffffff);
< at >< at > -1602,8 +1605,9 < at >< at > static void gfar_halt_nodisable(struct net_device *dev)
 gfar_write(&regs->dmactrl, tempval);
 
 do {
-ret = spin_event_timeout(((gfar_read(&regs->ievent) &
- (IEVENT_GRSC | IEVENT_GTSC)) ==
+ret = spin_event_timeout(
+((gfar_read(&regs->ievent) &
+  (IEVENT_GRSC | IEVENT_GTSC)) ==
  (IEVENT_GRSC | IEVENT_GTSC)), 1000000, 0);
 if (!ret && !(gfar_read(&regs->ievent) & IEVENT_GRSC))
 ret = __gfar_is_rx_idle(priv);
< at >< at > -1660,7 +1664,7 < at >< at > void stop_gfar(struct net_device *dev)
 } else {
 for (i = 0; i < priv->num_grps; i++)
 free_irq(priv->gfargrp[i].interruptTransmit,
-&priv->gfargrp[i]);
+ &priv->gfargrp[i]);
 }
 
 free_skb_resources(priv);
< at >< at > -1679,13 +1683,13 < at >< at > static void free_skb_tx_queue(struct gfar_priv_tx_q *tx_queue)
 continue;
 
 dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
-txbdp->length, DMA_TO_DEVICE);
+ txbdp->length, DMA_TO_DEVICE);
 txbdp->lstatus = 0;
 for (j = 0; j < skb_shinfo(tx_queue->tx_skbuff[i])->nr_frags;
-j++) {
+     j++) {
 txbdp++;
 dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
-txbdp->length, DMA_TO_DEVICE);
+       txbdp->length, DMA_TO_DEVICE);
 }
 txbdp++;
 dev_kfree_skb_any(tx_queue->tx_skbuff[i]);
< at >< at > -1705,8 +1709,8 < at >< at > static void free_skb_rx_queue(struct gfar_priv_rx_q *rx_queue)
 for (i = 0; i < rx_queue->rx_ring_size; i++) {
 if (rx_queue->rx_skbuff[i]) {
 dma_unmap_single(&priv->ofdev->dev,
-rxbdp->bufPtr, priv->rx_buffer_size,
-DMA_FROM_DEVICE);
+ rxbdp->bufPtr, priv->rx_buffer_size,
+ DMA_FROM_DEVICE);
 dev_kfree_skb_any(rx_queue->rx_skbuff[i]);
 rx_queue->rx_skbuff[i] = NULL;
 }
< at >< at > -1730,22 +1734,22 < at >< at > static void free_skb_resources(struct gfar_private *priv)
 struct netdev_queue *txq;
 tx_queue = priv->tx_queue[i];
 txq = netdev_get_tx_queue(tx_queue->dev, tx_queue->qindex);
-if(tx_queue->tx_skbuff)
+if (tx_queue->tx_skbuff)
 free_skb_tx_queue(tx_queue);
 netdev_tx_reset_queue(txq);
 }
 
 for (i = 0; i < priv->num_rx_queues; i++) {
 rx_queue = priv->rx_queue[i];
-if(rx_queue->rx_skbuff)
+if (rx_queue->rx_skbuff)
 free_skb_rx_queue(rx_queue);
 }
 
 dma_free_coherent(&priv->ofdev->dev,
-sizeof(struct txbd8) * priv->total_tx_ring_size +
-sizeof(struct rxbd8) * priv->total_rx_ring_size,
-priv->tx_queue[0]->tx_bd_base,
-priv->tx_queue[0]->tx_bd_dma_base);
+  sizeof(struct txbd8) * priv->total_tx_ring_size +
+  sizeof(struct rxbd8) * priv->total_rx_ring_size,
+  priv->tx_queue[0]->tx_bd_base,
+  priv->tx_queue[0]->tx_bd_dma_base);
 skb_queue_purge(&priv->rx_recycle);
 }
 
< at >< at > -1784,7 +1788,7 < at >< at > void gfar_start(struct net_device *dev)
 }
 
 void gfar_configure_coalescing(struct gfar_private *priv,
-unsigned long tx_mask, unsigned long rx_mask)
+       unsigned long tx_mask, unsigned long rx_mask)
 {
 struct gfar __iomem *regs = priv->gfargrp[0].regs;
 u32 __iomem *baddr;
< at >< at > -1794,11 +1798,11 < at >< at > void gfar_configure_coalescing(struct gfar_private *priv,
  * multiple queues, there's only single reg to program
  */
 gfar_write(&regs->txic, 0);
-if(likely(priv->tx_queue[0]->txcoalescing))
+if (likely(priv->tx_queue[0]->txcoalescing))
 gfar_write(&regs->txic, priv->tx_queue[0]->txic);
 
 gfar_write(&regs->rxic, 0);
-if(unlikely(priv->rx_queue[0]->rxcoalescing))
+if (unlikely(priv->rx_queue[0]->rxcoalescing))
 gfar_write(&regs->rxic, priv->rx_queue[0]->rxic);
 
 if (priv->mode == MQ_MG_MODE) {
< at >< at > -1831,30 +1835,34 < at >< at > static int register_grp_irqs(struct gfar_priv_grp *grp)
 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
 /* Install our interrupt handlers for Error,
  * Transmit, and Receive */
-if ((err = request_irq(grp->interruptError, gfar_error, 0,
-grp->int_name_er,grp)) < 0) {
+err = request_irq(grp->interruptError, gfar_error, 0,
+  grp->int_name_er, grp);
+if (err < 0) {
 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
   grp->interruptError);
 
 goto err_irq_fail;
 }
 
-if ((err = request_irq(grp->interruptTransmit, gfar_transmit,
-0, grp->int_name_tx, grp)) < 0) {
+err = request_irq(grp->interruptTransmit, gfar_transmit,
+  0, grp->int_name_tx, grp);
+if (err < 0) {
 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
   grp->interruptTransmit);
 goto tx_irq_fail;
 }
 
-if ((err = request_irq(grp->interruptReceive, gfar_receive, 0,
-grp->int_name_rx, grp)) < 0) {
+err = request_irq(grp->interruptReceive, gfar_receive, 0,
+  grp->int_name_rx, grp);
+if (err < 0) {
 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
   grp->interruptReceive);
 goto rx_irq_fail;
 }
 } else {
-if ((err = request_irq(grp->interruptTransmit, gfar_interrupt, 0,
-grp->int_name_tx, grp)) < 0) {
+err = request_irq(grp->interruptTransmit, gfar_interrupt, 0,
+  grp->int_name_tx, grp);
+if (err < 0) {
 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
   grp->interruptTransmit);
 goto err_irq_fail;
< at >< at > -1880,11 +1888,11 < at >< at > int startup_gfar(struct net_device *ndev)
 int err, i, j;
 
 for (i = 0; i < priv->num_grps; i++) {
-regs= priv->gfargrp[i].regs;
+regs = priv->gfargrp[i].regs;
 gfar_write(&regs->imask, IMASK_INIT_CLEAR);
 }
 
-regs= priv->gfargrp[0].regs;
+regs = priv->gfargrp[0].regs;
 err = gfar_alloc_skb_resources(ndev);
 if (err)
 return err;
< at >< at > -1960,7 +1968,7 < at >< at > static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
 }
 
 static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb,
-int fcb_length)
+    int fcb_length)
 {
 u8 flags = 0;
 
< at >< at > -1975,8 +1983,9 < at >< at > static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb,
 if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
 flags |= TXFCB_UDP;
 fcb->phcs = udp_hdr(skb)->check;
-} else
+} else {
 fcb->phcs = tcp_hdr(skb)->check;
+}
 
 /* l3os is the distance between the start of the
  * frame (skb->data) and the start of the IP hdr.
< at >< at > -1988,14 +1997,14 < at >< at > static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb,
 fcb->flags = flags;
 }
 
-void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
+inline void gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
 {
 fcb->flags |= TXFCB_VLN;
 fcb->vlctl = vlan_tx_tag_get(skb);
 }
 
 static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
-       struct txbd8 *base, int ring_size)
+      struct txbd8 *base, int ring_size)
 {
 struct txbd8 *new_bd = bdp + stride;
 
< at >< at > -2003,7 +2012,7 < at >< at > static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
 }
 
 static inline struct txbd8 *next_txbd(struct txbd8 *bdp, struct txbd8 *base,
-int ring_size)
+      int ring_size)
 {
 return skip_txbd(bdp, 1, base, ring_size);
 }
< at >< at > -2029,8 +2038,8 < at >< at > static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
  * before start of transmission.
  */
 if (unlikely(gfar_has_errata(priv, GFAR_ERRATA_76) &&
-skb->ip_summed == CHECKSUM_PARTIAL &&
-skb->len > 2500)) {
+     skb->ip_summed == CHECKSUM_PARTIAL &&
+     skb->len > 2500)) {
 int ret;
 
 ret = skb_checksum_help(skb);
< at >< at > -2046,16 +2055,16 < at >< at > static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
 /* check if time stamp should be generated */
 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
-priv->hwts_tx_en)) {
+     priv->hwts_tx_en)) {
 do_tstamp = 1;
 fcb_length = GMAC_FCB_LEN + GMAC_TXPAL_LEN;
 }
 
 /* make space for additional header when fcb is needed */
 if (((skb->ip_summed == CHECKSUM_PARTIAL) ||
-vlan_tx_tag_present(skb) ||
-unlikely(do_tstamp)) &&
-(skb_headroom(skb) < fcb_length)) {
+     vlan_tx_tag_present(skb) ||
+     unlikely(do_tstamp)) &&
+    (skb_headroom(skb) < fcb_length)) {
 struct sk_buff *skb_new;
 
 skb_new = skb_realloc_headroom(skb, fcb_length);
< at >< at > -2099,12 +2108,12 < at >< at > static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
 /* Time stamp insertion requires one additional TxBD */
 if (unlikely(do_tstamp))
 txbdp_tstamp = txbdp = next_txbd(txbdp, base,
-tx_queue->tx_ring_size);
+ tx_queue->tx_ring_size);
 
 if (nr_frags == 0) {
 if (unlikely(do_tstamp))
 txbdp_tstamp->lstatus |= BD_LFLAG(TXBD_LAST |
-TXBD_INTERRUPT);
+  TXBD_INTERRUPT);
 else
 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
 } else {
< at >< at > -2146,8 +2155,8 < at >< at > static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
 if (CHECKSUM_PARTIAL == skb->ip_summed) {
 fcb = gfar_add_fcb(skb);
 /* as specified by errata */
-if (unlikely(gfar_has_errata(priv, GFAR_ERRATA_12)
-     && ((unsigned long)fcb % 0x20) > 0x18)) {
+if (unlikely(gfar_has_errata(priv, GFAR_ERRATA_12) &&
+     ((unsigned long)fcb % 0x20) > 0x18)) {
 __skb_pull(skb, GMAC_FCB_LEN);
 skb_checksum_help(skb);
 } else {
< at >< at > -2175,7 +2184,7 < at >< at > static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
 }
 
 txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
-skb_headlen(skb), DMA_TO_DEVICE);
+     skb_headlen(skb), DMA_TO_DEVICE);
 
 /*
  * If time stamping is requested one additional TxBD must be set up. The
< at >< at > -2186,7 +2195,7 < at >< at > static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
 if (unlikely(do_tstamp)) {
 txbdp_tstamp->bufPtr = txbdp_start->bufPtr + fcb_length;
 txbdp_tstamp->lstatus |= BD_LFLAG(TXBD_READY) |
-(skb_headlen(skb) - fcb_length);
+(skb_headlen(skb) - fcb_length);
 lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | GMAC_FCB_LEN;
 } else {
 lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
< at >< at > -2361,8 +2370,8 < at >< at > static int gfar_change_mtu(struct net_device *dev, int new_mtu)
 frame_size += priv->padding;
 
 tempsize =
-    (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
-    INCREMENTAL_BUFFER_SIZE;
+(frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
+INCREMENTAL_BUFFER_SIZE;
 
 /* Only stop and start the controller if it isn't already
  * stopped, and we changed something */
< at >< at > -2382,7 +2391,7 < at >< at > static int gfar_change_mtu(struct net_device *dev, int new_mtu)
 tempval = gfar_read(&regs->maccfg2);
 
 if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE ||
-gfar_has_errata(priv, GFAR_ERRATA_74))
+    gfar_has_errata(priv, GFAR_ERRATA_74))
 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
 else
 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
< at >< at > -2403,7 +2412,7 < at >< at > static int gfar_change_mtu(struct net_device *dev, int new_mtu)
 static void gfar_reset_task(struct work_struct *work)
 {
 struct gfar_private *priv = container_of(work, struct gfar_private,
-reset_task);
+ reset_task);
 struct net_device *dev = priv->ndev;
 
 if (dev->flags & IFF_UP) {
< at >< at > -2430,7 +2439,7 < at >< at > static void gfar_align_skb(struct sk_buff *skb)
  * as many bytes as needed to align the data properly
  */
 skb_reserve(skb, RXBUF_ALIGNMENT -
-(((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1)));
+    (((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1)));
 }
 
 /* Interrupt Handler for Transmit complete */
< at >< at > -2479,21 +2488,22 < at >< at > static int gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue)
 
 /* Only clean completed frames */
 if ((lstatus & BD_LFLAG(TXBD_READY)) &&
-(lstatus & BD_LENGTH_MASK))
+    (lstatus & BD_LENGTH_MASK))
 break;
 
 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)) {
 next = next_txbd(bdp, base, tx_ring_size);
 buflen = next->length + GMAC_FCB_LEN + GMAC_TXPAL_LEN;
-} else
+} else {
 buflen = bdp->length;
+}
 
 dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
-buflen, DMA_TO_DEVICE);
+ buflen, DMA_TO_DEVICE);
 
 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)) {
 struct skb_shared_hwtstamps shhwtstamps;
-u64 *ns = (u64*) (((u32)skb->data + 0x10) & ~0x7);
+u64 *ns = (u64 *)(((u32)skb->data + 0x10) & ~0x7);
 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
 shhwtstamps.hwtstamp = ns_to_ktime(*ns);
 skb_pull(skb, GMAC_FCB_LEN + GMAC_TXPAL_LEN);
< at >< at > -2507,9 +2517,9 < at >< at > static int gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue)
 
 for (i = 0; i < frags; i++) {
 dma_unmap_page(&priv->ofdev->dev,
-bdp->bufPtr,
-bdp->length,
-DMA_TO_DEVICE);
+       bdp->bufPtr,
+       bdp->length,
+       DMA_TO_DEVICE);
 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
 bdp = next_txbd(bdp, base, tx_ring_size);
 }
< at >< at > -2521,12 +2531,13 < at >< at > static int gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue)
  * we add this skb back into the pool, if it's the right size
  */
 if (skb_queue_len(&priv->rx_recycle) < rx_queue->rx_ring_size &&
-skb_recycle_check(skb, priv->rx_buffer_size +
-RXBUF_ALIGNMENT)) {
+    skb_recycle_check(skb, priv->rx_buffer_size +
+      RXBUF_ALIGNMENT)) {
 gfar_align_skb(skb);
 skb_queue_head(&priv->rx_recycle, skb);
-} else
+} else {
 dev_kfree_skb_any(skb);
+}
 
 tx_queue->tx_skbuff[skb_dirtytx] = NULL;
 
< at >< at > -2579,7 +2590,7 < at >< at > static irqreturn_t gfar_transmit(int irq, void *grp_id)
 }
 
 static void gfar_new_rxbdp(struct gfar_priv_rx_q *rx_queue, struct rxbd8 *bdp,
-struct sk_buff *skb)
+   struct sk_buff *skb)
 {
 struct net_device *dev = rx_queue->dev;
 struct gfar_private *priv = netdev_priv(dev);
< at >< at > -2590,7 +2601,7 < at >< at > static void gfar_new_rxbdp(struct gfar_priv_rx_q *rx_queue, struct rxbd8 *bdp,
 gfar_init_rxbdp(rx_queue, bdp, buf);
 }
 
-static struct sk_buff * gfar_alloc_skb(struct net_device *dev)
+static struct sk_buff *gfar_alloc_skb(struct net_device *dev)
 {
 struct gfar_private *priv = netdev_priv(dev);
 struct sk_buff *skb = NULL;
< at >< at > -2604,7 +2615,7 < at >< at > static struct sk_buff * gfar_alloc_skb(struct net_device *dev)
 return skb;
 }
 
-struct sk_buff * gfar_new_skb(struct net_device *dev)
+struct sk_buff *gfar_new_skb(struct net_device *dev)
 {
 struct gfar_private *priv = netdev_priv(dev);
 struct sk_buff *skb = NULL;
< at >< at > -2695,7 +2706,7 < at >< at > static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
 /* Get receive timestamp from the skb */
 if (priv->hwts_rx_en) {
 struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
-u64 *ns = (u64 *) skb->data;
+u64 *ns = (u64 *)skb->data;
 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
 shhwtstamps->hwtstamp = ns_to_ktime(*ns);
 }
< at >< at > -2757,15 +2768,15 < at >< at > int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)
 skb = rx_queue->rx_skbuff[rx_queue->skb_currx];
 
 dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
-priv->rx_buffer_size, DMA_FROM_DEVICE);
+ priv->rx_buffer_size, DMA_FROM_DEVICE);
 
 if (unlikely(!(bdp->status & RXBD_ERR) &&
-bdp->length > priv->rx_buffer_size))
+     bdp->length > priv->rx_buffer_size))
 bdp->status = RXBD_LARGE;
 
 /* We drop the frame if we failed to allocate a new buffer */
 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
- bdp->status & RXBD_ERR)) {
+     bdp->status & RXBD_ERR)) {
 count_errors(bdp->status, dev);
 
 if (unlikely(!newskb))
< at >< at > -2784,7 +2795,7 < at >< at > int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)
 rx_queue->stats.rx_bytes += pkt_len;
 skb_record_rx_queue(skb, rx_queue->qindex);
 gfar_process_frame(dev, skb, amount_pull,
-&rx_queue->grp->napi);
+   &rx_queue->grp->napi);
 
 } else {
 netif_warn(priv, rx_err, dev, "Missing skb!\n");
< at >< at > -2804,8 +2815,8 < at >< at > int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)
 
 /* update to point at the next skb */
 rx_queue->skb_currx =
-    (rx_queue->skb_currx + 1) &
-    RX_RING_MOD_MASK(rx_queue->rx_ring_size);
+(rx_queue->skb_currx + 1) &
+RX_RING_MOD_MASK(rx_queue->rx_ring_size);
 }
 
 /* Update the current rxbd pointer to be the next one */
< at >< at > -2816,8 +2827,8 < at >< at > int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)
 
 static int gfar_poll(struct napi_struct *napi, int budget)
 {
-struct gfar_priv_grp *gfargrp = container_of(napi,
-struct gfar_priv_grp, napi);
+struct gfar_priv_grp *gfargrp =
+container_of(napi, struct gfar_priv_grp, napi);
 struct gfar_private *priv = gfargrp->priv;
 struct gfar __iomem *regs = gfargrp->regs;
 struct gfar_priv_tx_q *tx_queue = NULL;
< at >< at > -2847,11 +2858,11 < at >< at > static int gfar_poll(struct napi_struct *napi, int budget)
 
 tx_cleaned += gfar_clean_tx_ring(tx_queue);
 rx_cleaned_per_queue = gfar_clean_rx_ring(rx_queue,
-budget_per_queue);
+  budget_per_queue);
 rx_cleaned += rx_cleaned_per_queue;
-if(rx_cleaned_per_queue < budget_per_queue) {
-left_over_budget = left_over_budget +
-(budget_per_queue - rx_cleaned_per_queue);
+if (rx_cleaned_per_queue < budget_per_queue) {
+left_over_budget += (budget_per_queue -
+     rx_cleaned_per_queue);
 set_bit(i, &serviced_queues);
 num_queues--;
 }
< at >< at > -2871,8 +2882,8 < at >< at > static int gfar_poll(struct napi_struct *napi, int budget)
 
 /* If we are coalescing interrupts, update the timer */
 /* Otherwise, clear it */
-gfar_configure_coalescing(priv,
-gfargrp->rx_bit_map, gfargrp->tx_bit_map);
+gfar_configure_coalescing(priv, gfargrp->rx_bit_map,
+  gfargrp->tx_bit_map);
 }
 
 return rx_cleaned;
< at >< at > -2896,7 +2907,7 < at >< at > static void gfar_netpoll(struct net_device *dev)
 disable_irq(priv->gfargrp[i].interruptReceive);
 disable_irq(priv->gfargrp[i].interruptError);
 gfar_interrupt(priv->gfargrp[i].interruptTransmit,
-&priv->gfargrp[i]);
+       &priv->gfargrp[i]);
 enable_irq(priv->gfargrp[i].interruptError);
 enable_irq(priv->gfargrp[i].interruptReceive);
 enable_irq(priv->gfargrp[i].interruptTransmit);
< at >< at > -2905,7 +2916,7 < at >< at > static void gfar_netpoll(struct net_device *dev)
 for (i = 0; i < priv->num_grps; i++) {
 disable_irq(priv->gfargrp[i].interruptTransmit);
 gfar_interrupt(priv->gfargrp[i].interruptTransmit,
-&priv->gfargrp[i]);
+       &priv->gfargrp[i]);
 enable_irq(priv->gfargrp[i].interruptTransmit);
 }
 }
< at >< at > -2972,15 +2983,15 < at >< at > static void adjust_link(struct net_device *dev)
 new_state = 1;
 switch (phydev->speed) {
 case 1000:
-tempval =
-    ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
+tempval = ((tempval & ~(MACCFG2_IF)) |
+   MACCFG2_GMII);
 
 ecntrl &= ~(ECNTRL_R100);
 break;
 case 100:
 case 10:
-tempval =
-    ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
+tempval = ((tempval & ~(MACCFG2_IF)) |
+   MACCFG2_MII);
 
 /* Reduced mode distinguishes
  * between 10 and 100 */
< at >< at > -3102,8 +3113,9 < at >< at > static void gfar_set_multi(struct net_device *dev)
 if (idx < em_num) {
 gfar_set_mac_for_addr(dev, idx, ha->addr);
 idx++;
-} else
+} else {
 gfar_set_hash_for_addr(dev, ha->addr);
+}
 }
 }
 }
< at >< at > -3116,7 +3128,7 < at >< at > static void gfar_clear_exact_match(struct net_device *dev)
 int idx;
 static const u8 zero_arr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
 
-for(idx = 1;idx < GFAR_EM_NUM + 1;idx++)
+for (idx = 1; idx < GFAR_EM_NUM + 1; idx++)
 gfar_set_mac_for_addr(dev, idx, zero_arr);
 }
 
< at >< at > -3169,11 +3181,11 < at >< at > static void gfar_set_mac_for_addr(struct net_device *dev, int num,
 for (idx = 0; idx < ETH_ALEN; idx++)
 tmpbuf[ETH_ALEN - 1 - idx] = addr[idx];
 
-gfar_write(macptr, *((u32 *) (tmpbuf)));
+gfar_write(macptr, *((u32 *)(tmpbuf)));
 
-tempval = *((u32 *) (tmpbuf + 4));
+tempval = *((u32 *)(tmpbuf + 4));
 
-gfar_write(macptr+1, tempval);
+gfar_write(macptr + 1, tempval);
 }
 
 /* GFAR error interrupt handler */
< at >< at > -3181,7 +3193,7 < at >< at > static irqreturn_t gfar_error(int irq, void *grp_id)
 {
 struct gfar_priv_grp *gfargrp = grp_id;
 struct gfar __iomem *regs = gfargrp->regs;
-struct gfar_private *priv= gfargrp->priv;
+struct gfar_private *priv = gfargrp->priv;
 struct net_device *dev = priv->ndev;
 
 /* Save ievent for future reference */
< at >< at > -3256,8 +3268,7 < at >< at > static irqreturn_t gfar_error(int irq, void *grp_id)
 return IRQ_HANDLED;
 }
 
-static struct of_device_id gfar_match[] =
-{
+static struct of_device_id gfar_match[] = {
 {
 .type = "network",
 .compatible = "gianfar",
diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c b/drivers/net/ethernet/freescale/gianfar_ethtool.c
index 8a02557..26a2fa2 100644
--- a/drivers/net/ethernet/freescale/gianfar_ethtool.c
+++ b/drivers/net/ethernet/freescale/gianfar_ethtool.c
< at >< at > -31,12 +31,12 < at >< at >
 #include <linux/spinlock.h>
 #include <linux/mm.h>
 
-#include <asm/io.h>
+#include <linux/io.h>
 #include <asm/irq.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 #include <linux/module.h>
 #include <linux/crc32.h>
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/ethtool.h>
 #include <linux/mii.h>
 #include <linux/phy.h>
< at >< at > -51,8 +51,8 < at >< at > extern int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit
 #define GFAR_MAX_COAL_USECS 0xffff
 #define GFAR_MAX_COAL_FRAMES 0xff
 static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
-     u64 * buf);
-static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf);
+     u64 *buf);
+static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 *buf);
 static int gfar_gcoalesce(struct net_device *dev, struct ethtool_coalesce *cvals);
 static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals);
 static void gfar_gringparam(struct net_device *dev, struct ethtool_ringparam *rvals);
< at >< at > -122,7 +122,7 < at >< at > static const char stat_gstrings[][ETH_GSTRING_LEN] = {
 
 /* Fill in a buffer with the strings which correspond to the
  * stats */
-static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf)
+static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 *buf)
 {
 struct gfar_private *priv = netdev_priv(dev);
 
< at >< at > -130,23 +130,23 < at >< at > static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf)
 memcpy(buf, stat_gstrings, GFAR_STATS_LEN * ETH_GSTRING_LEN);
 else
 memcpy(buf, stat_gstrings,
-GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN);
+       GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN);
 }
 
 /* Fill in an array of 64-bit statistics from various sources.
  * This array will be appended to the end of the ethtool_stats
  * structure, and returned to user space
  */
-static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, u64 * buf)
+static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, u64 *buf)
 {
 int i;
 struct gfar_private *priv = netdev_priv(dev);
 struct gfar __iomem *regs = priv->gfargrp[0].regs;
-u64 *extra = (u64 *) & priv->extra_stats;
+u64 *extra = (u64 *)&priv->extra_stats;
 
 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
-u32 __iomem *rmon = (u32 __iomem *) &regs->rmon;
-struct gfar_stats *stats = (struct gfar_stats *) buf;
+u32 __iomem *rmon = (u32 __iomem *)&regs->rmon;
+struct gfar_stats *stats = (struct gfar_stats *)buf;
 
 for (i = 0; i < GFAR_RMON_LEN; i++)
 stats->rmon[i] = (u64) gfar_read(&rmon[i]);
< at >< at > -174,8 +174,8 < at >< at > static int gfar_sset_count(struct net_device *dev, int sset)
 }
 
 /* Fills in the drvinfo structure with some basic info */
-static void gfar_gdrvinfo(struct net_device *dev, struct
-      ethtool_drvinfo *drvinfo)
+static void gfar_gdrvinfo(struct net_device *dev,
+  struct ethtool_drvinfo *drvinfo)
 {
 strncpy(drvinfo->driver, DRV_NAME, GFAR_INFOSTR_LEN);
 strncpy(drvinfo->version, gfar_driver_version, GFAR_INFOSTR_LEN);
< at >< at > -222,7 +222,7 < at >< at > static int gfar_gsettings(struct net_device *dev, struct ethtool_cmd *cmd)
 /* Return the length of the register structure */
 static int gfar_reglen(struct net_device *dev)
 {
-return sizeof (struct gfar);
+return sizeof(struct gfar);
 }
 
 /* Return a dump of the GFAR register space */
< at >< at > -230,10 +230,10 < at >< at > static void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs, voi
 {
 int i;
 struct gfar_private *priv = netdev_priv(dev);
-u32 __iomem *theregs = (u32 __iomem *) priv->gfargrp[0].regs;
-u32 *buf = (u32 *) regbuf;
+u32 __iomem *theregs = (u32 __iomem *)priv->gfargrp[0].regs;
+u32 *buf = (u32 *)regbuf;
 
-for (i = 0; i < sizeof (struct gfar) / sizeof (u32); i++)
+for (i = 0; i < sizeof(struct gfar) / sizeof(u32); i++)
 buf[i] = gfar_read(&theregs[i]);
 }
 
< at >< at > -499,7 +499,7 < at >< at > static int gfar_sringparam(struct net_device *dev, struct ethtool_ringparam *rva
 
 for (i = 0; i < priv->num_rx_queues; i++)
 gfar_clean_rx_ring(priv->rx_queue[i],
-priv->rx_queue[i]->rx_ring_size);
+   priv->rx_queue[i]->rx_ring_size);
 
 /* Now we take down the rings to rebuild them */
 stop_gfar(dev);
< at >< at > -548,7 +548,7 < at >< at > int gfar_set_features(struct net_device *dev, netdev_features_t features)
 
 for (i = 0; i < priv->num_rx_queues; i++)
 gfar_clean_rx_ring(priv->rx_queue[i],
-priv->rx_queue[i]->rx_ring_size);
+   priv->rx_queue[i]->rx_ring_size);
 
 /* Now we take down the rings to rebuild them */
 stop_gfar(dev);
< at >< at > -608,12 +608,12 < at >< at > static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 }
 #endif
 
-static void ethflow_to_filer_rules (struct gfar_private *priv, u64 ethflow)
+static void ethflow_to_filer_rules(struct gfar_private *priv, u64 ethflow)
 {
 u32 fcr = 0x0, fpr = FPR_FILER_MASK;
 
 if (ethflow & RXH_L2DA) {
-fcr = RQFCR_PID_DAH |RQFCR_CMP_NOMATCH |
+fcr = RQFCR_PID_DAH | RQFCR_CMP_NOMATCH |
 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0;
 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
< at >< at > -705,16 +705,16 < at >< at > static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow, u
 
 switch (class) {
 case TCP_V4_FLOW:
-cmp_rqfpr = RQFPR_IPV4 |RQFPR_TCP;
+cmp_rqfpr = RQFPR_IPV4 | RQFPR_TCP;
 break;
 case UDP_V4_FLOW:
-cmp_rqfpr = RQFPR_IPV4 |RQFPR_UDP;
+cmp_rqfpr = RQFPR_IPV4 | RQFPR_UDP;
 break;
 case TCP_V6_FLOW:
-cmp_rqfpr = RQFPR_IPV6 |RQFPR_TCP;
+cmp_rqfpr = RQFPR_IPV6 | RQFPR_TCP;
 break;
 case UDP_V6_FLOW:
-cmp_rqfpr = RQFPR_IPV6 |RQFPR_UDP;
+cmp_rqfpr = RQFPR_IPV6 | RQFPR_UDP;
 break;
 default:
 pr_err("Right now this class is not supported\n");
< at >< at > -727,7 +727,7 < at >< at > static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow, u
 local_rqfcr[j] = priv->ftp_rqfcr[i];
 j--;
 if ((priv->ftp_rqfcr[i] == (RQFCR_PID_PARSE |
-RQFCR_CLE |RQFCR_AND)) &&
+RQFCR_CLE | RQFCR_AND)) &&
 (priv->ftp_rqfpr[i] == cmp_rqfpr))
 break;
 }
< at >< at > -743,17 +743,17 < at >< at > static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow, u
  */
 for (l = i+1; l < MAX_FILER_IDX; l++) {
 if ((priv->ftp_rqfcr[l] & RQFCR_CLE) &&
-!(priv->ftp_rqfcr[l] & RQFCR_AND)) {
+    !(priv->ftp_rqfcr[l] & RQFCR_AND)) {
 priv->ftp_rqfcr[l] = RQFCR_CLE | RQFCR_CMP_EXACT |
 RQFCR_HASHTBL_0 | RQFCR_PID_MASK;
 priv->ftp_rqfpr[l] = FPR_FILER_MASK;
 gfar_write_filer(priv, l, priv->ftp_rqfcr[l],
-priv->ftp_rqfpr[l]);
+ priv->ftp_rqfpr[l]);
 break;
 }
 
 if (!(priv->ftp_rqfcr[l] & RQFCR_CLE) &&
-(priv->ftp_rqfcr[l] & RQFCR_AND))
+    (priv->ftp_rqfcr[l] & RQFCR_AND))
 continue;
 else {
 local_rqfpr[j] = priv->ftp_rqfpr[l];
< at >< at > -773,7 +773,7 < at >< at > static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow, u
 priv->ftp_rqfpr[priv->cur_filer_idx] = local_rqfpr[k];
 priv->ftp_rqfcr[priv->cur_filer_idx] = local_rqfcr[k];
 gfar_write_filer(priv, priv->cur_filer_idx,
-local_rqfcr[k], local_rqfpr[k]);
+ local_rqfcr[k], local_rqfpr[k]);
 if (!priv->cur_filer_idx)
 break;
 priv->cur_filer_idx = priv->cur_filer_idx - 1;
< at >< at > -810,10 +810,10 < at >< at > static int gfar_check_filer_hardware(struct gfar_private *priv)
 i &= RCTRL_PRSDEP_MASK | RCTRL_PRSFM;
 if (i == (RCTRL_PRSDEP_MASK | RCTRL_PRSFM)) {
 netdev_info(priv->ndev,
-"Receive Queue Filtering enabled\n");
+    "Receive Queue Filtering enabled\n");
 } else {
 netdev_warn(priv->ndev,
-"Receive Queue Filtering disabled\n");
+    "Receive Queue Filtering disabled\n");
 return -EOPNOTSUPP;
 }
 }
< at >< at > -823,10 +823,10 < at >< at > static int gfar_check_filer_hardware(struct gfar_private *priv)
 i &= RCTRL_PRSDEP_MASK;
 if (i == RCTRL_PRSDEP_MASK) {
 netdev_info(priv->ndev,
-"Receive Queue Filtering enabled\n");
+    "Receive Queue Filtering enabled\n");
 } else {
 netdev_warn(priv->ndev,
-"Receive Queue Filtering disabled\n");
+    "Receive Queue Filtering disabled\n");
 return -EOPNOTSUPP;
 }
 }
< at >< at > -977,7 +977,7 < at >< at > static void gfar_set_user_ip(struct ethtool_usrip4_spec *value,
 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab);
 gfar_set_attribute(value->proto, mask->proto, RQFCR_PID_L4P, tab);
 gfar_set_attribute(value->l4_4_bytes, mask->l4_4_bytes, RQFCR_PID_ARB,
-tab);
+   tab);
 
 }
 
< at >< at > -1016,8 +1016,8 < at >< at > static void gfar_set_ether(struct ethhdr *value, struct ethhdr *mask,
 if (!is_broadcast_ether_addr(mask->h_dest)) {
 
 /* Special for destination is limited broadcast */
-if ((is_broadcast_ether_addr(value->h_dest)
-&& is_zero_ether_addr(mask->h_dest))) {
+if (is_broadcast_ether_addr(value->h_dest) &&
+    is_zero_ether_addr(mask->h_dest)) {
 gfar_set_parse_bits(RQFPR_EBC, RQFPR_EBC, tab);
 } else {
 
< at >< at > -1090,34 +1090,34 < at >< at > static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule,
 switch (rule->flow_type & ~FLOW_EXT) {
 case TCP_V4_FLOW:
 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_TCP | vlan,
-RQFPR_IPV4 | RQFPR_TCP | vlan_mask, tab);
+    RQFPR_IPV4 | RQFPR_TCP | vlan_mask, tab);
 gfar_set_basic_ip(&rule->h_u.tcp_ip4_spec,
-&rule->m_u.tcp_ip4_spec, tab);
+  &rule->m_u.tcp_ip4_spec, tab);
 break;
 case UDP_V4_FLOW:
 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_UDP | vlan,
-RQFPR_IPV4 | RQFPR_UDP | vlan_mask, tab);
+    RQFPR_IPV4 | RQFPR_UDP | vlan_mask, tab);
 gfar_set_basic_ip(&rule->h_u.udp_ip4_spec,
-&rule->m_u.udp_ip4_spec, tab);
+  &rule->m_u.udp_ip4_spec, tab);
 break;
 case SCTP_V4_FLOW:
 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
-tab);
+    tab);
 gfar_set_attribute(132, 0, RQFCR_PID_L4P, tab);
-gfar_set_basic_ip((struct ethtool_tcpip4_spec *) &rule->h_u,
-(struct ethtool_tcpip4_spec *) &rule->m_u, tab);
+gfar_set_basic_ip((struct ethtool_tcpip4_spec *)&rule->h_u,
+  (struct ethtool_tcpip4_spec *)&rule->m_u, tab);
 break;
 case IP_USER_FLOW:
 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
-tab);
-gfar_set_user_ip((struct ethtool_usrip4_spec *) &rule->h_u,
-(struct ethtool_usrip4_spec *) &rule->m_u, tab);
+    tab);
+gfar_set_user_ip((struct ethtool_usrip4_spec *)&rule->h_u,
+ (struct ethtool_usrip4_spec *)&rule->m_u, tab);
 break;
 case ETHER_FLOW:
 if (vlan)
 gfar_set_parse_bits(vlan, vlan_mask, tab);
-gfar_set_ether((struct ethhdr *) &rule->h_u,
-(struct ethhdr *) &rule->m_u, tab);
+gfar_set_ether((struct ethhdr *)&rule->h_u,
+       (struct ethhdr *)&rule->m_u, tab);
 break;
 default:
 return -1;
< at >< at > -1207,7 +1207,7 < at >< at > static int gfar_expand_filer_entries(u32 begin, u32 length,
 return -EINVAL;
 
 gfar_copy_filer_entries(&(tab->fe[begin + length]), &(tab->fe[begin]),
-tab->index - length + 1);
+tab->index - length + 1);
 
 tab->index += length;
 return 0;
< at >< at > -1271,10 +1271,10 < at >< at > static void gfar_cluster_filer(struct filer_table *tab)
 break;
 
 gfar_copy_filer_entries(&(tab->fe[iend + 1]),
-&(tab->fe[jend + 1]), jend - j);
+&(tab->fe[jend + 1]), jend - j);
 
 if (gfar_trim_filer_entries(jend - 1,
-jend + (jend - j), tab) == -EINVAL)
+    jend + (jend - j), tab) == -EINVAL)
 return;
 
 /* Mask out cluster bit */
< at >< at > -1364,8 +1364,8 < at >< at > static void gfar_sort_mask_table(struct gfar_mask_entry *mask_table,
 old_first = mask_table[start].start + 1;
 old_last = mask_table[i - 1].end;
 sort(mask_table + start, size,
-sizeof(struct gfar_mask_entry),
-gfar_comp, &gfar_swap);
+     sizeof(struct gfar_mask_entry),
+     gfar_comp, &gfar_swap);
 
 /* Toggle order for every block. This makes the
  * thing more efficient! */
< at >< at > -1378,12 +1378,11 < at >< at > static void gfar_sort_mask_table(struct gfar_mask_entry *mask_table,
 new_last = mask_table[i - 1].end;
 
 gfar_swap_bits(&temp_table->fe[new_first],
-&temp_table->fe[old_first],
-&temp_table->fe[new_last],
-&temp_table->fe[old_last],
-RQFCR_QUEUE | RQFCR_CLE |
-RQFCR_RJE | RQFCR_AND
-);
+       &temp_table->fe[old_first],
+       &temp_table->fe[new_last],
+       &temp_table->fe[old_last],
+       RQFCR_QUEUE | RQFCR_CLE |
+       RQFCR_RJE | RQFCR_AND);
 
 start = i;
 size = 0;
< at >< at > -1432,7 +1431,7 < at >< at > static int gfar_optimize_filer_masks(struct filer_table *tab)
 for (i = 0; i < and_index; i++) {
 size = mask_table[i].end - mask_table[i].start + 1;
 gfar_copy_filer_entries(&(tab->fe[j]),
-&(temp_table->fe[mask_table[i].start]), size);
+&(temp_table->fe[mask_table[i].start]), size);
 j += size;
 }
 
< at >< at > -1494,15 +1493,15 < at >< at > static int gfar_check_capability(struct ethtool_rx_flow_spec *flow,
 if (flow->flow_type & FLOW_EXT){
 if (~flow->m_ext.data[0] || ~flow->m_ext.data[1])
 netdev_warn(priv->ndev,
-"User-specific data not supported!\n");
+    "User-specific data not supported!\n");
 if (~flow->m_ext.vlan_etype)
 netdev_warn(priv->ndev,
-"VLAN-etype not supported!\n");
+    "VLAN-etype not supported!\n");
 }
 if (flow->flow_type == IP_USER_FLOW)
 if (flow->h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4)
 netdev_warn(priv->ndev,
-"IP-Version differing from IPv4 not supported!\n");
+    "IP-Version differing from IPv4 not supported!\n");
 
 return 0;
 }
< at >< at > -1599,8 +1598,8 < at >< at > static int gfar_add_cls(struct gfar_private *priv,
 }
 if (comp->fs.location == flow->location) {
 netdev_err(priv->ndev,
-"Rule not added: ID %d not free!\n",
-flow->location);
+   "Rule not added: ID %d not free!\n",
+   flow->location);
 ret = -EBUSY;
 goto clean_mem;
 }
diff --git a/drivers/net/ethernet/freescale/gianfar_ptp.c b/drivers/net/ethernet/freescale/gianfar_ptp.c
index c08e5d4..3f7b81d 100644
--- a/drivers/net/ethernet/freescale/gianfar_ptp.c
+++ b/drivers/net/ethernet/freescale/gianfar_ptp.c
< at >< at > -268,11 +268,11 < at >< at > static irqreturn_t isr(int irq, void *priv)
 ptp_clock_event(etsects->clock, &event);
 }
 
-if (ack) {
-gfar_write(&etsects->regs->tmr_tevent, ack);
-return IRQ_HANDLED;
-} else
+if (!ack)
 return IRQ_NONE;
+
+gfar_write(&etsects->regs->tmr_tevent, ack);
+return IRQ_HANDLED;
 }
 
 /*
diff --git a/drivers/net/ethernet/freescale/gianfar_sysfs.c b/drivers/net/ethernet/freescale/gianfar_sysfs.c
index cd14a4d..3a1fa70 100644
--- a/drivers/net/ethernet/freescale/gianfar_sysfs.c
+++ b/drivers/net/ethernet/freescale/gianfar_sysfs.c
< at >< at > -31,7 +31,7 < at >< at >
 #include <linux/mm.h>
 #include <linux/device.h>
 
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 #include <linux/module.h>
 
 #include "gianfar.h"

[PATCH 2/2] powerpc/85xx: Add P1024rdb board support

2012-05-24T09:08:28

From: Tang Yuantian <Yuantian.Tang< at >freescale.com>

The p1024rdb has the similar feature as the p1020rdb. Therefore, p1024rdb use
the same platform file as the p1/p2 rdb board.
Overview of P2020RDB platform
- DDR3 1G
- NOR flash 16M
- 3 Ethernet interfaces
- NAND Flash 32M
- SPI EEPROM 16M
- SD/MMC
- 2 USB ports
- 4 TDM ports

Signed-off-by: Jin Qing <b24347< at >freescale.com>
Signed-off-by: Li Yang <leoli< at >freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang< at >freescale.com>
---
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 313fce4..1910fdc 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
< at >< at > -169,6 +169,7 < at >< at > machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
< at >< at > -237,6 +238,13 < at >< at > static int __init p1020_utm_pc_probe(void)
 return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
 }
 
+static int __init p1024_rdb_probe(void)
+{
+unsigned long root = of_get_flat_dt_root();
+
+return of_flat_dt_is_compatible(root, "fsl,P1024RDB");
+}
+
 define_machine(p2020_rdb) {
 .name= "P2020 RDB",
 .probe= p2020_rdb_probe,
< at >< at > -348,3 +356,17 < at >< at > define_machine(p1020_rdb_pc) {
 .calibrate_decr= generic_calibrate_decr,
 .progress= udbg_progress,
 };
+
+define_machine(p1024_rdb) {
+.name= "P1024 RDB",
+.probe= p1024_rdb_probe,
+.setup_arch= mpc85xx_rdb_setup_arch,
+.init_IRQ= mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+.pcibios_fixup_bus= fsl_pcibios_fixup_bus,
+#endif
+.get_irq= mpic_get_irq,
+.restart= fsl_rstcr_restart,
+.calibrate_decr= generic_calibrate_decr,
+.progress= udbg_progress,
+};

[PATCH 1/2] powerpc/85xx: Add P1024rdb dts support

2012-05-24T09:08:27

From: Tang Yuantian <Yuantian.Tang< at >freescale.com>

Signed-off-by: Jin Qing <b24347< at >freescale.com>
Signed-off-by: Li Yang <leoli< at >freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang< at >freescale.com>
---
 arch/powerpc/boot/dts/p1024rdb.dtsi    |  228 ++++++++++++++++++++++++++++++++
 arch/powerpc/boot/dts/p1024rdb_32b.dts |   87 ++++++++++++
 arch/powerpc/boot/dts/p1024rdb_36b.dts |   87 ++++++++++++
 3 files changed, 402 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1024rdb.dtsi
 create mode 100644 arch/powerpc/boot/dts/p1024rdb_32b.dts
 create mode 100644 arch/powerpc/boot/dts/p1024rdb_36b.dts

diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/p1024rdb.dtsi
new file mode 100644
index 0000000..b05dcb4
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dtsi
< at >< at > -0,0 +1,228 < at >< at >
+/*
+ * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+nor< at >0,0 {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "cfi-flash";
+reg = <0x0 0x0 0x1000000>;
+bank-width = <2>;
+device-width = <1>;
+
+partition< at >0 {
+/* This location must not be altered  */
+/* 256KB for Vitesse 7385 Switch firmware */
+reg = <0x0 0x00040000>;
+label = "NOR Vitesse-7385 Firmware";
+read-only;
+};
+
+partition< at >40000 {
+/* 256KB for DTB Image */
+reg = <0x00040000 0x00040000>;
+label = "NOR DTB Image";
+};
+
+partition< at >80000 {
+/* 3.5 MB for Linux Kernel Image */
+reg = <0x00080000 0x00380000>;
+label = "NOR Linux Kernel Image";
+};
+
+partition< at >400000 {
+/* 11MB for JFFS2 based Root file System */
+reg = <0x00400000 0x00b00000>;
+label = "NOR JFFS2 Root File System";
+};
+
+partition< at >f00000 {
+/* This location must not be altered  */
+/* 512KB for u-boot Bootloader Image */
+/* 512KB for u-boot Environment Variables */
+reg = <0x00f00000 0x00100000>;
+label = "NOR U-Boot Image";
+read-only;
+};
+};
+
+nand< at >1,0 {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+reg = <0x1 0x0 0x40000>;
+
+partition< at >0 {
+/* This location must not be altered  */
+/* 1MB for u-boot Bootloader Image */
+reg = <0x0 0x00100000>;
+label = "NAND U-Boot Image";
+read-only;
+};
+
+partition< at >100000 {
+/* 1MB for DTB Image */
+reg = <0x00100000 0x00100000>;
+label = "NAND DTB Image";
+};
+
+partition< at >200000 {
+/* 4MB for Linux Kernel Image */
+reg = <0x00200000 0x00400000>;
+label = "NAND Linux Kernel Image";
+};
+
+partition< at >600000 {
+/* 4MB for Compressed Root file System Image */
+reg = <0x00600000 0x00400000>;
+label = "NAND Compressed RFS Image";
+};
+
+partition< at >a00000 {
+/* 15MB for JFFS2 based Root file System */
+reg = <0x00a00000 0x00f00000>;
+label = "NAND JFFS2 Root File System";
+};
+
+partition< at >1900000 {
+/* 7MB for User Writable Area */
+reg = <0x01900000 0x00700000>;
+label = "NAND Writable User area";
+};
+};
+};
+
+&soc {
+spi< at >7000 {
+flash< at >0 {
+#address-cells = <1>;
+#size-cells = <1>;
+compatible = "spansion,m25p80";
+reg = <0>;
+spi-max-frequency = <40000000>;
+
+partition< at >0 {
+/* 512KB for u-boot Bootloader Image */
+reg = <0x0 0x00080000>;
+label = "SPI U-Boot Image";
+read-only;
+};
+
+partition< at >80000 {
+/* 512KB for DTB Image */
+reg = <0x00080000 0x00080000>;
+label = "SPI DTB Image";
+};
+
+partition< at >100000 {
+/* 4MB for Linux Kernel Image */
+reg = <0x00100000 0x00400000>;
+label = "SPI Linux Kernel Image";
+};
+
+partition< at >500000 {
+/* 4MB for Compressed RFS Image */
+reg = <0x00500000 0x00400000>;
+label = "SPI Compressed RFS Image";
+};
+
+partition< at >900000 {
+/* 7MB for JFFS2 based RFS */
+reg = <0x00900000 0x00700000>;
+label = "SPI JFFS2 RFS";
+};
+};
+};
+
+i2c< at >3000 {
+rtc< at >68 {
+compatible = "dallas,ds1339";
+reg = <0x68>;
+};
+};
+
+usb< at >22000 {
+phy_type = "ulpi";
+};
+
+usb< at >23000 {
+status = "disabled";
+};
+
+mdio< at >24000 {
+phy0: ethernet-phy< at >0 {
+interrupts = <3 1 0 0>;
+reg = <0x0>;
+};
+phy1: ethernet-phy< at >1 {
+interrupts = <2 1 0 0>;
+reg = <0x1>;
+};
+phy2: ethernet-phy< at >2 {
+interrupts = <1 1 0 0>;
+reg = <0x2>;
+};
+};
+
+mdio< at >25000 {
+tbi0: tbi-phy< at >11 {
+reg = <0x11>;
+device_type = "tbi-phy";
+};
+};
+
+mdio< at >26000 {
+tbi1: tbi-phy< at >11 {
+reg = <0x11>;
+device_type = "tbi-phy";
+};
+};
+
+ethernet< at >b0000 {
+phy-handle = <&phy2>;
+phy-connection-type = "rgmii-id";
+};
+
+ethernet< at >b1000 {
+phy-handle = <&phy0>;
+tbi-handle = <&tbi0>;
+phy-connection-type = "sgmii";
+};
+
+ethernet< at >b2000 {
+phy-handle = <&phy1>;
+phy-connection-type = "rgmii-id";
+};
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb_32b.dts b/arch/powerpc/boot/dts/p1024rdb_32b.dts
new file mode 100644
index 0000000..90e803e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_32b.dts
< at >< at > -0,0 +1,87 < at >< at >
+/*
+ * P1024 RDB 32Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+model = "fsl,P1024RDB";
+compatible = "fsl,P1024RDB";
+
+memory {
+device_type = "memory";
+};
+
+lbc: localbus< at >ffe05000 {
+reg = <0x0 0xffe05000 0 0x1000>;
+ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+  0x1 0x0 0x0 0xff800000 0x00040000>;
+};
+
+soc: soc< at >ffe00000 {
+ranges = <0x0 0x0 0xffe00000 0x100000>;
+};
+
+pci0: pcie< at >ffe09000 {
+reg = <0x0 0xffe09000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+pcie< at >0 {
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+
+pci1: pcie< at >ffe0a000 {
+reg = <0x0 0xffe0a000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+pcie< at >0 {
+reg = <0x0 0x0 0x0 0x0 0x0>;
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
new file mode 100644
index 0000000..3656825
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_36b.dts
< at >< at > -0,0 +1,87 < at >< at >
+/*
+ * P1024 RDB 36Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+model = "fsl,P1024RDB";
+compatible = "fsl,P1024RDB";
+
+memory {
+device_type = "memory";
+};
+
+lbc: localbus< at >fffe05000 {
+reg = <0xf 0xffe05000 0 0x1000>;
+ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+  0x1 0x0 0xf 0xff800000 0x00040000>;
+};
+
+soc: soc< at >fffe00000 {
+ranges = <0x0 0xf 0xffe00000 0x100000>;
+};
+
+pci0: pcie< at >fffe09000 {
+reg = <0xf 0xffe09000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+pcie< at >0 {
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+
+pci1: pcie< at >fffe0a000 {
+reg = <0xf 0xffe0a000 0 0x1000>;
+ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+  0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+pcie< at >0 {
+reg = <0x0 0x0 0x0 0x0 0x0>;
+ranges = <0x2000000 0x0 0xe0000000
+  0x2000000 0x0 0xe0000000
+  0x0 0x20000000
+
+  0x1000000 0x0 0x0
+  0x1000000 0x0 0x0
+  0x0 0x100000>;
+};
+};
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"

Oops with Radeon/Uninorth on Maple

Dmitry Eremin-Solenikov — 2012-05-24T06:18:55

Hello, colleagues,

I'm trying to enable an AGP slot (again) on my Maple board (dual 
PPC970FX board, with CPC925 (U3H) north bridge).

  For now I'm stuck with a problem: I use radeon card, drm-radeon driver 
with KMS.

If I force drm-radeon to think about a card as about PCI card (by 
commenting corresponding lines in drm_radeon_kms.c), everything works, I 
get framebuffer, working X11, etc. If I enable agpgart-uninorth driver
and RADEON_IS_AGP flag in drm driver, I get an Oops early during the 
bootstrap. Relevant part of the log (I can send full dmesg of normal 
bootstrap or this oops on request, if that would help).

[    2.820647] Linux agpgart interface v0.103
[    2.824909] agpgart-uninorth 0000:f0:0b.0: Apple U3H chipset
[    2.830668] agpgart-uninorth 0000:f0:0b.0: Found device u3, rev 35
[    2.843611] agpgart-uninorth 0000:f0:0b.0: configuring for size idx: 64
[    2.850638] agpgart-uninorth 0000:f0:0b.0: AGP aperture is 256M < at > 0x0
[    2.857646] [drm] Initialized drm 1.1.0 20060810
[    2.862567] [drm] radeon defaulting to kernel modesetting.
[    2.868091] [drm] radeon kernel modesetting enabled.
[    2.873222] radeon 0000:f0:10.0: enabling device (0000 -> 0003)
[    2.880311] radeon 0000:f0:10.0: enabling bus mastering
[    2.885591] [drm] initializing kernel modesetting (RV350 
0x1002:0x4152 0x18BC:0x0416).
[    2.893629] [drm] register mmio base: 0xD0020000
[    2.898260] [drm] register mmio size: 65536
[    2.947112] [drm] GPU not posted. posting now...
[    3.051033] agpgart-uninorth 0000:f0:0b.0: putting AGP V3 device into 
8x mode
[    3.058197] radeon 0000:f0:10.0: putting AGP V3 device into 8x mode
[    3.064666] radeon 0000:f0:10.0: GTT: 256M 0x00000000 - 0x0FFFFFFF
[    3.070864] [drm] Generation 2 PCI interface, using max accessible memory
[    3.077672] radeon 0000:f0:10.0: VRAM: 128M 0x00000000C0000000 - 
0x00000000C7FFFFFF (128M used)
[    3.086487] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[    3.093126] [drm] Driver supports precise vblank timestamp query.
[    3.099291] [drm] radeon: irq initialized.
[    3.103404] [drm] Detected VRAM RAM=128M, BAR=128M
[    3.108214] [drm] RAM width 128bits DDR
[    3.112263] [TTM] Zone  kernel: Available graphics memory: 496682 kiB
[    3.118732] [TTM] Initializing pool allocator
[    3.123346] [drm] radeon: 128M of VRAM memory ready
[    3.128256] [drm] radeon: 256M of GTT memory ready.
[    3.133295] [drm] radeon: ib pool ready.
[    3.137708] [drm] radeon: 1 quad pipes, 1 Z pipes initialized.
[    3.144018] radeon 0000:f0:10.0: WB disabled
[    3.148326] [drm] fence driver on ring 0 use gpu addr 0x00000000 and 
cpu addr 0xd000000000066000
[    3.157474] [drm] Loading R300 Microcode
[    3.162480] [drm] radeon: ring at 0x0000000000001000
[    3.167569] [drm] ring test succeeded in 0 usecs
cpu 0x0: Vector: 200 (Machine Check) at [c000000000d63aa0]
     pc: c0000000000cc07c: .trace_hardirqs_on_caller+0x6c/0x190
     lr: c0000000000152f4: .cpu_idle+0x1a4/0x220
     sp: c000000000d63d20
    msr: 9000000000009032
   current = 0xc000000000c4db30
   paca    = 0xc00000000ffff000   softe: 0        irq_happened: 0x01
     pid   = 0, comm = swapper/0
enter ? for help
[c000000000d63db0] c0000000000152f4 .cpu_idle+0x1a4/0x220
[c000000000d63e50] c000000000008fb8 .rest_init+0xe8/0x110
[c000000000d63ee0] c000000000ba2998 .start_kernel+0x3e4/0x408
[c000000000d63f90] c000000000007558 .start_here_common+0x20/0x48
0:mon> x
[  843.783295] Oops: Machine check, sig: 7 [#1]
[  843.787589] SMP NR_CPUS=4 Maple
[  843.790768] Modules linked in:
[  843.793855] NIP: c0000000000cc07c LR: c0000000000152f4 CTR: 
c000000000023eac
[  843.800920] REGS: c000000000d63aa0 TRAP: 0200   Not tainted  (3.4.0+)
[  843.807376] MSR: 9000000000009032 <SF,HV,EE,ME,IR,DR,RI>  CR: 
24222222  XER: 00000006
[  843.815412] SOFTE: 0
[  843.817607] TASK = c000000000c4db30[0] 'swapper/0' THREAD: 
c000000000d60000 CPU: 0
[  843.825035] GPR00: 0000000000000000 c000000000d63d20 c000000000d63280 
c0000000000152f4
[  843.833169] GPR04: 0000000000000000 c000000000099d10 0000000000000001 
0000000000000002
[  843.841302] GPR08: 0100000000000000 c000000000e828e8 0140000000000000 
0000000000000000
[  843.849436] GPR12: 0000000044222282 c00000000ffff000 0000000000000000 
0000000000000000
[  843.857570] GPR16: 0000000000ff8750 0000000000cdc890 00000000010001e0 
0000000000000000
[  843.865702] GPR20: 0000000000000000 0000000000000000 000000001dcd6500 
0000000000000000
[  843.873835] GPR24: 0000000000000000 0000000000ec7b00 9000000000009032 
c000000000d7b178
[  843.881979] GPR28: c000000000d7b278 0000000000000008 c000000000c970f8 
c0000000000152f4
[  843.890314] NIP [c0000000000cc07c] .trace_hardirqs_on_caller+0x6c/0x190
[  843.896942] LR [c0000000000152f4] .cpu_idle+0x1a4/0x220
[  843.902181] Call Trace:
[  843.904640] [c000000000d63d20] [c000000000d63db0] 
init_thread_union+0x3db0/0x4000 (unreliable)
[  843.913317] [c000000000d63db0] [c0000000000152f4] .cpu_idle+0x1a4/0x220
[  843.919964] [c000000000d63e50] [c000000000008fb8] .rest_init+0xe8/0x110
[  843.926615] [c000000000d63ee0] [c000000000ba2998] 
.start_kernel+0x3e4/0x408
[  843.933611] [c000000000d63f90] [c000000000007558] 
.start_here_common+0x20/0x48
[  843.940866] Instruction dump:
[  843.943868] 40de00a4 e92d01c8 800908e8 2f800000 40de0094 e93e8098 
80090000 2f800000
[  843.951829] 409e0030 880d01f2 2fa00000 40de00b0 <e93e84e8> 88090000 
2f800000 40de00c8


Looking for any suggestions on this.

[PATCH] [ppc] Do not reserve cpu spin-table for crash kernel

Suzuki K. Poulose — 2012-05-24T06:09:45

As of now, the kexec reserves the spin-table for all the CPUs
on an SMP machine. The spin-table is pointed to by the 
cpu-release-addr property in the device-tree. Reserving the
spin-table in the crash kernel will cause a BUG(), if the table
lies outside the memory reserved for the crashkernel.

Disable reserving the spin-table regions and use maxcpus=1 to 
use only the crashing CPU to boot the crash kernel.

Signed-off-by: Suzuki K. Poulose <suzuki< at >in.ibm.com>
---

 kexec/arch/ppc/crashdump-powerpc.c |   19 +++++++++++++------
 kexec/arch/ppc/fixup_dtb.c         |    4 ++++
 2 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/kexec/arch/ppc/crashdump-powerpc.c b/kexec/arch/ppc/crashdump-powerpc.c
index 1bef69b..4c8c75d 100644
--- a/kexec/arch/ppc/crashdump-powerpc.c
+++ b/kexec/arch/ppc/crashdump-powerpc.c
< at >< at > -262,10 +262,19 < at >< at > static void ulltoa(unsigned long long i, char *str)
 }
 }
 
+/* Append str to cmdline */
+static void add_cmdline(char *cmdline, char *str)
+{
+int cmdlen = strlen(cmdline) + strlen(str);
+if (cmdlen > (COMMAND_LINE_SIZE - 1))
+die("Command line overflow\n");
+strcat(cmdline, str);
+}
+
 static int add_cmdline_param(char *cmdline, unsigned long long addr,
 char *cmdstr, char *byte)
 {
-int cmdlen, len, align = 1024;
+int align = 1024;
 char str[COMMAND_LINE_SIZE], *ptr;
 
 /* Passing in =xxxK / =xxxM format. Saves space required in cmdline.*/
< at >< at > -284,11 +293,8 < at >< at > static int add_cmdline_param(char *cmdline, unsigned long long addr,
 ptr += strlen(str);
 ulltoa(addr, ptr);
 strcat(str, byte);
-len = strlen(str);
-cmdlen = strlen(cmdline) + len;
-if (cmdlen > (COMMAND_LINE_SIZE - 1))
-die("Command line overflow\n");
-strcat(cmdline, str);
+
+add_cmdline(cmdline, str);
 
 dbgprintf("Command line after adding elfcorehdr: %s\n", cmdline);
 
< at >< at > -365,6 +371,7 < at >< at > int load_crashdump_segments(struct kexec_info *info, char *mod_cmdline,
  */
 add_cmdline_param(mod_cmdline, elfcorehdr, " elfcorehdr=", "K");
 add_cmdline_param(mod_cmdline, saved_max_mem, " savemaxmem=", "M");
+add_cmdline(mod_cmdline, " maxcpus=1");
 return 0;
 }
 
diff --git a/kexec/arch/ppc/fixup_dtb.c b/kexec/arch/ppc/fixup_dtb.c
index e9890a4..f832026 100644
--- a/kexec/arch/ppc/fixup_dtb.c
+++ b/kexec/arch/ppc/fixup_dtb.c
< at >< at > -172,6 +172,9 < at >< at > static void fixup_reserve_regions(struct kexec_info *info, char *blob_buf)
 }
 }
 
+#if 0
+/* XXX: Do not reserve spin-table for CPUs. */
+
 /* Add reserve regions for cpu-release-addr */
 nodeoffset = fdt_node_offset_by_prop_value(blob_buf, -1, "device_type", "cpu", 4);
 while (nodeoffset != -FDT_ERR_NOTFOUND) {
< at >< at > -201,6 +204,7 < at >< at > static void fixup_reserve_regions(struct kexec_info *info, char *blob_buf)
 nodeoffset = fdt_node_offset_by_prop_value(blob_buf, nodeoffset,
 "device_type", "cpu", 4);
 }
+#endif
 
 out:
 print_fdt_reserve_regions(blob_buf);

[PATCH v3 2/2] microblaze/PCI: move DMA & IRQ init to device_add() notification path

Bjorn Helgaas — 2012-05-23T22:37:05

From: Hiroo Matsumoto <matsumoto.hiroo< at >jp.fujitsu.com>

Microblaze initialized DMA and IRQ information in the pci_scan_child_bus()
-> pcibios_fixup_bus() path.  Some hotplug drivers use that path, but
others don't, e.g., pciehp, so sometimes hot-added devices are only
partly initialized.

This patch moves that initialization from pcibios_fixup_bus() to a new
pci_bus_notify() called in the pci_bus_add_device() -> device_add() path.
That means the initialization happens the same way for all PCI devices,
whether they are present at boot or hot-added later.

[bhelgaas: changelog, notifier name, inline registration]
Signed-off-by: Hiroo MATSUMOTO <matsumoto.hiroo< at >jp.fujitsu.com>
Signed-off-by: Bjorn Helgaas <bhelgaas< at >google.com>
---
 arch/microblaze/include/asm/pci.h |    1 -
 arch/microblaze/pci/pci-common.c  |   62 ++++++++++++++++++++-----------------
 2 files changed, 34 insertions(+), 29 deletions(-)

diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index a0da88b..2aa97fd 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
< at >< at > -141,7 +141,6 < at >< at > extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
  const struct resource *rsrc,
  resource_size_t *start, resource_size_t *end);
 
-extern void pcibios_setup_bus_devices(struct pci_bus *bus);
 extern void pcibios_setup_bus_self(struct pci_bus *bus);
 
 /* This part of code was originally in xilinx-pci.h */
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 9b32483..6487ed0 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
< at >< at > -983,31 +983,6 < at >< at > void __devinit pcibios_setup_bus_self(struct pci_bus *bus)
 pcibios_fixup_bridge(bus);
 }
 
-void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
-{
-struct pci_dev *dev;
-
-pr_debug("PCI: Fixup bus devices %d (%s)\n",
- bus->number, bus->self ? pci_name(bus->self) : "PHB");
-
-list_for_each_entry(dev, &bus->devices, bus_list) {
-/* Setup OF node pointer in archdata */
-dev->dev.of_node = pci_device_to_OF_node(dev);
-
-/* Fixup NUMA node as it may not be setup yet by the generic
- * code and is needed by the DMA init
- */
-set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
-
-/* Hook up default DMA ops */
-set_dma_ops(&dev->dev, pci_dma_ops);
-dev->dev.archdata.dma_data = (void *)PCI_DRAM_OFFSET;
-
-/* Read default IRQs and fixup if necessary */
-pci_read_irq_line(dev);
-}
-}
-
 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
 /* When called from the generic PCI probe, read PCI<->PCI bridge
< at >< at > -1019,9 +994,6 < at >< at > void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 
 /* Now fixup the bus bus */
 pcibios_setup_bus_self(bus);
-
-/* Now fixup devices on that bus */
-pcibios_setup_bus_devices(bus);
 }
 EXPORT_SYMBOL(pcibios_fixup_bus);
 
< at >< at > -1512,6 +1484,38 < at >< at > static void __devinit pcibios_scan_phb(struct pci_controller *hose)
 hose->last_busno = bus->busn_res.end;
 }
 
+static int pci_bus_notify(struct notifier_block *nb, unsigned long action,
+  void *data)
+{
+struct pci_dev *dev = to_pci_dev(data);
+
+switch (action) {
+case BUS_NOTIFY_ADD_DEVICE:
+/* Setup OF node pointer in archdata */
+dev->dev.of_node = pci_device_to_OF_node(dev);
+
+/* Fixup NUMA node as it may not be setup yet by the generic
+ * code and is needed by the DMA init
+ */
+set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
+
+/* Hook up default DMA ops */
+set_dma_ops(&dev->dev, pci_dma_ops);
+dev->dev.archdata.dma_data = (void *)PCI_DRAM_OFFSET;
+
+/* Read default IRQs and fixup if necessary */
+pci_read_irq_line(dev);
+
+break;
+}
+
+return 0;
+}
+
+static struct notifier_block device_nb = {
+.notifier_call = pci_bus_notify,
+};
+
 static int __init pcibios_init(void)
 {
 struct pci_controller *hose, *tmp;
< at >< at > -1519,6 +1523,8 < at >< at > static int __init pcibios_init(void)
 
 printk(KERN_INFO "PCI: Probing PCI hardware\n");
 
+bus_register_notifier(&pci_bus_type, &device_nb);
+
 /* Scan all of the recorded PCI controllers.  */
 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
 hose->last_busno = 0xff;

[PATCH v3 1/2] powerpc/PCI: move DMA & IRQ init to device_add() notification path

Bjorn Helgaas — 2012-05-23T22:37:00

From: Hiroo Matsumoto <matsumoto.hiroo< at >jp.fujitsu.com>

PowerPC initialized DMA and IRQ information in the pci_scan_child_bus()
-> pcibios_fixup_bus() path.  Some hotplug drivers use that path, but
others don't, e.g., pciehp, so sometimes hot-added devices are only
partly initialized.

This patch moves that initialization from pcibios_fixup_bus() to a new
pci_bus_notify() called in the pci_bus_add_device() -> device_add() path.
That means the initialization happens the same way for all PCI devices,
whether they are present at boot or hot-added later.

Note that powerpc was the only user of pci_fixup_cardbus(), which was
used to do this same setup for cardbus devices.  That's no longer
needed because this setup will now be done in the same device_add()
notification path as all other PCI devices.

Typical failure of a hot-added e1000e device prior to this change:

    # echo 1 > /sys/bus/pci/slots/1/power
    <snip>
    e1000e 0000:03:00.0: enabling device (0000 -> 0002)
    e1000e 0000:03:00.0: No usable DMA configuration, aborting
    e1000e: probe of 0000:03:00.0 failed with error -5

Successful initialization after this change:

    # echo 1 > /sys/bus/pci/slots/1/power
    <snip>
    e1000e 0000:03:00.0: enabling device (0000 -> 0002)
    irq: irq 6 on host /soc< at >ffe00000/msi< at >41600 mapped to virtual irq 27
    e1000e 0000:03:00.0: eth0: (PCI Express:2.5GT/s:Width x1) 00:15:17:bf:c0:c9
    e1000e 0000:03:00.0: eth0: Intel(R) PRO/1000 Network Connection
    e1000e 0000:03:00.0: eth0: MAC: 1, PHY: 4, PBA No: D50861-003

[bhelgaas: changelog, notifier name, registration can be __init]
CC: Dominik Brodowski <linux< at >dominikbrodowski.net>
Signed-off-by: Hiroo MATSUMOTO <matsumoto.hiroo< at >jp.fujitsu.com>
Signed-off-by: Bjorn Helgaas <bhelgaas< at >google.com>
---
 arch/powerpc/include/asm/pci.h             |    2 -
 arch/powerpc/kernel/pci-common.c           |   87 ++++++++++++++--------------
 arch/powerpc/kernel/pci_32.c               |    2 +
 arch/powerpc/kernel/pci_64.c               |    2 +
 arch/powerpc/kernel/pci_of_scan.c          |    1 
 arch/powerpc/platforms/pseries/pci_dlpar.c |    1 
 drivers/pci/pci.c                          |    5 --
 drivers/pcmcia/cardbus.c                   |    3 -
 include/linux/pci.h                        |    3 -
 9 files changed, 49 insertions(+), 57 deletions(-)

diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 6653f27..d6a36a4 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
< at >< at > -183,10 +183,10 < at >< at > extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
  resource_size_t *start, resource_size_t *end);
 
 extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
-extern void pcibios_setup_bus_devices(struct pci_bus *bus);
 extern void pcibios_setup_bus_self(struct pci_bus *bus);
 extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
 extern void pcibios_scan_phb(struct pci_controller *hose);
+extern void pcibios_setup_bus_notifier(void);
 
 #endif/* __KERNEL__ */
 #endif /* __ASM_POWERPC_PCI_H */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 7320f36..41b39ba 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
< at >< at > -1009,40 +1009,6 < at >< at > void __devinit pcibios_setup_bus_self(struct pci_bus *bus)
 ppc_md.pci_dma_bus_setup(bus);
 }
 
-void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
-{
-struct pci_dev *dev;
-
-pr_debug("PCI: Fixup bus devices %d (%s)\n",
- bus->number, bus->self ? pci_name(bus->self) : "PHB");
-
-list_for_each_entry(dev, &bus->devices, bus_list) {
-/* Cardbus can call us to add new devices to a bus, so ignore
- * those who are already fully discovered
- */
-if (dev->is_added)
-continue;
-
-/* Fixup NUMA node as it may not be setup yet by the generic
- * code and is needed by the DMA init
- */
-set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
-
-/* Hook up default DMA ops */
-set_dma_ops(&dev->dev, pci_dma_ops);
-set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
-
-/* Additional platform DMA/iommu setup */
-if (ppc_md.pci_dma_dev_setup)
-ppc_md.pci_dma_dev_setup(dev);
-
-/* Read default IRQs and fixup if necessary */
-pci_read_irq_line(dev);
-if (ppc_md.pci_irq_fixup)
-ppc_md.pci_irq_fixup(dev);
-}
-}
-
 void pcibios_set_master(struct pci_dev *dev)
 {
 /* No special bus mastering setup handling */
< at >< at > -1059,19 +1025,9 < at >< at > void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 
 /* Now fixup the bus bus */
 pcibios_setup_bus_self(bus);
-
-/* Now fixup devices on that bus */
-pcibios_setup_bus_devices(bus);
 }
 EXPORT_SYMBOL(pcibios_fixup_bus);
 
-void __devinit pci_fixup_cardbus(struct pci_bus *bus)
-{
-/* Now fixup devices on that bus */
-pcibios_setup_bus_devices(bus);
-}
-
-
 static int skip_isa_ioresource_align(struct pci_dev *dev)
 {
 if (pci_has_flag(PCI_CAN_SKIP_ISA_ALIGN) &&
< at >< at > -1685,6 +1641,49 < at >< at > void __devinit pcibios_scan_phb(struct pci_controller *hose)
 }
 }
 
+static int pci_bus_notify(struct notifier_block *nb, unsigned long action,
+  void *data)
+{
+struct pci_dev *dev = to_pci_dev(data);
+
+switch (action) {
+case BUS_NOTIFY_ADD_DEVICE:
+/* Setup OF node pointer in the device */
+dev->dev.of_node = pci_device_to_OF_node(dev);
+
+/* Fixup NUMA node as it may not be setup yet by the generic
+ * code and is needed by the DMA init
+ */
+set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
+
+/* Hook up default DMA ops */
+set_dma_ops(&dev->dev, pci_dma_ops);
+set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
+
+/* Additional platform DMA/iommu setup */
+if (ppc_md.pci_dma_dev_setup)
+ppc_md.pci_dma_dev_setup(dev);
+
+/* Read default IRQs and fixup if necessary */
+pci_read_irq_line(dev);
+if (ppc_md.pci_irq_fixup)
+ppc_md.pci_irq_fixup(dev);
+
+break;
+}
+
+return 0;
+}
+
+static struct notifier_block device_nb = {
+.notifier_call = pci_bus_notify,
+};
+
+void __init pcibios_setup_bus_notifier(void)
+{
+bus_register_notifier(&pci_bus_type, &device_nb);
+}
+
 static void fixup_hide_host_resource_fsl(struct pci_dev *dev)
 {
 int i, class = dev->class >> 8;
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 4b06ec5..640cc35 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
< at >< at > -231,6 +231,8 < at >< at > static int __init pcibios_init(void)
 
 printk(KERN_INFO "PCI: Probing PCI hardware\n");
 
+pcibios_setup_bus_notifier();
+
 if (pci_has_flag(PCI_REASSIGN_ALL_BUS))
 pci_assign_all_buses = 1;
 
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 4ff190f..8b212d3 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
< at >< at > -48,6 +48,8 < at >< at > static int __init pcibios_init(void)
 
 printk(KERN_INFO "PCI: Probing PCI hardware\n");
 
+pcibios_setup_bus_notifier();
+
 /* For now, override phys_mem_access_prot. If we need it,g
  * later, we may move that initialization to each ppc_md
  */
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index ae5ea5e..eb09eca 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
< at >< at > -333,7 +333,6 < at >< at > static void __devinit __of_scan_bus(struct device_node *node,
  */
 if (!rescan_existing)
 pcibios_setup_bus_self(bus);
-pcibios_setup_bus_devices(bus);
 
 /* Now scan child busses */
 list_for_each_entry(dev, &bus->devices, bus_list) {
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 3ccebc8..0b1b6b3 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
< at >< at > -120,7 +120,6 < at >< at > void pcibios_add_pci_devices(struct pci_bus * bus)
 num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
 if (!num)
 return;
-pcibios_setup_bus_devices(bus);
 max = bus->busn_res.start;
 for (pass=0; pass < 2; pass++)
 list_for_each_entry(dev, &bus->devices, bus_list) {
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 15d442a..43e0a4f 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
< at >< at > -3789,11 +3789,6 < at >< at > int __attribute__ ((weak)) pci_ext_cfg_avail(struct pci_dev *dev)
 return 1;
 }
 
-void __weak pci_fixup_cardbus(struct pci_bus *bus)
-{
-}
-EXPORT_SYMBOL(pci_fixup_cardbus);
-
 static int __init pci_setup(char *str)
 {
 while (str) {
diff --git a/drivers/pcmcia/cardbus.c b/drivers/pcmcia/cardbus.c
index 24caeaf..a980691 100644
--- a/drivers/pcmcia/cardbus.c
+++ b/drivers/pcmcia/cardbus.c
< at >< at > -71,7 +71,6 < at >< at > int __ref cb_alloc(struct pcmcia_socket *s)
 unsigned int max, pass;
 
 s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
-pci_fixup_cardbus(bus);
 
 max = bus->busn_res.start;
 for (pass = 0; pass < 2; pass++)
< at >< at > -85,7 +84,6 < at >< at > int __ref cb_alloc(struct pcmcia_socket *s)
  */
 pci_bus_size_bridges(bus);
 pci_bus_assign_resources(bus);
-cardbus_config_irq_and_cls(bus, s->pci_irq);
 
 /* socket specific tune function */
 if (s->tune_bridge)
< at >< at > -93,6 +91,7 < at >< at > int __ref cb_alloc(struct pcmcia_socket *s)
 
 pci_enable_bridges(bus);
 pci_bus_add_devices(bus);
+cardbus_config_irq_and_cls(bus, s->pci_irq);
 
 return 0;
 }
diff --git a/include/linux/pci.h b/include/linux/pci.h
index a0e2d7f..3924c02 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
< at >< at > -651,9 +651,6 < at >< at > resource_size_t pcibios_align_resource(void *, const struct resource *,
 resource_size_t);
 void pcibios_update_irq(struct pci_dev *, int irq);
 
-/* Weak but can be overriden by arch */
-void pci_fixup_cardbus(struct pci_bus *);
-
 /* Generic PCI functions used internally */
 
 void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,

[PATCH v3 0/2] archdata init in device_add() notifier

Bjorn Helgaas — 2012-05-23T22:36:55

Here's what I put in my "for-3.6" branch for now.  We can still change
it, so let me know if you see any problems.

I reworked the changelogs, changed the notification function name per
Jesse, folded the one-line pcibios_setup_bus_notifier() into the only
caller (on microblaze), and changed it from __devinit to __init (on
powerpc) since it now has nothing to do with hotplug.

Thank you very much for doing this work, Matsumoto-san.  I hope to
eventually get rid of pcibios_fixup_bus() altogether, and this is a
significant step in that direction.

Bjorn
---

Hiroo Matsumoto (2):
      powerpc/PCI: move DMA & IRQ init to device_add() notification path
      microblaze/PCI: move DMA & IRQ init to device_add() notification path


 arch/microblaze/include/asm/pci.h          |    1 
 arch/microblaze/pci/pci-common.c           |   62 +++++++++++---------
 arch/powerpc/include/asm/pci.h             |    2 -
 arch/powerpc/kernel/pci-common.c           |   87 ++++++++++++++--------------
 arch/powerpc/kernel/pci_32.c               |    2 +
 arch/powerpc/kernel/pci_64.c               |    2 +
 arch/powerpc/kernel/pci_of_scan.c          |    1 
 arch/powerpc/platforms/pseries/pci_dlpar.c |    1 
 drivers/pci/pci.c                          |    5 --
 drivers/pcmcia/cardbus.c                   |    3 -
 include/linux/pci.h                        |    3 -
 11 files changed, 83 insertions(+), 86 deletions(-)