gmane.linux.ports.ppc.embedded

Re: [PATCH] powerpc: delete __cpuinit usage from all users

Paul Gortmaker — 2013-06-18T20:23:24

I see I missed a couple with a too limited regex.  I'll resend a v2
shortly.  It is up to you guys whether you want to carry this in the
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git#next
repo, or have me keep it with the arch independent __cpuinit removal
changes.  In mips for example, Ralf expected some significant tree
churn still pending and wanted to handle the conflicts himself, so
he took the mips chunk in his tree.

Thanks,
P.
--

Pull request: scottwood/linux.git for-3.10

Scott Wood — 2013-06-18T20:14:52

This fixes a regression that causes 83xx to oops on boot if a
non-express PCI bus is present.

The following changes since commit 17858ca65eef148d335ffd4cfc09228a1c1cbfb5:

  Merge tag 'please-pull-fixia64' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux (2013-06-18 06:29:19 -1000)

are available in the git repository at:


  git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git for-3.10

for you to fetch changes up to 2383ea94854bcf5a0df3c6803b980868cef95418:

  powerpc/pci: Fix setup of Freescale PCI / PCIe controllers (2013-06-18 14:44:57 -0500)

----------------------------------------------------------------
Rojhalat Ibrahim (1):
      powerpc/pci: Fix setup of Freescale PCI / PCIe controllers

 arch/powerpc/sysdev/fsl_pci.c |   24 +++++++++---------------
 1 file changed, 9 insertions(+), 15 deletions(-)

Re: [PATCH -V10 00/15] THP support for PPC64

Aneesh Kumar K.V — 2013-06-18T18:46:20


We can move them before. One of the reason I would like to keep them as
seperate patches is to document the changes better in commit messages. 


But will that by anonymous memory ? ie, will we find them suitable for
THP allocation ?


Can you explain that more, why should the entire segment be marked no THP ?
The segment can work with 4K base page size and we still be able to
allocate a hugepage in that segment.

-aneesh

Re: [PATCH 2/5] powerpc/fsl_msi: add MSIIR1 support for MPIC v4.3

Scott Wood — 2013-06-18T18:08:58

Using the larger bitmap unconditionally is fine.  What is not fine is,  
on older hardware, acting as if all 16 irqs are present.

In other words, I'm talking about the contents of the bitmap, not its  
size.


If we have the mpic4.3 compatible, then we don't even support  
msi-available-ranges, so we'd skip this code and free everything in the  
bitmap.


No. :-)

-Scott

Re: [PATCH -V10 00/15] THP support for PPC64

Aneesh Kumar K.V — 2013-06-18T17:54:30


We are depending on the pmd being none. But as you said that doesn't
take care of an already undergoing hash_page. As per the discussion I
am listing below the option that use synchronize_sched. The other option
that we have is to clear _PAGE_USER.

commit f69f11ba6a957aac81ea8096b244005c450a2059
Author: Aneesh Kumar K.V <aneesh.kumar< at >linux.vnet.ibm.com>
Date:   Tue Jun 18 19:17:17 2013 +0530

    powerpc/THP: Wait for all hash_page calls to finish before invalidating HPTE entries
    
    When we collapse normal pages to hugepage, we first clear the pmd, then invalidate all
    the PTE entries. The assumption here is that any low level page fault will see pmd as
    none and take the slow path that will wait on mmap_sem. But we could very well be in
    a hash_page with local ptep pointer value. Such a hash page can result in adding new
    HPTE entries for normal subpages/small page. That means we could be modifying the
    page content as we copy them to a huge page. Fix this by waiting on hash_page to finish
    after marking the pmd none and bfore invalidating HPTE entries. We use the heavy
    synchronize_sched(). This should be ok as we do this in the background khugepaged thread
    and not in application context. Also if we find collapse slow we can ideally increase
    the scan rate.
    
    Signed-off-by: Aneesh Kumar K.V <aneesh.kumar< at >linux.vnet.ibm.com>

diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index bbecac4..92b733e 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
< at >< at > -532,6 +532,7 < at >< at > pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
        pmd_t *pmdp)
 {
 pmd_t pmd;
+struct mm_struct *mm = vma->vm_mm;
 
 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
 if (pmd_trans_huge(*pmdp)) {
< at >< at > -542,6 +543,16 < at >< at > pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
  */
 pmd = *pmdp;
 pmd_clear(pmdp);
+spin_unlock(&mm->page_table_lock);
+/*
+ * Wait for all pending hash_page to finish
+ * We can do this by waiting for a context switch to happen on
+ * the cpus. Any new hash_page after this will see pmd none
+ * and fallback to code that takes mmap_sem and hence will block
+ * for collapse to finish.
+ */
+synchronize_sched();
+spin_lock(&mm->page_table_lock);
 /*
  * Now invalidate the hpte entries in the range
  * covered by pmd. This make sure we take a

Re: [PATCH v2] powerpc/pci: Fix setup of Freescale PCI / PCIe controllers

Michael Guntsche — 2013-06-18T17:31:58

I did a quick check against -rc6 and the system compiles and boots up fine.

/Mike

Re: [PATCH 5/5] powerpc/fsl_msi: add 'msiregs' kernel parameter

Scott Wood — 2013-06-18T16:22:25

Removed.

-Scott

Re: [PATCH 3/5] powerpc/dts: update MSI bindings doc for MPIC v4.3

Scott Wood — 2013-06-18T16:21:48

It should be the bank size.  There's already inconsistency between  
pq3-mpic.dtsi and qoriq-mpic.dtsi (the latter has 0x200).  I think  
pq3-mpic.dtsi is just wrong and should be fixed.

-Scott

Re: [PATCH 3/4] KVM: PPC: Add support for IOMMU in-kernel handling

Alex Williamson — 2013-06-18T14:48:55

The current model is not x86 specific, but it only covers doing iommu
and device access through vfio.  The kink here is that we're trying to
do device access and setup through vfio, but iommu manipulation through
kvm.  We may want to revisit whether we can do the in-kernel iommu
manipulation through vfio rather than kvm.

For vfio in general, the group is the unit of ownership.  A user is
granted access to /dev/vfio/$GROUP through file permissions.  The user
opens the group and a container (/dev/vfio/vfio) and calls SET_CONTAINER
on the group.  If supported by the platform, multiple groups can be set
to the same container, which allows for iommu domain sharing.  Once a
group is associated with a container, an iommu backend can be
initialized for the container.  Only then can a device be accessed
through the group.

So even if we were to pass a vfio group file descriptor into kvm and it
matched as some kind of ownership token on the iommu group, it's not
clear that's sufficient to assume we can start programming the iommu.
Thanks,

Alex

Re: [PATCH] powerpc: Fix bad pmd error with book3E config

Aneesh Kumar K.V — 2013-06-18T13:02:22


Ben,

This is regression introduced by
e2b3d202d1dba8f3546ed28224ce485bc50010be 
"powerpc: Switch 16GB and 16MB explicit hugepages to a different page table format"

and should go upstream in 3.10

$git describe  --contains e2b3d202d1dba8f3546ed28224ce485bc50010be
v3.10-rc1~121^2~15

Without this path, we leak hugepd with all subarchs using old huge page
directory format.

-aneesh

Re: [PATCH v2 08/11] irqdomain: Refactor irq_domain_associate_many()

Grant Likely — 2013-06-18T12:13:42

Excellent, thanks for testing.

g.

Re: [PATCH v2 08/11] irqdomain: Refactor irq_domain_associate_many()

Michael Neuling — 2013-06-18T11:04:55


Yep, it fixes it.  Thanks.

Mikey

Re: [PATCH v2 08/11] irqdomain: Refactor irq_domain_associate_many()

Grant Likely — 2013-06-18T09:46:17

Ugh. I flubbed the commit. Try this patch. It should solve the problem:

From b7ba09c29ed36eda8e16453646b55faea7f9c25f Mon Sep 17 00:00:00 2001
From: Grant Likely <grant.likely< at >linaro.org>
Date: Tue, 18 Jun 2013 10:15:19 +0100
Subject: [PATCH] irqdomain: Fix flubbed irq_domain_associate_many refactoring

commit d39046ec72, "irqdomain: Refactor irq_domain_associate_many()" was
missing the following hunk which causes a boot failure on anything using
irq_domain_add_tree() to allocate an irq domain.

Signed-off-by: Grant Likely <grant.likely< at >linaro.org>
Cc: Michael Neuling <mikey< at >neuling.org>
Cc: Benjamin Herrenschmidt <benh< at >kernel.crashing.org>,
Cc: Thomas Gleixner <tglx< at >linutronix.de>,
Cc: Stephen Rothwell <sfr< at >canb.auug.org.au>
---
 include/linux/irqdomain.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index 02f7658..c983ed1 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
< at >< at > -162,7 +162,7 < at >< at > static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node
  const struct irq_domain_ops *ops,
  void *host_data)
 {
-return irq_domain_add_linear(of_node, 0, ops, host_data);
+return __irq_domain_add(of_node, 0, ~0, 0, ops, host_data);
 }
 
 extern void irq_domain_remove(struct irq_domain *host);

Re: [PATCH v2 08/11] irqdomain: Refactor irq_domain_associate_many()

Grant Likely — 2013-06-18T09:05:31

Odd. Of all the changes in that series, I would not have expected that
one to cause any problems. I'm digging into it now...

g.

Re: [RFC 08/10] irqdomain: Refactor irq_domain_associate_many()

Grant Likely — 2013-06-18T08:54:58

[...]

Define what you mean by "dangerous". You are correct that it is a bad
situation, and the kernel will complain very loudly if it happens.
However, the users of irq_domain_associate_many() are usually irq
controllers using a legacy domain that needs to be set up during early
boot. If the IRQ controller setup fails and gets unwound, then it is
very likely that there will be no output at all from the kernel. This
has actually been a problem on a number of platforms and it is a big
part of why this irqdomain refactoring series wasn't merged 6 months
ago.

I think it is better to relax the behaviour of
irq_domain_associate_many() so that if something fails, then at least
it can limp along and try to get at least some of the irqs associated.
That way we can find and fix problematic platforms rather than failing
silently.

Also, I don't see anything particularly dangerous about this behaviour
other than having some of the hwirqs not being associated with a virq.
The code protects against this path and if an irq controller receives
an IRQ on a unassociated hwirq, then the kernel will also log that as
an error.

g.
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[PATCH 26/31] powerpc/eeh: Allow to check fenced PHB proactively

Gavin Shan — 2013-06-18T08:33:50

It's meaningless to handle frozen PE if we already had fenced PHB.
The patch intends to check the PHB state before checking PE. If the
PHB has been put into fenced state, we need take care of that firstly.

Signed-off-by: Gavin Shan <shangw< at >linux.vnet.ibm.com>
---
 arch/powerpc/kernel/eeh.c |   60 +++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 81cd031..7c567be 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
< at >< at > -269,6 +269,58 < at >< at > static inline unsigned long eeh_token_to_phys(unsigned long token)
 return pa | (token & (PAGE_SIZE-1));
 }
 
+/*
+ * On PowerNV platform, we might already have fenced PHB there.
+ * For that case, it's meaningless to recover frozen PE. Intead,
+ * We have to handle fenced PHB firstly.
+ */
+static int eeh_phb_check_failure(struct eeh_pe *pe)
+{
+struct eeh_pe *phb_pe;
+unsigned long flags;
+int ret;
+
+if (!eeh_probe_mode_dev())
+return -EPERM;
+
+/* Find the PHB PE */
+phb_pe = eeh_phb_pe_get(pe->phb);
+if (!phb_pe) {
+pr_warning("%s Can't find PE for PHB#%d\n",
+   __func__, pe->phb->global_number);
+return -EEXIST;
+}
+
+/* If the PHB has been in problematic state */
+eeh_serialize_lock(&flags);
+if (phb_pe->state & (EEH_PE_ISOLATED | EEH_PE_PHB_DEAD)) {
+ret = 0;
+goto out;
+}
+
+/* Check PHB state */
+ret = eeh_ops->get_state(phb_pe, NULL);
+if ((ret < 0) ||
+    (ret == EEH_STATE_NOT_SUPPORT) ||
+    (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
+    (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
+ret = 0;
+goto out;
+}
+
+/* Isolate the PHB and send event */
+eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
+eeh_serialize_unlock(flags);
+eeh_send_failure_event(phb_pe);
+
+WARN(1, "EEH: PHB failure detected\n");
+
+return 1;
+out:
+eeh_serialize_unlock(flags);
+return ret;
+}
+
 /**
  * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
  * < at >edev: eeh device
< at >< at > -319,6 +371,14 < at >< at > int eeh_dev_check_failure(struct eeh_dev *edev)
 return 0;
 }
 
+/*
+ * On PowerNV platform, we might already have fenced PHB
+ * there and we need take care of that firstly.
+ */
+ret = eeh_phb_check_failure(pe);
+if (ret > 0)
+return ret;
+
 /* If we already have a pending isolation event for this
  * slot, we know it's bad already, we don't need to check.
  * Do this checking under a lock; as multiple PCI devices

[PATCH 16/31] powerpc/eeh: EEH backend for P7IOC

Gavin Shan — 2013-06-18T08:33:40

For EEH on PowerNV platform, the overall architecture is different
from that on pSeries platform. In order to support multiple I/O chips
in future, we split EEH to 3 layers for PowerNV platform: EEH core,
platform layer, I/O layer. It would give EEH implementation on PowerNV
platform much more flexibility in future.

The patch adds the EEH backend for P7IOC.

Signed-off-by: Gavin Shan <shangw< at >linux.vnet.ibm.com>
---
 arch/powerpc/platforms/powernv/Makefile   |    1 +
 arch/powerpc/platforms/powernv/eeh-ioda.c |   45 +++++++++++++++++++++++++++++
 arch/powerpc/platforms/powernv/pci.h      |   23 +++++++++++++++
 3 files changed, 69 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/platforms/powernv/eeh-ioda.c

diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index bcc3cb4..09bd0cb 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
< at >< at > -3,3 +3,4 < at >< at > obj-y+= opal-rtc.o opal-nvram.o
 
 obj-$(CONFIG_SMP)+= smp.o
 obj-$(CONFIG_PCI)+= pci.o pci-p5ioc2.o pci-ioda.o
+obj-$(CONFIG_EEH)+= eeh-ioda.o
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
new file mode 100644
index 0000000..f12e888
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
< at >< at > -0,0 +1,45 < at >< at >
+/*
+ * The file intends to implement the functions needed by EEH, which is
+ * built on IODA compliant chip. Actually, lots of functions related
+ * to EEH would be built based on the OPAL APIs.
+ *
+ * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2013.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/bootmem.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/msi.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+
+#include <asm/eeh.h>
+#include <asm/eeh_event.h>
+#include <asm/io.h>
+#include <asm/iommu.h>
+#include <asm/msi_bitmap.h>
+#include <asm/opal.h>
+#include <asm/pci-bridge.h>
+#include <asm/ppc-pci.h>
+#include <asm/tce.h>
+
+#include "powernv.h"
+#include "pci.h"
+
+struct pnv_eeh_ops ioda_eeh_ops = {
+.post_init= NULL,
+.set_option= NULL,
+.get_state= NULL,
+.reset= NULL,
+.get_log= NULL,
+.configure_bridge= NULL,
+.next_error= NULL
+};
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index 25d76c4..336c9dc 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
< at >< at > -66,15 +66,35 < at >< at > struct pnv_ioda_pe {
 struct list_headlist;
 };
 
+/* IOC dependent EEH operations */
+#ifdef CONFIG_EEH
+struct pnv_eeh_ops {
+int (*post_init)(struct pci_controller *hose);
+int (*set_option)(struct eeh_pe *pe, int option);
+int (*get_state)(struct eeh_pe *pe);
+int (*reset)(struct eeh_pe *pe, int option);
+int (*get_log)(struct eeh_pe *pe, int severity,
+       char *drv_log, unsigned long len);
+int (*configure_bridge)(struct eeh_pe *pe);
+int (*next_error)(struct eeh_pe **pe);
+};
+#endif /* CONFIG_EEH */
+
 struct pnv_phb {
 struct pci_controller*hose;
 enum pnv_phb_typetype;
 enum pnv_phb_modelmodel;
+u64hub_id;
 u64opal_id;
 void __iomem*regs;
 intinitialized;
 spinlock_tlock;
 
+#ifdef CONFIG_EEH
+struct pnv_eeh_ops*eeh_ops;
+inteeh_enabled;
+#endif
+
 #ifdef CONFIG_PCI_MSI
 unsigned intmsi_base;
 unsigned intmsi32_support;
< at >< at > -150,6 +170,9 < at >< at > struct pnv_phb {
 };
 
 extern struct pci_ops pnv_pci_ops;
+#ifdef CONFIG_EEH
+extern struct pnv_eeh_ops ioda_eeh_ops;
+#endif
 
 extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
       void *tce_mem, u64 tce_size,

[PATCH 02/31] powerpc/eeh: Cleanup for EEH core

Gavin Shan — 2013-06-18T08:33:26

While moving EEH core around from pSeries platform directory to
arch/powerpc/kernel (in previous one patch), there has lots of
complaints for coding style from "git show". The patch is going
to fix them.

Signed-off-by: Gavin Shan <shangw< at >linux.vnet.ibm.com>
---
 arch/powerpc/kernel/eeh.c        |   22 +++++++++++-----------
 arch/powerpc/kernel/eeh_driver.c |   14 +++++++-------
 2 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 6b73d6c..8a83451 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
< at >< at > -368,7 +368,7 < at >< at > int eeh_dev_check_failure(struct eeh_dev *edev)
 }
 
 eeh_stats.slot_resets++;
- 
+
 /* Avoid repeated reports of this failure, including problems
  * with other functions on this device, and functions under
  * bridges.
< at >< at > -525,7 +525,7 < at >< at > static void eeh_reset_pe_once(struct eeh_pe *pe)
  * or a fundamental reset (3).
  * A fundamental reset required by any device under
  * Partitionable Endpoint trumps hot-reset.
-   */
+ */
 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
 
 if (freset)
< at >< at > -538,8 +538,8 < at >< at > static void eeh_reset_pe_once(struct eeh_pe *pe)
  */
 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
 msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
-
-/* We might get hit with another EEH freeze as soon as the 
+
+/* We might get hit with another EEH freeze as soon as the
  * pci slot reset line is dropped. Make sure we don't miss
  * these, and clear the flag now.
  */
< at >< at > -604,7 +604,7 < at >< at > void eeh_save_bars(struct eeh_dev *edev)
 if (!edev)
 return;
 dn = eeh_dev_to_of_node(edev);
-
+
 for (i = 0; i < 16; i++)
 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
 }
< at >< at > -803,12 +803,12 < at >< at > void eeh_add_device_tree_late(struct pci_bus *bus)
 struct pci_dev *dev;
 
 list_for_each_entry(dev, &bus->devices, bus_list) {
- eeh_add_device_late(dev);
- if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
- struct pci_bus *subbus = dev->subordinate;
- if (subbus)
- eeh_add_device_tree_late(subbus);
- }
+eeh_add_device_late(dev);
+if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
+struct pci_bus *subbus = dev->subordinate;
+if (subbus)
+eeh_add_device_tree_late(subbus);
+}
 }
 }
 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index a3fefb6..0acc5a2 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
< at >< at > -154,9 +154,9 < at >< at > static void eeh_enable_irq(struct pci_dev *dev)
  * eeh_report_error - Report pci error to each device driver
  * < at >data: eeh device
  * < at >userdata: return value
- * 
- * Report an EEH error to each device driver, collect up and 
- * merge the device driver responses. Cumulative response 
+ *
+ * Report an EEH error to each device driver, collect up and
+ * merge the device driver responses. Cumulative response
  * passed back in "userdata".
  */
 static void *eeh_report_error(void *data, void *userdata)
< at >< at > -376,9 +376,9 < at >< at > static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
 eeh_pe_restore_bars(pe);
 
 /* Give the system 5 seconds to finish running the user-space
- * hotplug shutdown scripts, e.g. ifdown for ethernet.  Yes, 
- * this is a hack, but if we don't do this, and try to bring 
- * the device up before the scripts have taken it down, 
+ * hotplug shutdown scripts, e.g. ifdown for ethernet.  Yes,
+ * this is a hack, but if we don't do this, and try to bring
+ * the device up before the scripts have taken it down,
  * potentially weird things happen.
  */
 if (bus) {
< at >< at > -520,7 +520,7 < at >< at > void eeh_handle_event(struct eeh_pe *pe)
 eeh_pe_dev_traverse(pe, eeh_report_resume, NULL);
 
 return;
-
+
 excess_failures:
 /*
  * About 90% of all real-life EEH failures in the field

Re: [PATCH v5 00/31] EEH Support for PowerNV platform

Gavin Shan — 2013-06-18T08:41:44

Hi Ben,

I resend the whole series of patches because some newly added patches among
it.


.../...


Please review those patches at your available time. The left patches shouldn't
be changed or with minor changes without affecting the whole logic. Thanks in
advance for your time :-)

The target of v5 is mainly for following aspects according to your comments:

- Make EEH core running with single-kthread.
- Add new eeh_ops::next_error() for PowerNV platform to use. Almost all stuff
  of original pci-err.c moved to the backend.
- Hanle special event (without binding PE) in EEH core. The special events
  are purely come from PowerNV platform (error interrupts).


Thanks,
Gavin

[PATCH 25/31] powerpc/eeh: Enable EEH check for config access

Gavin Shan — 2013-06-18T08:33:49

The patch enables EEH check and let EEH core to process the EEH
errors for PowerNV platform while accessing config space. Originally,
the implementation already had mechanism to check EEH errors and
tried to recover from them. However, we never let EEH core to handle
the EEH errors.

Signed-off-by: Gavin Shan <shangw< at >linux.vnet.ibm.com>
---
 arch/powerpc/platforms/powernv/pci.c |   40 +++++++++++++++++++++++++++++++++-
 1 files changed, 39 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 20af220..6d9a506 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
< at >< at > -32,6 +32,8 < at >< at >
 #include <asm/iommu.h>
 #include <asm/tce.h>
 #include <asm/firmware.h>
+#include <asm/eeh_event.h>
+#include <asm/eeh.h>
 
 #include "powernv.h"
 #include "pci.h"
< at >< at > -259,6 +261,10 < at >< at > static int pnv_pci_read_config(struct pci_bus *bus,
 {
 struct pci_controller *hose = pci_bus_to_host(bus);
 struct pnv_phb *phb = hose->private_data;
+#ifdef CONFIG_EEH
+struct device_node *busdn, *dn;
+struct eeh_pe *phb_pe = NULL;
+#endif
 u32 bdfn = (((uint64_t)bus->number) << 8) | devfn;
 s64 rc;
 
< at >< at > -291,8 +297,34 < at >< at > static int pnv_pci_read_config(struct pci_bus *bus,
 cfg_dbg("pnv_pci_read_config bus: %x devfn: %x +%x/%x -> %08x\n",
 bus->number, devfn, where, size, *val);
 
-/* Check if the PHB got frozen due to an error (no response) */
+/*
+ * Check if the specified PE has been put into frozen
+ * state. On the other hand, we needn't do that while
+ * the PHB has been put into frozen state because of
+ * PHB-fatal errors.
+ */
+#ifdef CONFIG_EEH
+phb_pe = eeh_phb_pe_get(hose);
+if (phb_pe && (phb_pe->state & EEH_PE_ISOLATED))
+return PCIBIOS_SUCCESSFUL;
+
+if (phb->eeh_enabled) {
+if (*val == EEH_IO_ERROR_VALUE(size)) {
+busdn = pci_bus_to_OF_node(bus);
+for (dn = busdn->child; dn; dn = dn->sibling) {
+struct pci_dn *pdn = PCI_DN(dn);
+
+if (pdn && pdn->devfn == devfn &&
+    eeh_dev_check_failure(of_node_to_eeh_dev(dn)))
+return PCIBIOS_DEVICE_NOT_FOUND;
+}
+}
+} else {
+pnv_pci_config_check_eeh(phb, bus, bdfn);
+}
+#else
 pnv_pci_config_check_eeh(phb, bus, bdfn);
+#endif
 
 return PCIBIOS_SUCCESSFUL;
 }
< at >< at > -323,8 +355,14 < at >< at > static int pnv_pci_write_config(struct pci_bus *bus,
 default:
 return PCIBIOS_FUNC_NOT_SUPPORTED;
 }
+
 /* Check if the PHB got frozen due to an error (no response) */
+#ifdef CONFIG_EEH
+if (!phb->eeh_enabled)
+pnv_pci_config_check_eeh(phb, bus, bdfn);
+#else
 pnv_pci_config_check_eeh(phb, bus, bdfn);
+#endif
 
 return PCIBIOS_SUCCESSFUL;
 }

[PATCH 11/31] powerpc/eeh: Trace time on first error for PE

Gavin Shan — 2013-06-18T08:33:35

We're not expecting that one specific PE got frozen for over 5
times in last hour. Otherwise, the PE will be removed from the
system upon newly coming EEH errors. The patch introduces time
stamp to trace the first error on specific PE in last hour and
function to update that accordingly. Besides, the time stamp
is recovered during PE hotplug path as we did for frozen count.

Signed-off-by: Gavin Shan <shangw< at >linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/eeh.h   |    3 +++
 arch/powerpc/kernel/eeh_driver.c |    5 +++++
 arch/powerpc/kernel/eeh_pe.c     |   27 +++++++++++++++++++++++++++
 3 files changed, 35 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index beec788..e1109fd 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
< at >< at > -24,6 +24,7 < at >< at >
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/string.h>
+#include <linux/time.h>
 
 struct pci_dev;
 struct pci_bus;
< at >< at > -62,6 +63,7 < at >< at > struct eeh_pe {
 struct pci_bus *bus;/* Top PCI bus for bus PE*/
 int check_count;/* Times of ignored error*/
 int freeze_count;/* Times of froze up*/
+struct timeval tstamp;/* Time on first-time freeze*/
 int false_positives;/* Times of reported #ff's*/
 struct eeh_pe *parent;/* Parent PE*/
 struct list_head child_list;/* Link PE to the child list*/
< at >< at > -190,6 +192,7 < at >< at > struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
 struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
 int eeh_add_to_parent_pe(struct eeh_dev *edev);
 int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe);
+void eeh_pe_update_time_stamp(struct eeh_pe *pe);
 void *eeh_pe_dev_traverse(struct eeh_pe *root,
 eeh_traverse_func fn, void *flag);
 void eeh_pe_restore_bars(struct eeh_pe *pe);
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 0acc5a2..69102b1 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
< at >< at > -349,10 +349,12 < at >< at > static void *eeh_report_failure(void *data, void *userdata)
  */
 static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
 {
+struct timeval tstamp;
 int cnt, rc;
 
 /* pcibios will clear the counter; save the value */
 cnt = pe->freeze_count;
+tstamp = pe->tstamp;
 
 /*
  * We don't remove the corresponding PE instances because
< at >< at > -385,6 +387,8 < at >< at > static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
 ssleep(5);
 pcibios_add_pci_devices(bus);
 }
+
+pe->tstamp = tstamp;
 pe->freeze_count = cnt;
 
 return 0;
< at >< at > -425,6 +429,7 < at >< at > void eeh_handle_event(struct eeh_pe *pe)
 return;
 }
 
+eeh_pe_update_time_stamp(pe);
 pe->freeze_count++;
 if (pe->freeze_count > EEH_MAX_ALLOWED_FREEZES)
 goto excess_failures;
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index 5bd1637..2246ef5 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
< at >< at > -487,6 +487,33 < at >< at > int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
 }
 
 /**
+ * eeh_pe_update_time_stamp - Update PE's frozen time stamp
+ * < at >pe: EEH PE
+ *
+ * We have time stamp for each PE to trace its time of getting
+ * frozen in last hour. The function should be called to update
+ * the time stamp on first error of the specific PE. On the other
+ * handle, we needn't account for errors happened in last hour.
+ */
+void eeh_pe_update_time_stamp(struct eeh_pe *pe)
+{
+struct timeval tstamp;
+
+if (!pe) return;
+
+if (pe->freeze_count <= 0) {
+pe->freeze_count = 0;
+do_gettimeofday(&pe->tstamp);
+} else {
+do_gettimeofday(&tstamp);
+if (tstamp.tv_sec - pe->tstamp.tv_sec > 3600) {
+pe->tstamp = tstamp;
+pe->freeze_count = 0;
+}
+}
+}
+
+/**
  * __eeh_pe_state_mark - Mark the state for the PE
  * < at >data: EEH PE
  * < at >flag: state