http://blog.gmane.org/gmane.linux.ports.ia64.gelato hourly 1 1901-01-01T00:00+00:00 http://gmane.org/img/gmane-25t.png http://gmane.org http://permalink.gmane.org/gmane.linux.ports.ia64.gelato/858 <pre> CALL FOR PAPERS =============== Eighth Workshop on Explicitly Parallel Instruction Computing Architectures and Compiler Technology (EPIC-8) April 24, 2010 Toronto, Canada http://www.cgo.org/cgo2010/epic8/ In conjunction with the IEEE/ACM International Symposium on Code Generation and Optimization (CGO) Researchers from both academia and industry are invited to share their latest research findings in the area of EPIC architectures and compiler technology. The EPIC style of architecture was developed to enable new levels of instruction-level parallelism not achieved with traditional architectures. By allowing the compiler to express program parallelism and other relevant information directly to the processor, EPIC architectures can overcome hardware complexity issues that limit performance in traditional microprocessors. The major challenge in realizing the full potential of EPIC architectures is developing compiler and runtime optimization technologies that effectively deploy explicitly defined hardware mechanisms, and deliver performance for both commercial and scientific applications. This workshop will focus on promising research concepts that enable the EPIC architecture model. TOPICS OF INTEREST Topics of interest include, but are not limited to: Compiler Optimizations: - Instruction scheduling, software pipelining, predication, control and data speculation, register allocation - Thread-level parallelization - Versioning approaches to dynamically adapt to runtime behavior - Techniques to mitigate in-order memory stalls, like prefetching, helper threads, and load clustering - Compiler-directed memory-hierarchy and cache-coherency management - Methods of program analysis and verification that are related to EPIC - Higher-level optimizations that are related to EPIC - Validation of compiler optimizations Binary Translation: - Methods of binary translation applicable to EPIC architectures - Hardware support of binary translation Feedback-Directed Optimizations: - Especially performance monitoring unit (PMU) driven optimizations - Dynamic optimizations Microarchitecture: - Novel architectures and microarchitectures - In-order versus out-of-order designs, hybrid approaches - Multi-threaded and multi-core EPIC architectures - Power and energy aware computing techniques for EPIC machines Advanced Uses of EPIC Architectures: - Virtualization and Secure Computing - Special purpose applications Performance Analysis of EPIC Architectures: - Commercial and scientific workload studies for EPIC models - Effects of architectural features on workload behavior - Experimental evaluation of Itanium microprocessors - Performance comparisons with other architectures - Tools for analysis, instrumentation, and architecture experiments CHAIR Andrey Bokhanko, Intel andrey.s.bokhanko-ral2JQCrhuEAvxtiuMwx3w&lt; at &gt;public.gmane.org IMPORTANT DATES **** SUBMISSION DEADLINE: Monday, February 15, 2010 **** Acceptances Mailed: February 22, 2010 Final Version Due: April 2, 2010 Workshop Date: April 24, 2010 (half day workshop) SUBMISSION GUIDELINES Full papers of up to 22 pages or extended abstracts of up to 8 pages can be submitted (8.5"x11" double-spaced pages, using 11pt or larger font). Clearly describe the nature of the work, its significance and the current status of the research. Include a title page containing the title of the paper, list of authors and their affiliations, addresses, telephone and fax numbers, email addresses and the name of the corresponding author. papers will be published on EPIC-8 web-site (the copyright will remain with the author). </pre> Mark K. Smith 2009-12-16T20:43:56 http://permalink.gmane.org/gmane.linux.ports.ia64.gelato/857 <pre> Jesse&gt; Hi David Thats the thing, HP does sell arrays but most of the Jesse&gt; ones I have found only have support for Linux x86 boxes. I cant Jesse&gt; find Linux ia64 support for any HP array, if I found one, I'd Jesse&gt; be all over it. Most fibrechannel arrays will work. We've tested the MSA Fibrechannel array with a small rack-mounted HP Itanium --- can't remember the model numbers, sorry. Alternatively, you can just get an external disk enclosure and use software-RAID. What you do depends on your requirements. Is size the key thing or do you want high performance as well? How important is 24x7 operation? Peter C -- Dr Peter Chubbwww.nicta.com.au peter DOT chubb AT nicta.com.au http://www.ertos.nicta.com.au ERTOS within National ICT Australia </pre> Peter Chubb 2009-11-06T20:18:29 http://permalink.gmane.org/gmane.linux.ports.ia64.gelato/856 <pre>Hi David Thats the thing, HP does sell arrays but most of the ones I have found only have support for Linux x86 boxes. I cant find Linux ia64 support for any HP array, if I found one, I'd be all over it. Jesse </pre> Jesse Dougherty 2009-11-06T17:49:10 http://permalink.gmane.org/gmane.linux.ports.ia64.gelato/855 <pre>_______________________________________________ Gelato-technical mailing list Gelato-technical-M3ycANVxPotyL3EAZA59ERCuuivNXqWP&lt; at &gt;public.gmane.org https://www.gelato.unsw.edu.au/mailman/listinfo/gelato-technical </pre> Lombard, David N 2009-11-06T17:27:34 http://permalink.gmane.org/gmane.linux.ports.ia64.gelato/854 <pre>Let me start by saying, I'm a sales person with limited knowledge of Linux. We mainly sell HP / HP-UX related hardware. I need to find a storage array that is supported under SuSE Linux. The host server is an HP Itanium ia64 type server. I need to have about 5TB of storage. Can anyone point me to a storage array that will be compatible with the above hardware and OS? Thanks Jesse Cypress Technology Inc </pre> Jesse Dougherty 2009-11-06T16:59:41 Search the mailing list at Gmane query http://search.gmane.org/?group=$group=gmane.linux.ports.ia64.gelato