gmane.linux.ports.arm.kernel

[STABLE PATCH] ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held

Will Deacon — 2012-05-25T14:38:04

From: Dima Zavin <dima< at >android.com>

commit 435a7ef52db7d86e67a009b36cac1457f8972391 upstream

We can't be holding the mmap_sem while calling flush_cache_user_range
because the flush can fault. If we fault on a user address, the
page fault handler will try to take mmap_sem again. Since both places
acquire the read lock, most of the time it succeeds. However, if another
thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in
between the call to flush_cache_user_range and the fault, the down_read
in do_page_fault will deadlock.

[will: removed drop of vma parameter as already queued by rmk (7365/1)]

Cc: <stable< at >vger.kernel.org> # 2.6.32+: 4542b6a0: ARM: 7365/1
Cc: <stable< at >vger.kernel.org> # 2.6.32+
Acked-by: Catalin Marinas <catalin.marinas< at >arm.com>
Signed-off-by: Dima Zavin <dima< at >android.com>
Signed-off-by: John Stultz <john.stultz< at >linaro.org>
Signed-off-by: Will Deacon <will.deacon< at >arm.com>
Signed-off-by: Russell King <rmk+kernel< at >arm.linux.org.uk>
---

Greg: This patch is a candidate for -stable, but its dependency (listed
      above) wasn't marked as such, hence this retrospective submission.

 arch/arm/kernel/traps.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 55b2f3d..63d402f 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
< at >< at > -496,7 +496,9 < at >< at > do_cache_op(unsigned long start, unsigned long end, int flags)
 if (end > vma->vm_end)
 end = vma->vm_end;
 
+up_read(&mm->mmap_sem);
 flush_cache_user_range(start, end);
+return;
 }
 up_read(&mm->mmap_sem);
 }

[PATCH 2/2] mtd mxc_nand: move ecc strengh setup before nand_scan_tail

Sascha Hauer — 2012-05-25T14:22:42

Since this commit:

  commit 6a918bade9dab40aaef80559bd1169c69e8d69cb
  Author: Mike Dunn <mikedunn< at >newsguy.com>
  Date:   Sun Mar 11 14:21:11 2012 -0700

     mtd: flash drivers set ecc strength

The mxc_nand driver fails with:

Driver must set ecc.strength when using hardware ECC

This is because nand_scan_tail checks for correct ecc strength
settings, so we must set them up before nand_scan_tail.

Signed-off-by: Sascha Hauer <s.hauer< at >pengutronix.de>
Cc: stable< at >vger.kernel.org
---
 drivers/mtd/nand/mxc_nand.c |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 4d27ddc..aaf042b 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
< at >< at > -1485,12 +1485,6 < at >< at > static int __init mxcnd_probe(struct platform_device *pdev)
 else if (mtd->writesize == 4096)
 this->ecc.layout = host->devtype_data->ecclayout_4k;
 
-/* second phase scan */
-if (nand_scan_tail(mtd)) {
-err = -ENXIO;
-goto escan;
-}
-
 if (this->ecc.mode == NAND_ECC_HW) {
 if (nfc_is_v1())
 this->ecc.strength = 1;
< at >< at > -1498,6 +1492,12 < at >< at > static int __init mxcnd_probe(struct platform_device *pdev)
 this->ecc.strength = (host->eccsize == 4) ? 4 : 8;
 }
 
+/* second phase scan */
+if (nand_scan_tail(mtd)) {
+err = -ENXIO;
+goto escan;
+}
+
 /* Register the partitions */
 mtd_device_parse_register(mtd, part_probes,
 &(struct mtd_part_parser_data){

[PATCH 1/2] mtd mxc_nand: use 32bit copy functions

Sascha Hauer — 2012-05-25T14:22:41

The following commit changes the function used to copy from/to
the hardware buffer to memcpy_[from|to]io. This does not work
since the hardware cannot handle the byte accesses used by these
functions. Instead of reverting this patch introduce 32bit
correspondents of these functions.

commit 5775ba36ea9c760c2d7e697dac04f2f7fc95aa62
Author: Uwe Kleine-König <u.kleine-koenig< at >pengutronix.de>
Date:   Tue Apr 24 10:05:22 2012 +0200

    mtd: mxc_nand: fix several sparse warnings about incorrect address space

    Signed-off-by: Uwe Kleine-König <u.kleine-koenig< at >pengutronix.de>
    Signed-off-by: Artem Bityutskiy <artem.bityutskiy< at >linux.intel.com>

Signed-off-by: Sascha Hauer <s.hauer< at >pengutronix.de>
Cc: Uwe Kleine-König <u.kleine-koenig< at >pengutronix.de>
---
 drivers/mtd/nand/mxc_nand.c |   36 ++++++++++++++++++++++++++++--------
 1 file changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index fd14966..4d27ddc 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
< at >< at > -273,6 +273,26 < at >< at > static struct nand_ecclayout nandv2_hw_eccoob_4k = {
 
 static const char *part_probes[] = { "RedBoot", "cmdlinepart", "ofpart", NULL };
 
+static void memcpy32_fromio(void *trg, const volatile void __iomem  *src, size_t size)
+{
+int i;
+u32 *t = trg;
+const volatile u32 *s = src;
+
+for (i = 0; i < (size >> 2); i++)
+*t++ = __raw_readl(s++);
+}
+
+static void memcpy32_toio(volatile void __iomem *trg, const void *src, int size)
+{
+int i;
+volatile u32 *t = trg;
+const u32 *s = src;
+
+for (i = 0; i < (size >> 2); i++)
+__raw_writel(*s++, t++);
+}
+
 static int check_int_v3(struct mxc_nand_host *host)
 {
 uint32_t tmp;
< at >< at > -519,7 +539,7 < at >< at > static void send_read_id_v3(struct mxc_nand_host *host)
 
 wait_op_done(host, true);
 
-memcpy_fromio(host->data_buf, host->main_area0, 16);
+memcpy32_fromio(host->data_buf, host->main_area0, 16);
 }
 
 /* Request the NANDFC to perform a read of the NAND device ID. */
< at >< at > -535,7 +555,7 < at >< at > static void send_read_id_v1_v2(struct mxc_nand_host *host)
 /* Wait for operation to complete */
 wait_op_done(host, true);
 
-memcpy_fromio(host->data_buf, host->main_area0, 16);
+memcpy32_fromio(host->data_buf, host->main_area0, 16);
 
 if (this->options & NAND_BUSWIDTH_16) {
 /* compress the ID info */
< at >< at > -797,16 +817,16 < at >< at > static void copy_spare(struct mtd_info *mtd, bool bfrom)
 
 if (bfrom) {
 for (i = 0; i < n - 1; i++)
-memcpy_fromio(d + i * j, s + i * t, j);
+memcpy32_fromio(d + i * j, s + i * t, j);
 
 /* the last section */
-memcpy_fromio(d + i * j, s + i * t, mtd->oobsize - i * j);
+memcpy32_fromio(d + i * j, s + i * t, mtd->oobsize - i * j);
 } else {
 for (i = 0; i < n - 1; i++)
-memcpy_toio(&s[i * t], &d[i * j], j);
+memcpy32_toio(&s[i * t], &d[i * j], j);
 
 /* the last section */
-memcpy_toio(&s[i * t], &d[i * j], mtd->oobsize - i * j);
+memcpy32_toio(&s[i * t], &d[i * j], mtd->oobsize - i * j);
 }
 }
 
< at >< at > -1070,7 +1090,7 < at >< at > static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
 
 host->devtype_data->send_page(mtd, NFC_OUTPUT);
 
-memcpy_fromio(host->data_buf, host->main_area0, mtd->writesize);
+memcpy32_fromio(host->data_buf, host->main_area0, mtd->writesize);
 copy_spare(mtd, true);
 break;
 
< at >< at > -1086,7 +1106,7 < at >< at > static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
 break;
 
 case NAND_CMD_PAGEPROG:
-memcpy_toio(host->main_area0, host->data_buf, mtd->writesize);
+memcpy32_toio(host->main_area0, host->data_buf, mtd->writesize);
 copy_spare(mtd, false);
 host->devtype_data->send_page(mtd, NFC_INPUT);
 host->devtype_data->send_cmd(host, command, true);

Booting mx27 on linux-next

Fabio Estevam — 2012-05-25T13:56:07

Hi Sascha,

Just tried booting a mx27pdk on linux-next and it failed to boot.

Any patches I am missing?

Just wanted to check with you first prior to start debugging it.

Regards,

Fabio Estevam

[PATCH v4 4/6] gpio: introduce lock mechanism for gpiochip_find

Dong Aisheng — 2012-05-25T13:36:18

From: Dong Aisheng <dong.aisheng< at >linaro.org>

The module lock will be automatically claimed for gpiochip_find function
in case the gpio module is removed during the using of gpiochip instance.
Users are responsible to call gpiochip_put to release the lock after
the using.

Signed-off-by: Dong Aisheng <dong.aisheng< at >linaro.org>
---
 drivers/gpio/gpiolib-of.c  |    5 ++++-
 drivers/gpio/gpiolib.c     |   17 +++++++++++++++++
 include/asm-generic/gpio.h |    2 +-
 3 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index b8010a9..d521452 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
< at >< at > -63,6 +63,7 < at >< at > int of_get_named_gpio_flags(struct device_node *np, const char *propname,
                            int index, enum of_gpio_flags *flags)
 {
 struct gg_data gg_data = { .flags = flags, .out_gpio = -ENODEV };
+struct gpio_chip *chip;
 int ret;
 
 /* .of_xlate might decide to not fill in the flags, so clear it. */
< at >< at > -76,7 +77,9 < at >< at > int of_get_named_gpio_flags(struct device_node *np, const char *propname,
 return -EINVAL;
 }
 
-gpiochip_find(&gg_data, of_gpiochip_find_and_xlate);
+chip = gpiochip_find(&gg_data, of_gpiochip_find_and_xlate);
+if (chip)
+gpiochip_put(chip);
 
 of_node_put(gg_data.gpiospec.np);
 pr_debug("%s exited with status %d\n", __func__, ret);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 120b2a0..6453d43 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
< at >< at > -1144,6 +1144,18 < at >< at > int gpiochip_remove(struct gpio_chip *chip)
 EXPORT_SYMBOL_GPL(gpiochip_remove);
 
 /**
+ * gpiochip_put() - release a gpio_chip
+ * < at >chip: the chip to release
+ */
+inline void gpiochip_put(struct gpio_chip *chip)
+{
+BUG_ON(!chip);
+
+module_put(chip->owner);
+}
+EXPORT_SYMBOL_GPL(gpiochip_put);
+
+/**
  * gpiochip_find() - iterator for locating a specific gpio_chip
  * < at >data: data to pass to match function
  * < at >callback: Callback function to check gpio_chip
< at >< at > -1153,6 +1165,9 < at >< at > EXPORT_SYMBOL_GPL(gpiochip_remove);
  * 0 if the device doesn't match and non-zero if it does.  If the callback is
  * non-zero, this function will return to the caller and not iterate over any
  * more gpio_chips.
+ *
+ * Note the gpio_chip is returned with the module locked, users are responsible
+ * to release the lock with gpiochip_put(chip) after using it.
  */
 struct gpio_chip *gpiochip_find(void *data,
 int (*match)(struct gpio_chip *chip,
< at >< at > -1169,6 +1184,8 < at >< at > struct gpio_chip *gpiochip_find(void *data,
 
 if (match(gpio_desc[i].chip, data)) {
 chip = gpio_desc[i].chip;
+if (!try_module_get(chip->owner))
+chip = NULL;
 break;
 }
 }
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 365ea09..af372be 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
< at >< at > -145,7 +145,7 < at >< at > extern int __must_check gpiochip_remove(struct gpio_chip *chip);
 extern struct gpio_chip *gpiochip_find(void *data,
 int (*match)(struct gpio_chip *chip,
      void *data));
-
+extern void gpiochip_put(struct gpio_chip *chip);
 
 /* Always use the library code for GPIO management calls,
  * or when sleeping may be involved.

[PATCH] ARM: at91: aic can use fast eoi handler type

2012-05-25T12:55:11

From: Ludovic Desroches <ludovic.desroches< at >atmel.com>

The Advanced Interrupt Controller allows to use the fast EOI handler type.
It lets remove the Atmel specific workaround into arch/arm/kernel/irq.c used
to indicate to the AIC the end of the interrupt treatment.

Signed-off-by: Ludovic Desroches <ludovic.desroches< at >atmel.com>
---
 arch/arm/kernel/irq.c                  |    3 ---
 arch/arm/mach-at91/gpio.c              |   10 ++++++++--
 arch/arm/mach-at91/include/mach/irqs.h |    7 -------
 arch/arm/mach-at91/irq.c               |   10 ++++++++--
 4 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 71ccdbf..6236d1a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
< at >< at > -85,9 +85,6 < at >< at > void handle_IRQ(unsigned int irq, struct pt_regs *regs)
 generic_handle_irq(irq);
 }
 
-/* AT91 specific workaround */
-irq_finish(irq);
-
 irq_exit();
 set_irq_regs(old_regs);
 }
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 325837a..ee38e6d 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
< at >< at > -520,6 +520,11 < at >< at > static void gpio_irq_unmask(struct irq_data *d)
 __raw_writel(mask, pio + PIO_IER);
 }
 
+static void gpio_irq_eoi(struct irq_data *d)
+{
+at91_aic_write(AT91_AIC_EOICR, 0);
+}
+
 static int gpio_irq_type(struct irq_data *d, unsigned type)
 {
 switch (type) {
< at >< at > -581,6 +586,7 < at >< at > static struct irq_chip gpio_irqchip = {
 .irq_unmask= gpio_irq_unmask,
 /* .irq_set_type is set dynamically */
 .irq_set_wake= gpio_irq_set_wake,
+.irq_eoi= gpio_irq_eoi,
 };
 
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
< at >< at > -725,7 +731,7 < at >< at > static int at91_gpio_irq_map(struct irq_domain *h, unsigned int virq,
  * shorter, and the AIC handles interrupts sanely.
  */
 irq_set_chip_and_handler(virq, &gpio_irqchip,
- handle_simple_irq);
+ handle_fasteoi_irq);
 set_irq_flags(virq, IRQF_VALID);
 irq_set_chip_data(virq, at91_gpio);
 
< at >< at > -839,7 +845,7 < at >< at > void __init at91_gpio_irq_setup(void)
  * shorter, and the AIC handles interrupts sanely.
  */
 irq_set_chip_and_handler(virq, &gpio_irqchip,
- handle_simple_irq);
+ handle_fasteoi_irq);
 set_irq_flags(virq, IRQF_VALID);
 irq_set_chip_data(virq, this);
 
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index ac8b7df..2d510ee 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
< at >< at > -28,13 +28,6 < at >< at >
 
 
 /*
- * Acknowledge interrupt with AIC after interrupt has been handled.
- *   (by kernel/irq.c)
- */
-#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0)
-
-
-/*
  * IRQ interrupt symbols are the AT91xxx_ID_* symbols
  * for IRQs handled directly through the AIC, or else the AT91_PIN_*
  * symbols in gpio.h for ones handled indirectly as GPIOs.
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 601b4ee..40714f1 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
< at >< at > -55,6 +55,11 < at >< at > static void at91_aic_unmask_irq(struct irq_data *d)
 at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq);
 }
 
+static void at91_aic_eoi(struct irq_data *d)
+{
+at91_aic_write(AT91_AIC_EOICR, 0);
+}
+
 unsigned int at91_extern_irq;
 
 #define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq)
< at >< at > -133,6 +138,7 < at >< at > static struct irq_chip at91_aic_chip = {
 .irq_unmask= at91_aic_unmask_irq,
 .irq_set_type= at91_aic_set_type,
 .irq_set_wake= at91_aic_set_wake,
+.irq_eoi= at91_aic_eoi,
 };
 
 static void __init at91_aic_hw_init(unsigned int spu_vector)
< at >< at > -171,7 +177,7 < at >< at > static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
 /* Active Low interrupt, without priority */
 at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW);
 
-irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq);
+irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
 
 return 0;
< at >< at > -271,7 +277,7 < at >< at > void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
 /* Active Low interrupt, with the specified priority */
 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
 
-irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
+irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq);
 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 }

Re: [RFC PATCH 00/11] OMAP System Control Module

Konstantin Baydarov — 2012-05-25T10:50:15

  Hi.

On 05/25/2012 12:25 PM, Eduardo Valentin wrote:
In my latest version I got rid from early API set, check out patch for V3 patch set.
I'll attach patch for current version later.

BR,
    Konstantin Baydarov.

[PATCH 2/3] OMAP: avoid build wdt platform device if with dt support

2012-05-25T10:42:31

From: Xiao Jiang <jgq516< at >gmail.com>

If provided dt support, then skip add wdt platform device as usual.

Signed-off-by: Xiao Jiang <jgq516< at >gmail.com>
---
 arch/arm/mach-omap2/devices.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index ae62ece..80d7e3f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
< at >< at > -759,7 +759,7 < at >< at > static int __init omap_init_wdt(void)
 char *oh_name = "wd_timer2";
 char *dev_name = "omap_wdt";
 
-if (!cpu_class_is_omap2())
+if (!cpu_class_is_omap2() || of_have_populated_dt())
 return 0;
 
 oh = omap_hwmod_lookup(oh_name);

[PATCH 2/2] clk: mxs: rename the gpmi clock for imx28

Huang Shijie — 2012-05-25T09:25:36

rename the clock name from `8000c000.gpmi` to `8000c000.gpmi-nand`.

Signed-off-by: Huang Shijie <b32955< at >freescale.com>
---
 drivers/clk/mxs/clk-imx28.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 2826a26..003b0f3 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
< at >< at > -174,7 +174,7 < at >< at > static struct clk_lookup lcdif_lookups[] __initdata = {
 
 static struct clk_lookup gpmi_lookups[] __initdata = {
 { .dev_id = "imx28-gpmi-nand", },
-{ .dev_id = "8000c000.gpmi", },
+{ .dev_id = "8000c000.gpmi-nand", },
 };
 
 static struct clk_lookup fec_lookups[] __initdata = {

[PATCH 1/2] ARM: mx28: add gpmi-nand support

Huang Shijie — 2012-05-25T09:25:35

add gpmi-nand device tree support.
add gpmi-nand pinctrl support.

Also enable the gpmi support for mx28-evk board.

Signed-off-by: Huang Shijie <b32955< at >freescale.com>
---

add pinctrl for gpmi-nand.

---
 arch/arm/boot/dts/imx28-evk.dts |    6 ++++++
 arch/arm/boot/dts/imx28.dtsi    |   35 ++++++++++++++++++++++++++---------
 2 files changed, 32 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index ee520a5..e53cf67 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
< at >< at > -22,6 +22,12 < at >< at >
 
 apb< at >80000000 {
 apbh< at >80000000 {
+gpmi-nand< at >8000c000 {
+pinctrl-names = "default";
+pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
+status = "okay";
+};
+
 ssp0: ssp< at >80010000 {
 compatible = "fsl,imx28-mmc";
 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 4634cb8..2636339 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
< at >< at > -68,15 +68,15 < at >< at >
 status = "disabled";
 };
 
-bch< at >8000a000 {
-reg = <0x8000a000 2000>;
-interrupts = <41>;
-status = "disabled";
-};
-
-gpmi< at >8000c000 {
-reg = <0x8000c000 2000>;
-interrupts = <42 88>;
+gpmi-nand< at >8000c000 {
+compatible = "fsl,imx28-gpmi-nand";
+#address-cells = <1>;
+#size-cells = <1>;
+reg = <0x8000c000 2000>, <0x8000a000 2000>;
+reg-names = "gpmi-nand", "bch";
+interrupts = <88>, <41>;
+interrupt-names = "gpmi-dma", "bch";
+fsl,gpmi-dma-channel = <4>;
 status = "disabled";
 };
 
< at >< at > -167,6 +167,23 < at >< at >
 fsl,pull-up = <0>;
 };
 
+gpmi_pins_a: gpmi-nand< at >0 {
+reg = <0>;
+fsl,pinmux-ids = <0x0000 0x0010 0x0020
+0x0030 0x0040 0x0050 0x0060
+0x0070 0x0100 0x0110 0x0140
+0x0150 0x0180 0x0190 0x01a0
+0x01b0 0x01c0 >;
+fsl,drive-strength = <0>;
+fsl,voltage = <1>;
+fsl,pull-up = <0>;
+};
+
+gpmi_status_cfg: gpmi-status-cfg {
+fsl,pinmux-ids = <0x0180 0x0190 0x01c0>;
+fsl,drive-strength = <2>;
+};
+
 mac0_pins_a: mac0< at >0 {
 reg = <0>;
 fsl,pinmux-ids = <0x4000 0x4010 0x4020

Re: [PATCH] lib/decompress_unxz.c: removing all memory helper functions

Lasse Collin — 2012-05-25T08:34:32

Is it best to copy these functions to each arch, or would it be better
to have a shared file from which these functions could be pulled for
multiple archs? I wasn't sure when I wrote decompress_unxz.c, which is
why I put the extra functions there as a temporary solution.


These already have memcpy. It can save a few bytes if one reused
memmove as memcpy when using XZ compression. I got a difference of 48
bytes on x86_64.

Adding memmove to string.c on x86 means that memmove is included in the
kernel image even when memmove isn't needed. With gzip compression I
got 128 bytes bigger image on x86_64 after adding the unneeded memmove
to string.c.

I don't know if those size increases matter in practice.


s/XZ-decompressed/XZ-compressed/ :-)

[PATCH 4/4] ASoC: add mmp brownstone support

Zhangfei Gao — 2012-05-25T07:11:03

Adds Alsa audio platform driver for mmp brownstone machine

Signed-off-by: Zhangfei Gao <zhangfei.gao< at >marvell.com>
Signed-off-by: Leo Yan <leoy< at >marvell.com>
---
 sound/soc/pxa/Kconfig      |    9 ++
 sound/soc/pxa/Makefile     |    2 +
 sound/soc/pxa/brownstone.c |  303 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 314 insertions(+), 0 deletions(-)
 create mode 100644 sound/soc/pxa/brownstone.c

diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index 39461ba..b5fa91f 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
< at >< at > -205,3 +205,12 < at >< at > config SND_PXA2XX_SOC_IMOTE2
        help
          Say Y if you want to add support for SoC audio on the
  IMote 2.
+
+config SND_MMP_SOC_BROWNSTONE
+tristate "SoC Audio support for Marvell Brownstone"
+depends on SND_MMP_SOC && MACH_BROWNSTONE
+select SND_MMP_SOC_SSPA
+select SND_SOC_WM8994
+help
+  Say Y if you want to add support for SoC audio on the
+  Marvell Brownstone reference platform.
diff --git a/sound/soc/pxa/Makefile b/sound/soc/pxa/Makefile
index 07b8417..c12aa2a 100644
--- a/sound/soc/pxa/Makefile
+++ b/sound/soc/pxa/Makefile
< at >< at > -32,6 +32,7 < at >< at > snd-soc-mioa701-objs := mioa701_wm9713.o
 snd-soc-z2-objs := z2.o
 snd-soc-imote2-objs := imote2.o
 snd-soc-raumfeld-objs := raumfeld.o
+snd-soc-brownstone-objs := brownstone.o
 
 obj-$(CONFIG_SND_PXA2XX_SOC_CORGI) += snd-soc-corgi.o
 obj-$(CONFIG_SND_PXA2XX_SOC_POODLE) += snd-soc-poodle.o
< at >< at > -51,3 +52,4 < at >< at > obj-$(CONFIG_SND_SOC_TAVOREVB3) += snd-soc-tavorevb3.o
 obj-$(CONFIG_SND_SOC_ZYLONITE) += snd-soc-zylonite.o
 obj-$(CONFIG_SND_PXA2XX_SOC_IMOTE2) += snd-soc-imote2.o
 obj-$(CONFIG_SND_SOC_RAUMFELD) += snd-soc-raumfeld.o
+obj-$(CONFIG_SND_MMP_SOC_BROWNSTONE) += snd-soc-brownstone.o
diff --git a/sound/soc/pxa/brownstone.c b/sound/soc/pxa/brownstone.c
new file mode 100644
index 0000000..b024e58
--- /dev/null
+++ b/sound/soc/pxa/brownstone.c
< at >< at > -0,0 +1,303 < at >< at >
+/*
+ * linux/sound/soc/pxa/brownstone.c
+ *
+ * Copyright (C) 2011 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/timer.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/fs.h>
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/suspend.h>
+#include <linux/i2c.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/mfd/wm8994/registers.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/jack.h>
+#include <sound/soc-dapm.h>
+#include <asm/mach-types.h>
+
+#include "../codecs/wm8994.h"
+#include "mmp-sspa.h"
+
+#define BROWNSTONE_HP        0
+#define BROWNSTONE_MIC       1
+#define BROWNSTONE_HEADSET   2
+#define BROWNSTONE_HP_OFF    3
+#define BROWNSTONE_SPK_ON    0
+#define BROWNSTONE_SPK_OFF   1
+
+static struct snd_soc_card brownstone;
+static int brownstone_jack_func;
+static int brownstone_spk_func;
+
+static void brownstone_ext_control(struct snd_soc_dapm_context *dapm)
+{
+if (brownstone_spk_func == BROWNSTONE_SPK_ON) {
+snd_soc_dapm_enable_pin(dapm, "Ext Left Spk");
+snd_soc_dapm_enable_pin(dapm, "Ext Right Spk");
+} else {
+snd_soc_dapm_disable_pin(dapm, "Ext Left Spk");
+snd_soc_dapm_disable_pin(dapm, "Ext Right Spk");
+}
+
+/* set up jack connection */
+switch (brownstone_jack_func) {
+case BROWNSTONE_HP:
+snd_soc_dapm_disable_pin(dapm, "Headset Mic");
+snd_soc_dapm_enable_pin(dapm, "Main Mic");
+snd_soc_dapm_enable_pin(dapm, "Headset Stereophone");
+break;
+case BROWNSTONE_MIC:
+snd_soc_dapm_disable_pin(dapm, "Headset Mic");
+snd_soc_dapm_enable_pin(dapm, "Main Mic");
+snd_soc_dapm_disable_pin(dapm, "Headset Stereophone");
+break;
+case BROWNSTONE_HEADSET:
+snd_soc_dapm_enable_pin(dapm, "Headset Mic");
+snd_soc_dapm_disable_pin(dapm, "Main Mic");
+snd_soc_dapm_enable_pin(dapm, "Headset Stereophone");
+break;
+case BROWNSTONE_HP_OFF:
+snd_soc_dapm_disable_pin(dapm, "Headset Mic");
+snd_soc_dapm_disable_pin(dapm, "Main Mic");
+snd_soc_dapm_disable_pin(dapm, "Headset Stereophone");
+break;
+}
+snd_soc_dapm_sync(dapm);
+return;
+}
+
+static int brownstone_get_jack(struct snd_kcontrol *kcontrol,
+struct snd_ctl_elem_value *ucontrol)
+{
+ucontrol->value.integer.value[0] = brownstone_jack_func;
+return 0;
+}
+
+static int brownstone_set_jack(struct snd_kcontrol *kcontrol,
+struct snd_ctl_elem_value *ucontrol)
+{
+struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
+
+if (brownstone_jack_func == ucontrol->value.integer.value[0])
+return 0;
+
+brownstone_jack_func = ucontrol->value.integer.value[0];
+brownstone_ext_control(&card->dapm);
+return 1;
+}
+
+static int brownstone_get_spk(struct snd_kcontrol *kcontrol,
+struct snd_ctl_elem_value *ucontrol)
+{
+ucontrol->value.integer.value[0] = brownstone_spk_func;
+return 0;
+}
+
+static int brownstone_set_spk(struct snd_kcontrol *kcontrol,
+struct snd_ctl_elem_value *ucontrol)
+{
+struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
+
+if (brownstone_spk_func == ucontrol->value.integer.value[0])
+return 0;
+
+brownstone_spk_func = ucontrol->value.integer.value[0];
+brownstone_ext_control(&card->dapm);
+return 1;
+}
+
+static const struct snd_soc_dapm_widget brownstone_dapm_widgets[] = {
+SND_SOC_DAPM_SPK("Ext Left Spk", NULL),
+SND_SOC_DAPM_SPK("Ext Right Spk", NULL),
+SND_SOC_DAPM_HP("Headset Stereophone", NULL),
+SND_SOC_DAPM_MIC("Headset Mic", NULL),
+SND_SOC_DAPM_MIC("Main Mic", NULL),
+};
+
+static const struct snd_soc_dapm_route brownstone_audio_map[] = {
+{"Ext Left Spk", NULL, "SPKOUTLP"},
+{"Ext Left Spk", NULL, "SPKOUTLN"},
+
+{"Ext Right Spk", NULL, "SPKOUTRP"},
+{"Ext Right Spk", NULL, "SPKOUTRN"},
+
+{"Headset Stereophone", NULL, "HPOUT1L"},
+{"Headset Stereophone", NULL, "HPOUT1R"},
+
+{"IN1RN", NULL, "Headset Mic"},
+
+{"DMIC1DAT", NULL, "MICBIAS1"},
+{"MICBIAS1", NULL, "Main Mic"},
+};
+
+static const char *jack_function[] = {"Headphone", "Mic", "Headset", "Off"};
+static const char *spk_function[]  = {"On", "Off"};
+static const struct soc_enum brownstone_enum[] = {
+SOC_ENUM_SINGLE_EXT(4, jack_function),
+SOC_ENUM_SINGLE_EXT(2, spk_function),
+};
+
+static const struct snd_kcontrol_new brownstone_wm8994_controls[] = {
+SOC_ENUM_EXT("Jack Function", brownstone_enum[0],
+     brownstone_get_jack, brownstone_set_jack),
+SOC_ENUM_EXT("Speaker Function", brownstone_enum[1],
+     brownstone_get_spk, brownstone_set_spk),
+};
+
+static int brownstone_wm8994_init(struct snd_soc_pcm_runtime *rtd)
+{
+struct snd_soc_codec *codec = rtd->codec;
+struct snd_soc_dapm_context *dapm = &codec->dapm;
+
+brownstone_jack_func = BROWNSTONE_MIC;
+brownstone_spk_func  = BROWNSTONE_SPK_ON;
+
+snd_soc_dapm_enable_pin(dapm, "Ext Left Spk");
+snd_soc_dapm_enable_pin(dapm, "Ext Right Spk");
+snd_soc_dapm_enable_pin(dapm, "Headset Stereophone");
+snd_soc_dapm_enable_pin(dapm, "Headset Mic");
+snd_soc_dapm_enable_pin(dapm, "Main Mic");
+
+/* set endpoints to not connected */
+snd_soc_dapm_nc_pin(dapm, "HPOUT2P");
+snd_soc_dapm_nc_pin(dapm, "HPOUT2N");
+snd_soc_dapm_nc_pin(dapm, "LINEOUT1N");
+snd_soc_dapm_nc_pin(dapm, "LINEOUT1P");
+snd_soc_dapm_nc_pin(dapm, "LINEOUT2N");
+snd_soc_dapm_nc_pin(dapm, "LINEOUT2P");
+snd_soc_dapm_nc_pin(dapm, "IN1LN");
+snd_soc_dapm_nc_pin(dapm, "IN1LP");
+snd_soc_dapm_nc_pin(dapm, "IN1RP");
+snd_soc_dapm_nc_pin(dapm, "IN2LP:VXRN");
+snd_soc_dapm_nc_pin(dapm, "IN2RN");
+snd_soc_dapm_nc_pin(dapm, "IN2RP:VXRP");
+snd_soc_dapm_nc_pin(dapm, "IN2LN");
+
+snd_soc_dapm_sync(dapm);
+
+/* turn on micbias 1/2 always */
+snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1,
+    WM8994_MICB1_ENA_MASK |
+    WM8994_MICB2_ENA_MASK,
+    WM8994_MICB1_ENA |
+    WM8994_MICB2_ENA);
+return 0;
+}
+
+static int brownstone_wm8994_hw_params(struct snd_pcm_substream *substream,
+       struct snd_pcm_hw_params *params)
+{
+struct snd_soc_pcm_runtime *rtd = substream->private_data;
+struct snd_soc_dai *codec_dai = rtd->codec_dai;
+struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+int freq_out, sspa_mclk, sysclk;
+int sspa_div;
+
+if (params_rate(params) > 11025) {
+freq_out  = params_rate(params) * 512;
+sysclk    = params_rate(params) * 256;
+sspa_mclk = params_rate(params) * 64;
+} else {
+freq_out  = params_rate(params) * 1024;
+sysclk    = params_rate(params) * 512;
+sspa_mclk = params_rate(params) * 64;
+}
+sspa_div = freq_out;
+do_div(sspa_div, sspa_mclk);
+
+snd_soc_dai_set_sysclk(cpu_dai, MMP_SSPA_CLK_AUDIO, freq_out, 0);
+snd_soc_dai_set_pll(cpu_dai, MMP_SYSCLK, 0, freq_out, sysclk);
+snd_soc_dai_set_pll(cpu_dai, MMP_SSPA_CLK, 0, freq_out, sspa_mclk);
+
+/* set wm8994 sysclk */
+snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_MCLK1, sysclk, 0);
+
+snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
+
+snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
+
+return 0;
+}
+
+/* machine stream operations */
+static struct snd_soc_ops brownstone_ops = {
+.hw_params = brownstone_wm8994_hw_params,
+};
+
+static struct snd_soc_dai_link brownstone_wm8994_dai[] = {
+{
+.name= "WM8994",
+.stream_name= "WM8994 HiFi",
+.cpu_dai_name= "mmp-sspa-dai.0",
+.codec_dai_name= "wm8994-aif1",
+.platform_name= "mmp-pcm-audio",
+.codec_name= "wm8994-codec",
+.ops= &brownstone_ops,
+.init= brownstone_wm8994_init,
+},
+};
+
+/* audio machine driver */
+static struct snd_soc_card brownstone = {
+.name         = "brownstone",
+.dai_link     = brownstone_wm8994_dai,
+.num_links    = ARRAY_SIZE(brownstone_wm8994_dai),
+
+.controls = brownstone_wm8994_controls,
+.num_controls = ARRAY_SIZE(brownstone_wm8994_controls),
+.dapm_widgets = brownstone_dapm_widgets,
+.num_dapm_widgets = ARRAY_SIZE(brownstone_dapm_widgets),
+.dapm_routes = brownstone_audio_map,
+.num_dapm_routes = ARRAY_SIZE(brownstone_audio_map),
+};
+
+static int __devinit brownstone_probe(struct platform_device *pdev)
+{
+int ret;
+
+brownstone.dev = &pdev->dev;
+ret = snd_soc_register_card(&brownstone);
+if (ret)
+dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
+ret);
+return ret;
+}
+
+static int __devexit brownstone_remove(struct platform_device *pdev)
+{
+snd_soc_unregister_card(&brownstone);
+return 0;
+}
+
+static struct platform_driver mmp_driver = {
+.driver= {
+.name= "mmp-audio",
+.owner= THIS_MODULE,
+},
+.probe= brownstone_probe,
+.remove= __devexit_p(brownstone_remove),
+};
+
+module_platform_driver(mmp_driver);
+
+MODULE_AUTHOR("Leo Yan <leoy< at >marvell.com>");
+MODULE_DESCRIPTION("ALSA SoC Brownstone");
+MODULE_LICENSE("GPL");

[PATCH 3/4] ASOC: mmp: add sspa support

Zhangfei Gao — 2012-05-25T07:11:02

The SSPA is a configurable multi-channel audio serial (TDM) interface.
It's configurable at runtime to support up to 128 channels and the
number of bits per sample: 8, 12, 16, 20, 24 and 32 bits. It also
support stereo format: I2S, left-justified or right-justified.

Signed-off-by: Zhangfei Gao <zhangfei.gao< at >marvell.com>
Signed-off-by: Leo Yan <leoy< at >marvell.com>
---
 sound/soc/pxa/Kconfig    |    3 +
 sound/soc/pxa/Makefile   |    2 +
 sound/soc/pxa/mmp-sspa.c |  536 ++++++++++++++++++++++++++++++++++++++++++++++
 sound/soc/pxa/mmp-sspa.h |   92 ++++++++
 4 files changed, 633 insertions(+), 0 deletions(-)
 create mode 100644 sound/soc/pxa/mmp-sspa.c
 create mode 100644 sound/soc/pxa/mmp-sspa.h

diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index a516068..39461ba 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
< at >< at > -34,6 +34,9 < at >< at > config SND_PXA_SOC_SSP
 tristate
 select PXA_SSP
 
+config SND_MMP_SOC_SSPA
+tristate
+
 config SND_PXA2XX_SOC_CORGI
 tristate "SoC Audio support for Sharp Zaurus SL-C7x0"
 depends on SND_PXA2XX_SOC && PXA_SHARP_C7xx
diff --git a/sound/soc/pxa/Makefile b/sound/soc/pxa/Makefile
index f913e9b..07b8417 100644
--- a/sound/soc/pxa/Makefile
+++ b/sound/soc/pxa/Makefile
< at >< at > -4,12 +4,14 < at >< at > snd-soc-pxa2xx-ac97-objs := pxa2xx-ac97.o
 snd-soc-pxa2xx-i2s-objs := pxa2xx-i2s.o
 snd-soc-pxa-ssp-objs := pxa-ssp.o
 snd-soc-mmp-objs := mmp-pcm.o
+snd-soc-mmp-sspa-objs := mmp-sspa.o
 
 obj-$(CONFIG_SND_PXA2XX_SOC) += snd-soc-pxa2xx.o
 obj-$(CONFIG_SND_PXA2XX_SOC_AC97) += snd-soc-pxa2xx-ac97.o
 obj-$(CONFIG_SND_PXA2XX_SOC_I2S) += snd-soc-pxa2xx-i2s.o
 obj-$(CONFIG_SND_PXA_SOC_SSP) += snd-soc-pxa-ssp.o
 obj-$(CONFIG_SND_MMP_SOC) += snd-soc-mmp.o
+obj-$(CONFIG_SND_MMP_SOC_SSPA) += snd-soc-mmp-sspa.o
 
 # PXA Machine Support
 snd-soc-corgi-objs := corgi.o
diff --git a/sound/soc/pxa/mmp-sspa.c b/sound/soc/pxa/mmp-sspa.c
new file mode 100644
index 0000000..b78bf1e
--- /dev/null
+++ b/sound/soc/pxa/mmp-sspa.c
< at >< at > -0,0 +1,536 < at >< at >
+/*
+ * linux/sound/soc/pxa/mmp-sspa.c
+ * Base on pxa2xx-ssp.c
+ *
+ * Copyright (C) 2011 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/pxa2xx_ssp.h>
+#include <linux/io.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/initval.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/pxa2xx-lib.h>
+#include "mmp-sspa.h"
+
+/*
+ * SSPA audio private data
+ */
+struct sspa_priv {
+struct ssp_device *sspa;
+struct pxa2xx_pcm_dma_params *dma_params;
+int dai_fmt;
+int running_cnt;
+};
+
+static struct clk *audio_clk;
+static struct clk *sysclk;
+
+static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
+{
+__raw_writel(val, sspa->mmio_base + reg);
+}
+
+static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
+{
+return __raw_readl(sspa->mmio_base + reg);
+}
+
+static void mmp_sspa_tx_enable(struct ssp_device *sspa)
+{
+unsigned int sspa_sp;
+
+sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
+sspa_sp |= SSPA_SP_S_EN;
+sspa_sp |= SSPA_SP_WEN;
+mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
+}
+
+static void mmp_sspa_tx_disable(struct ssp_device *sspa)
+{
+unsigned int sspa_sp;
+
+sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
+sspa_sp &= ~SSPA_SP_S_EN;
+sspa_sp |= SSPA_SP_WEN;
+mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
+}
+
+static void mmp_sspa_rx_enable(struct ssp_device *sspa)
+{
+unsigned int sspa_sp;
+
+sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
+sspa_sp |= SSPA_SP_S_EN;
+sspa_sp |= SSPA_SP_WEN;
+mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
+}
+
+static void mmp_sspa_rx_disable(struct ssp_device *sspa)
+{
+unsigned int sspa_sp;
+
+sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
+sspa_sp &= ~SSPA_SP_S_EN;
+sspa_sp |= SSPA_SP_WEN;
+mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
+}
+
+static int mmp_sspa_startup(struct snd_pcm_substream *substream,
+struct snd_soc_dai *dai)
+{
+struct snd_soc_pcm_runtime *rtd = substream->private_data;
+struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
+struct ssp_device *sspa = sspa_priv->sspa;
+int ret = 0;
+
+if (!cpu_dai->active) {
+clk_enable(sysclk);
+clk_enable(sspa->clk);
+}
+
+return ret;
+}
+
+static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
+struct snd_soc_dai *dai)
+{
+struct snd_soc_pcm_runtime *rtd = substream->private_data;
+struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
+struct ssp_device *sspa = sspa_priv->sspa;
+
+if (!cpu_dai->active) {
+clk_disable(sspa->clk);
+clk_disable(sysclk);
+}
+
+return;
+}
+
+/*
+ * Set the SSP ports SYSCLK.
+ */
+static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
+    int clk_id, unsigned int freq, int dir)
+{
+int ret = 0;
+
+switch (clk_id) {
+case MMP_SSPA_CLK_AUDIO:
+ret = clk_set_rate(audio_clk, freq);
+if (ret)
+return ret;
+break;
+case MMP_SSPA_CLK_PLL:
+case MMP_SSPA_CLK_VCXO:
+/* not support yet */
+return -EINVAL;
+default:
+return -EINVAL;
+}
+
+return 0;
+}
+
+static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
+ int source, unsigned int freq_in,
+ unsigned int freq_out)
+{
+struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
+struct ssp_device *sspa = sspa_priv->sspa;
+
+switch (pll_id) {
+case MMP_SYSCLK:
+clk_set_rate(sysclk, freq_out);
+break;
+case MMP_SSPA_CLK:
+clk_set_rate(sspa->clk, freq_out);
+break;
+default:
+return -ENODEV;
+}
+
+return 0;
+}
+
+/*
+ * Set up the sspa dai format. The sspa port must be inactive
+ * before calling this function as the physical
+ * interface format is changed.
+ */
+static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
+ unsigned int fmt)
+{
+struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
+struct ssp_device *sspa = sspa_priv->sspa;
+u32 sspa_sp, sspa_ctrl;
+
+/* check if we need to change anything at all */
+if (sspa_priv->dai_fmt == fmt)
+return 0;
+
+/* we can only change the settings if the port is not in use */
+if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) ||
+    (mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
+dev_err(&sspa->pdev->dev,
+"can't change hardware dai format: stream is in use\n");
+return -EINVAL;
+}
+
+/* reset port settings */
+sspa_sp   = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH;
+sspa_ctrl = 0;
+
+switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+case SND_SOC_DAIFMT_CBS_CFS:
+sspa_sp |= SSPA_SP_MSL;
+break;
+case SND_SOC_DAIFMT_CBM_CFM:
+break;
+default:
+return -EINVAL;
+}
+
+switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+case SND_SOC_DAIFMT_NB_NF:
+sspa_sp |= SSPA_SP_FSP;
+break;
+default:
+return -EINVAL;
+}
+
+switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+case SND_SOC_DAIFMT_I2S:
+sspa_sp |= SSPA_TXSP_FPER(63);
+sspa_sp |= SSPA_SP_FWID(31);
+sspa_ctrl |= SSPA_CTL_XDATDLY(1);
+break;
+default:
+return -EINVAL;
+}
+
+mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
+mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
+
+sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH);
+mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
+mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
+
+/*
+ * FIXME: hw issue, for the tx serial port,
+ * can not config the master/slave mode;
+ * so must clean this bit.
+ * The master/slave mode has been set in the
+ * rx port.
+ */
+sspa_sp &= ~SSPA_SP_MSL;
+mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
+
+mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
+mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
+
+/* Since we are configuring the timings for the format by hand
+ * we have to defer some things until hw_params() where we
+ * know parameters like the sample size.
+ */
+sspa_priv->dai_fmt = fmt;
+return 0;
+}
+
+/*
+ * Set the SSPA audio DMA parameters and sample size.
+ * Can be called multiple times by oss emulation.
+ */
+static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
+       struct snd_pcm_hw_params *params,
+       struct snd_soc_dai *dai)
+{
+struct snd_soc_pcm_runtime *rtd = substream->private_data;
+struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
+struct ssp_device *sspa = sspa_priv->sspa;
+struct pxa2xx_pcm_dma_params *dma_params;
+u32 sspa_ctrl;
+
+if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
+else
+sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);
+
+sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
+sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
+sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
+sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
+sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;
+
+switch (params_format(params)) {
+case SNDRV_PCM_FORMAT_S8:
+sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
+break;
+case SNDRV_PCM_FORMAT_S16_LE:
+sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
+break;
+case SNDRV_PCM_FORMAT_S20_3LE:
+sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
+break;
+case SNDRV_PCM_FORMAT_S24_3LE:
+sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
+break;
+case SNDRV_PCM_FORMAT_S32_LE:
+sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
+break;
+default:
+return -EINVAL;
+}
+
+if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
+mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
+} else {
+mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
+mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
+}
+
+dma_params = &sspa_priv->dma_params[substream->stream];
+dma_params->dev_addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
+(sspa->phys_base + SSPA_TXD) :
+(sspa->phys_base + SSPA_RXD);
+snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
+return 0;
+}
+
+static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
+     struct snd_soc_dai *dai)
+{
+struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
+struct ssp_device *sspa = sspa_priv->sspa;
+int ret = 0;
+
+switch (cmd) {
+case SNDRV_PCM_TRIGGER_START:
+case SNDRV_PCM_TRIGGER_RESUME:
+case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+/*
+ * whatever playback or capture, must enable rx.
+ * this is a hw issue, so need check if rx has been
+ * enabled or not; if has been enabled by another
+ * stream, do not enable again.
+ */
+if (!sspa_priv->running_cnt)
+mmp_sspa_rx_enable(sspa);
+
+if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+mmp_sspa_tx_enable(sspa);
+
+sspa_priv->running_cnt++;
+break;
+
+case SNDRV_PCM_TRIGGER_STOP:
+case SNDRV_PCM_TRIGGER_SUSPEND:
+case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+sspa_priv->running_cnt--;
+
+if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+mmp_sspa_tx_disable(sspa);
+
+/* have no capture stream, disable rx port */
+if (!sspa_priv->running_cnt)
+mmp_sspa_rx_disable(sspa);
+break;
+
+default:
+ret = -EINVAL;
+}
+
+return ret;
+}
+
+static int mmp_sspa_probe(struct snd_soc_dai *dai)
+{
+struct sspa_priv *priv = dev_get_drvdata(dai->dev);
+
+snd_soc_dai_set_drvdata(dai, priv);
+return 0;
+
+}
+
+#define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
+#define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
+SNDRV_PCM_FMTBIT_S16_LE | \
+SNDRV_PCM_FMTBIT_S24_LE | \
+SNDRV_PCM_FMTBIT_S24_LE | \
+SNDRV_PCM_FMTBIT_S32_LE)
+
+static struct snd_soc_dai_ops mmp_sspa_dai_ops = {
+.startup= mmp_sspa_startup,
+.shutdown= mmp_sspa_shutdown,
+.trigger= mmp_sspa_trigger,
+.hw_params= mmp_sspa_hw_params,
+.set_sysclk= mmp_sspa_set_dai_sysclk,
+.set_pll= mmp_sspa_set_dai_pll,
+.set_fmt= mmp_sspa_set_dai_fmt,
+};
+
+struct snd_soc_dai_driver mmp_sspa_dai = {
+.probe = mmp_sspa_probe,
+.playback = {
+.channels_min = 1,
+.channels_max = 128,
+.rates = MMP_SSPA_RATES,
+.formats = MMP_SSPA_FORMATS,
+},
+.capture = {
+.channels_min = 1,
+.channels_max = 2,
+.rates = MMP_SSPA_RATES,
+.formats = MMP_SSPA_FORMATS,
+},
+.ops = &mmp_sspa_dai_ops,
+};
+
+static __devinit int asoc_mmp_sspa_probe(struct platform_device *pdev)
+{
+int ret;
+struct sspa_priv *priv;
+struct resource *res;
+
+priv = devm_kzalloc(&pdev->dev,
+sizeof(struct sspa_priv), GFP_KERNEL);
+if (!priv)
+return -ENOMEM;
+
+priv->sspa = devm_kzalloc(&pdev->dev,
+sizeof(struct ssp_device), GFP_KERNEL);
+if (priv->sspa == NULL) {
+ret = -ENOMEM;
+goto err_priv_sspa;
+}
+
+priv->dma_params = devm_kzalloc(&pdev->dev,
+2 * sizeof(struct pxa2xx_pcm_dma_params), GFP_KERNEL);
+if (priv->dma_params == NULL) {
+ret = -ENOMEM;
+goto err_priv_dma_params;
+}
+
+priv->sspa->clk = clk_get(&pdev->dev, NULL);
+if (IS_ERR(priv->sspa->clk)) {
+ret = PTR_ERR(priv->sspa->clk);
+goto err_free_clk;
+}
+
+res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+if (res == NULL) {
+dev_err(&pdev->dev, "no memory resource defined\n");
+ret = -ENOMEM;
+goto err_get_res;
+}
+
+res = request_mem_region(res->start, resource_size(res),
+pdev->name);
+if (res == NULL) {
+dev_err(&pdev->dev, "failed to request memory resource\n");
+ret = -EBUSY;
+goto err_get_res;
+}
+
+priv->sspa->mmio_base = ioremap(res->start, resource_size(res));
+if (priv->sspa->mmio_base == NULL) {
+dev_err(&pdev->dev, "failed to ioremap() registers\n");
+ret = -ENODEV;
+goto err_free_mem;
+}
+
+priv->dai_fmt = (unsigned int) -1;
+platform_set_drvdata(pdev, priv);
+return snd_soc_register_dai(&pdev->dev, &mmp_sspa_dai);
+
+err_free_mem:
+release_mem_region(res->start, resource_size(res));
+err_get_res:
+clk_put(priv->sspa->clk);
+err_free_clk:
+devm_kfree(&pdev->dev, priv->dma_params);
+err_priv_dma_params:
+devm_kfree(&pdev->dev, priv->sspa);
+err_priv_sspa:
+devm_kfree(&pdev->dev, priv);
+return ret;
+}
+
+static int __devexit asoc_mmp_sspa_remove(struct platform_device *pdev)
+{
+struct sspa_priv *priv = platform_get_drvdata(pdev);
+struct resource *res;
+
+iounmap(priv->sspa->mmio_base);
+res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+release_mem_region(res->start, resource_size(res));
+snd_soc_unregister_dai(&pdev->dev);
+clk_put(priv->sspa->clk);
+devm_kfree(&pdev->dev, priv->dma_params);
+devm_kfree(&pdev->dev, priv->sspa);
+devm_kfree(&pdev->dev, priv);
+return 0;
+}
+
+static struct platform_driver asoc_mmp_sspa_driver = {
+.driver = {
+.name = "mmp-sspa-dai",
+.owner = THIS_MODULE,
+},
+.probe = asoc_mmp_sspa_probe,
+.remove = __devexit_p(asoc_mmp_sspa_remove),
+};
+
+
+static int __init mmp_sspa_modinit(void)
+{
+audio_clk = clk_get(NULL, "mmp-audio");
+if (IS_ERR(audio_clk))
+return PTR_ERR(audio_clk);
+
+sysclk = clk_get(NULL, "mmp-sysclk");
+if (IS_ERR(sysclk))
+return PTR_ERR(sysclk);
+clk_enable(audio_clk);
+return platform_driver_register(&asoc_mmp_sspa_driver);
+}
+module_init(mmp_sspa_modinit);
+
+static void __exit mmp_sspa_exit(void)
+{
+clk_disable(audio_clk);
+clk_put(sysclk);
+clk_put(audio_clk);
+platform_driver_unregister(&asoc_mmp_sspa_driver);
+}
+module_exit(mmp_sspa_exit);
+
+MODULE_AUTHOR("Leo Yan <leoy< at >marvell.com>");
+MODULE_DESCRIPTION("MMP SSPA SoC Interface");
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/pxa/mmp-sspa.h b/sound/soc/pxa/mmp-sspa.h
new file mode 100644
index 0000000..ea365cb
--- /dev/null
+++ b/sound/soc/pxa/mmp-sspa.h
< at >< at > -0,0 +1,92 < at >< at >
+/*
+ * linux/sound/soc/pxa/mmp-sspa.h
+ *
+ * Copyright (C) 2011 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+#ifndef _MMP_SSPA_H
+#define _MMP_SSPA_H
+
+/*
+ * SSPA Registers
+ */
+#define SSPA_RXD(0x00)
+#define SSPA_RXID(0x04)
+#define SSPA_RXCTL(0x08)
+#define SSPA_RXSP(0x0c)
+#define SSPA_RXFIFO_UL(0x10)
+#define SSPA_RXINT_MASK(0x14)
+#define SSPA_RXC(0x18)
+#define SSPA_RXFIFO_NOFS(0x1c)
+#define SSPA_RXFIFO_SIZE(0x20)
+
+#define SSPA_TXD(0x80)
+#define SSPA_TXID(0x84)
+#define SSPA_TXCTL(0x88)
+#define SSPA_TXSP(0x8c)
+#define SSPA_TXFIFO_LL(0x90)
+#define SSPA_TXINT_MASK(0x94)
+#define SSPA_TXC(0x98)
+#define SSPA_TXFIFO_NOFS(0x9c)
+#define SSPA_TXFIFO_SIZE(0xa0)
+
+/* SSPA Control Register */
+#defineSSPA_CTL_XPH(1 << 31)/* Read Phase */
+#defineSSPA_CTL_XFIG(1 << 15)/* Transmit Zeros when FIFO Empty */
+#defineSSPA_CTL_JST(1 << 3)/* Audio Sample Justification */
+#defineSSPA_CTL_XFRLEN2_MASK(7 << 24)
+#defineSSPA_CTL_XFRLEN2(x)((x) << 24)/* Transmit Frame Length in Phase 2 */
+#defineSSPA_CTL_XWDLEN2_MASK(7 << 21)
+#defineSSPA_CTL_XWDLEN2(x)((x) << 21)/* Transmit Word Length in Phase 2 */
+#defineSSPA_CTL_XDATDLY(x)((x) << 19)/* Tansmit Data Delay */
+#defineSSPA_CTL_XSSZ2_MASK(7 << 16)
+#defineSSPA_CTL_XSSZ2(x)((x) << 16)/* Transmit Sample Audio Size */
+#defineSSPA_CTL_XFRLEN1_MASK(7 << 8)
+#defineSSPA_CTL_XFRLEN1(x)((x) << 8)/* Transmit Frame Length in Phase 1 */
+#defineSSPA_CTL_XWDLEN1_MASK(7 << 5)
+#defineSSPA_CTL_XWDLEN1(x)((x) << 5)/* Transmit Word Length in Phase 1 */
+#defineSSPA_CTL_XSSZ1_MASK(7 << 0)
+#defineSSPA_CTL_XSSZ1(x)((x) << 0)/* XSSZ1 */
+
+#define SSPA_CTL_8_BITS(0x0)/* Sample Size */
+#define SSPA_CTL_12_BITS(0x1)
+#define SSPA_CTL_16_BITS(0x2)
+#define SSPA_CTL_20_BITS(0x3)
+#define SSPA_CTL_24_BITS(0x4)
+#define SSPA_CTL_32_BITS(0x5)
+
+/* SSPA Serial Port Register */
+#defineSSPA_SP_WEN(1 << 31)/* Write Configuration Enable */
+#defineSSPA_SP_MSL(1 << 18)/* Master Slave Configuration */
+#defineSSPA_SP_CLKP(1 << 17)/* CLKP Polarity Clock Edge Select */
+#defineSSPA_SP_FSP(1 << 16)/* FSP Polarity Clock Edge Select */
+#defineSSPA_SP_FFLUSH(1 << 2)/* FIFO Flush */
+#defineSSPA_SP_S_RST(1 << 1)/* Active High Reset Signal */
+#defineSSPA_SP_S_EN(1 << 0)/* Serial Clock Domain Enable */
+#defineSSPA_SP_FWID(x)((x) << 20)/* Frame-Sync Width */
+#defineSSPA_TXSP_FPER(x)((x) << 4)/* Frame-Sync Active */
+
+/* sspa clock sources */
+#define MMP_SSPA_CLK_PLL0
+#define MMP_SSPA_CLK_VCXO1
+#define MMP_SSPA_CLK_AUDIO3
+
+/* sspa pll id */
+#define MMP_SYSCLK0
+#define MMP_SSPA_CLK1
+
+#endif /* _MMP_SSPA_H */

[PATCH 2/4] ASoC: mmp: add audio dma support

Zhangfei Gao — 2012-05-25T07:11:01

mmp-pcm handle audio dma based on dmaengine
Support mmp and pxa910

Signed-off-by: Zhangfei Gao <zhangfei.gao< at >marvell.com>
Signed-off-by: Leo Yan <leoy< at >marvell.com>
Signed-off-by: Qiao Zhou <zhouqiao< at >marvell.com>
---
 include/linux/platform_data/mmp_audio.h |   22 ++
 sound/soc/pxa/Kconfig                   |    8 +
 sound/soc/pxa/Makefile                  |    2 +
 sound/soc/pxa/mmp-pcm.c                 |  448 +++++++++++++++++++++++++++++++
 4 files changed, 480 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/platform_data/mmp_audio.h
 create mode 100644 sound/soc/pxa/mmp-pcm.c

diff --git a/include/linux/platform_data/mmp_audio.h b/include/linux/platform_data/mmp_audio.h
new file mode 100644
index 0000000..0f25d16
--- /dev/null
+++ b/include/linux/platform_data/mmp_audio.h
< at >< at > -0,0 +1,22 < at >< at >
+/*
+ *  MMP Platform AUDIO Management
+ *
+ *  Copyright (c) 2011 Marvell Semiconductors Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ */
+
+#ifndef MMP_AUDIO_H
+#define MMP_AUDIO_H
+
+struct mmp_audio_platdata {
+u32 period_max_capture;
+u32 buffer_max_capture;
+u32 period_max_playback;
+u32 buffer_max_playback;
+};
+
+#endif /* MMP_AUDIO_H */
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index a0f7d3c..a516068 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
< at >< at > -8,6 +8,14 < at >< at > config SND_PXA2XX_SOC
   the PXA2xx AC97, I2S or SSP interface. You will also need
   to select the audio interfaces to support below.
 
+config SND_MMP_SOC
+bool "Soc Audio for Marvell MMP chips"
+depends on ARCH_MMP
+select SND_ARM
+help
+  Say Y if you want to add support for codecs attached to
+  the MMP SSPA interface.
+
 config SND_PXA2XX_AC97
 tristate
 select SND_AC97_CODEC
diff --git a/sound/soc/pxa/Makefile b/sound/soc/pxa/Makefile
index af35762..f913e9b 100644
--- a/sound/soc/pxa/Makefile
+++ b/sound/soc/pxa/Makefile
< at >< at > -3,11 +3,13 < at >< at > snd-soc-pxa2xx-objs := pxa2xx-pcm.o
 snd-soc-pxa2xx-ac97-objs := pxa2xx-ac97.o
 snd-soc-pxa2xx-i2s-objs := pxa2xx-i2s.o
 snd-soc-pxa-ssp-objs := pxa-ssp.o
+snd-soc-mmp-objs := mmp-pcm.o
 
 obj-$(CONFIG_SND_PXA2XX_SOC) += snd-soc-pxa2xx.o
 obj-$(CONFIG_SND_PXA2XX_SOC_AC97) += snd-soc-pxa2xx-ac97.o
 obj-$(CONFIG_SND_PXA2XX_SOC_I2S) += snd-soc-pxa2xx-i2s.o
 obj-$(CONFIG_SND_PXA_SOC_SSP) += snd-soc-pxa-ssp.o
+obj-$(CONFIG_SND_MMP_SOC) += snd-soc-mmp.o
 
 # PXA Machine Support
 snd-soc-corgi-objs := corgi.o
diff --git a/sound/soc/pxa/mmp-pcm.c b/sound/soc/pxa/mmp-pcm.c
new file mode 100644
index 0000000..abafbb9
--- /dev/null
+++ b/sound/soc/pxa/mmp-pcm.c
< at >< at > -0,0 +1,448 < at >< at >
+/*
+ * linux/sound/soc/pxa/mmp-pcm.c
+ *
+ * Copyright (C) 2011 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+#include <linux/platform_data/mmp_dma.h>
+#include <linux/platform_data/mmp_audio.h>
+#include <sound/pxa2xx-lib.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <mach/sram.h>
+
+struct mmp_runtime_data {
+int ssp_id;
+u32 period_size;
+u32 pointer;
+struct resource *dma_res;
+struct mmp_tdma_data tdma_data;
+struct gen_pool *gpool;
+struct snd_pcm_substream *substream;
+struct dma_chan *dma_chan;
+struct dma_async_tx_descriptor *desc;
+};
+
+#define MMP_PCM_INFO (SNDRV_PCM_INFO_MMAP |\
+SNDRV_PCM_INFO_MMAP_VALID |\
+SNDRV_PCM_INFO_INTERLEAVED |\
+SNDRV_PCM_INFO_PAUSE |\
+SNDRV_PCM_INFO_RESUME)
+
+#define MMP_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+static struct snd_pcm_hardware mmp_pcm_hardware[] = {
+{
+.info= MMP_PCM_INFO,
+.formats= MMP_PCM_FORMATS,
+.period_bytes_min= 1024,
+.period_bytes_max= 2048,
+.periods_min= 2,
+.periods_max= 32,
+.buffer_bytes_max= 4096,
+.fifo_size= 32,
+},
+{
+.info= MMP_PCM_INFO,
+.formats= MMP_PCM_FORMATS,
+.period_bytes_min= 1024,
+.period_bytes_max= 2048,
+.periods_min= 2,
+.periods_max= 32,
+.buffer_bytes_max= 4096,
+.fifo_size= 32,
+},
+};
+
+static void mmp_pcm_adma_irq(void *data)
+{
+struct snd_pcm_substream *substream = data;
+struct mmp_runtime_data *prtd = substream->runtime->private_data;
+size_t dma_bytes = substream->runtime->dma_bytes;
+
+prtd->pointer = (prtd->pointer + prtd->period_size) % dma_bytes;
+snd_pcm_period_elapsed(substream);
+return;
+}
+
+static bool filter(struct dma_chan *chan, void *param)
+{
+struct mmp_runtime_data *prtd = param;
+bool found = false;
+char *devname;
+
+devname = kasprintf(GFP_KERNEL, "%s.%d", prtd->dma_res->name,
+prtd->ssp_id);
+if ((strcmp(dev_name(chan->device->dev), devname) == 0) &&
+(chan->chan_id == prtd->dma_res->start)) {
+chan->private = &prtd->tdma_data;
+found = true;
+}
+
+kfree(devname);
+return found;
+}
+
+static int mmp_pcm_hw_params(struct snd_pcm_substream *substream,
+      struct snd_pcm_hw_params *params)
+{
+struct snd_pcm_runtime *runtime = substream->runtime;
+struct mmp_runtime_data *prtd = runtime->private_data;
+struct snd_soc_pcm_runtime *rtd = substream->private_data;
+struct pxa2xx_pcm_dma_params *dma_params;
+size_t totsize = params_buffer_bytes(params);
+size_t period = params_period_bytes(params);
+int ret;
+struct dma_slave_config slave_config;
+dma_cap_mask_t mask;
+
+dma_params = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
+if (!dma_params)
+return 0;
+
+switch (params_format(params)) {
+case SNDRV_PCM_FORMAT_S8:
+prtd->tdma_data.bus_size = 8;
+break;
+case SNDRV_PCM_FORMAT_S16_LE:
+prtd->tdma_data.bus_size = 16;
+break;
+case SNDRV_PCM_FORMAT_S24_LE:
+prtd->tdma_data.bus_size = 24;
+break;
+case SNDRV_PCM_FORMAT_S32_LE:
+prtd->tdma_data.bus_size = 32;
+break;
+default:
+return -EINVAL;
+}
+prtd->tdma_data.pack_mod = true;
+
+dma_cap_zero(mask);
+dma_cap_set(DMA_CYCLIC, mask);
+prtd->dma_chan = dma_request_channel(mask, filter, prtd);
+if (!prtd->dma_chan)
+return -EINVAL;
+
+if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+slave_config.direction    = DMA_TO_DEVICE;
+slave_config.dst_addr     = dma_params->dev_addr;
+slave_config.dst_maxburst = 4;
+} else {
+slave_config.direction  = DMA_FROM_DEVICE;
+slave_config.src_addr  = dma_params->dev_addr;
+slave_config.src_maxburst = 4;
+}
+
+ret = dmaengine_slave_config(prtd->dma_chan, &slave_config);
+if (ret)
+return ret;
+
+snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
+
+prtd->period_size = period;
+runtime->dma_bytes = totsize;
+
+prtd->desc = prtd->dma_chan->device->device_prep_dma_cyclic(
+prtd->dma_chan, runtime->dma_addr, totsize, period,
+substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
+DMA_TO_DEVICE : DMA_FROM_DEVICE, NULL);
+if (!prtd->desc) {
+dev_err(&prtd->dma_chan->dev->device, "cannot prepare slave dma\n");
+return -EINVAL;
+}
+
+prtd->desc->callback = mmp_pcm_adma_irq;
+prtd->desc->callback_param = substream;
+dmaengine_submit(prtd->desc);
+return 0;
+}
+
+static int mmp_pcm_hw_free(struct snd_pcm_substream *substream)
+{
+struct mmp_runtime_data *prtd = substream->runtime->private_data;
+
+if (prtd->dma_chan) {
+dma_release_channel(prtd->dma_chan);
+prtd->dma_chan = NULL;
+}
+
+return 0;
+}
+
+static int mmp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+struct mmp_runtime_data *prtd = substream->runtime->private_data;
+int ret = 0;
+
+switch (cmd) {
+case SNDRV_PCM_TRIGGER_START:
+prtd->pointer = 0;
+dma_async_issue_pending(prtd->dma_chan);
+break;
+
+case SNDRV_PCM_TRIGGER_STOP:
+case SNDRV_PCM_TRIGGER_SUSPEND:
+case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+dmaengine_terminate_all(prtd->dma_chan);
+break;
+
+case SNDRV_PCM_TRIGGER_RESUME:
+dma_async_issue_pending(prtd->dma_chan);
+break;
+
+case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+dma_async_issue_pending(prtd->dma_chan);
+break;
+
+default:
+ret = -EINVAL;
+break;
+}
+
+return ret;
+}
+
+static snd_pcm_uframes_t mmp_pcm_pointer(struct snd_pcm_substream *substream)
+{
+struct snd_pcm_runtime *runtime = substream->runtime;
+struct mmp_runtime_data *prtd = runtime->private_data;
+snd_pcm_uframes_t x;
+
+x = bytes_to_frames(runtime, prtd->pointer);
+if (x == runtime->buffer_size)
+x = 0;
+
+return x;
+}
+
+static int mmp_pcm_open(struct snd_pcm_substream *substream)
+{
+struct snd_soc_pcm_runtime *rtd = substream->private_data;
+struct platform_device *pdev = to_platform_device(rtd->platform->dev);
+struct snd_pcm_runtime *runtime = substream->runtime;
+struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+struct mmp_runtime_data *prtd;
+struct resource *r;
+int ret;
+
+r = platform_get_resource(pdev, IORESOURCE_DMA, substream->stream);
+if (!r)
+return -EBUSY;
+
+snd_soc_set_runtime_hwparams(substream,
+&mmp_pcm_hardware[substream->stream]);
+
+/*
+ * For mysterious reasons (and despite what the manual says)
+ * playback samples are lost if the DMA count is not a multiple
+ * of the DMA burst size.  Let's add a rule to enforce that.
+ */
+ret = snd_pcm_hw_constraint_step(runtime, 0,
+SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
+if (ret)
+goto out;
+
+ret = snd_pcm_hw_constraint_step(runtime, 0,
+SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
+if (ret)
+goto out;
+
+ret = snd_pcm_hw_constraint_integer(runtime,
+SNDRV_PCM_HW_PARAM_PERIODS);
+if (ret < 0)
+goto out;
+
+prtd = devm_kzalloc(&pdev->dev,
+sizeof(struct mmp_runtime_data), GFP_KERNEL);
+if (prtd == NULL) {
+ret = -ENOMEM;
+goto out;
+}
+
+prtd->substream = substream;
+runtime->private_data = prtd;
+prtd->dma_res = r;
+prtd->ssp_id = cpu_dai->id;
+return 0;
+
+out:
+return ret;
+}
+
+static int mmp_pcm_close(struct snd_pcm_substream *substream)
+{
+struct snd_soc_pcm_runtime *rtd = substream->private_data;
+struct platform_device *pdev = to_platform_device(rtd->platform->dev);
+struct snd_pcm_runtime *runtime = substream->runtime;
+struct mmp_runtime_data *prtd = runtime->private_data;
+
+devm_kfree(&pdev->dev, prtd);
+runtime->private_data = NULL;
+return 0;
+}
+
+static int mmp_pcm_mmap(struct snd_pcm_substream *substream,
+ struct vm_area_struct *vma)
+{
+struct snd_pcm_runtime *runtime = substream->runtime;
+unsigned long off = vma->vm_pgoff;
+
+vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+return remap_pfn_range(vma, vma->vm_start,
+__phys_to_pfn(runtime->dma_addr) + off,
+vma->vm_end - vma->vm_start, vma->vm_page_prot);
+}
+
+struct snd_pcm_ops mmp_pcm_ops = {
+.open= mmp_pcm_open,
+.close= mmp_pcm_close,
+.ioctl= snd_pcm_lib_ioctl,
+.hw_params= mmp_pcm_hw_params,
+.hw_free= mmp_pcm_hw_free,
+.trigger= mmp_pcm_trigger,
+.pointer= mmp_pcm_pointer,
+.mmap= mmp_pcm_mmap,
+};
+
+static int mmp_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
+{
+struct snd_pcm_substream *substream = pcm->streams[stream].substream;
+struct snd_dma_buffer *buf = &substream->dma_buffer;
+size_t size = mmp_pcm_hardware[stream].buffer_bytes_max;
+struct gen_pool *gpool;
+
+buf->dev.type = SNDRV_DMA_TYPE_DEV;
+buf->dev.dev = pcm->card->dev;
+buf->private_data = NULL;
+
+gpool = sram_get_gpool("asram");
+if (!gpool)
+return -ENOMEM;
+
+buf->area = (unsigned char *)gen_pool_alloc(gpool, size);
+if (!buf->area)
+return -ENOMEM;
+buf->addr = gen_pool_virt_to_phys(gpool, (unsigned long)buf->area);
+buf->bytes = size;
+return 0;
+}
+
+static void mmp_pcm_free_dma_buffers(struct snd_pcm *pcm)
+{
+struct snd_pcm_substream *substream;
+struct snd_dma_buffer *buf;
+int stream;
+struct gen_pool *gpool;
+
+gpool = sram_get_gpool("asram");
+if (!gpool)
+return;
+
+for (stream = 0; stream < 2; stream++) {
+size_t size = mmp_pcm_hardware[stream].buffer_bytes_max;
+
+substream = pcm->streams[stream].substream;
+if (!substream)
+continue;
+
+buf = &substream->dma_buffer;
+if (!buf->area)
+continue;
+gen_pool_free(gpool, (unsigned long)buf->area, size);
+buf->area = NULL;
+}
+
+return;
+}
+
+static u64 mmp_pcm_dmamask = DMA_BIT_MASK(64);
+
+int mmp_pcm_new(struct snd_soc_pcm_runtime *rtd)
+{
+struct snd_card *card = rtd->card->snd_card;
+struct snd_pcm *pcm = rtd->pcm;
+int ret = 0;
+
+if (!card->dev->dma_mask)
+card->dev->dma_mask = &mmp_pcm_dmamask;
+
+if (!card->dev->coherent_dma_mask)
+card->dev->coherent_dma_mask = DMA_BIT_MASK(64);
+
+if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
+ret = mmp_pcm_preallocate_dma_buffer(pcm,
+SNDRV_PCM_STREAM_PLAYBACK);
+if (ret)
+goto out;
+}
+
+if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
+ret = mmp_pcm_preallocate_dma_buffer(pcm,
+SNDRV_PCM_STREAM_CAPTURE);
+if (ret)
+goto out;
+}
+ out:
+return ret;
+}
+
+struct snd_soc_platform_driver mmp_soc_platform = {
+.ops= &mmp_pcm_ops,
+.pcm_new= mmp_pcm_new,
+.pcm_free= mmp_pcm_free_dma_buffers,
+};
+
+static __devinit int mmp_pcm_probe(struct platform_device *pdev)
+{
+struct mmp_audio_platdata *pdata = pdev->dev.platform_data;
+
+if (pdata) {
+mmp_pcm_hardware[SNDRV_PCM_STREAM_PLAYBACK].buffer_bytes_max =
+pdata->buffer_max_playback;
+mmp_pcm_hardware[SNDRV_PCM_STREAM_PLAYBACK].period_bytes_max =
+pdata->period_max_playback;
+mmp_pcm_hardware[SNDRV_PCM_STREAM_CAPTURE].buffer_bytes_max =
+pdata->buffer_max_capture;
+mmp_pcm_hardware[SNDRV_PCM_STREAM_CAPTURE].period_bytes_max =
+pdata->period_max_capture;
+}
+return snd_soc_register_platform(&pdev->dev, &mmp_soc_platform);
+}
+
+static int __devexit mmp_pcm_remove(struct platform_device *pdev)
+{
+snd_soc_unregister_platform(&pdev->dev);
+return 0;
+}
+
+static struct platform_driver mmp_pcm_driver = {
+.driver = {
+.name = "mmp-pcm-audio",
+.owner = THIS_MODULE,
+},
+
+.probe = mmp_pcm_probe,
+.remove = __devexit_p(mmp_pcm_remove),
+};
+
+module_platform_driver(mmp_pcm_driver);
+
+MODULE_AUTHOR("Leo Yan <leoy< at >marvell.com>");
+MODULE_DESCRIPTION("MMP Soc Audio DMA module");
+MODULE_LICENSE("GPL");

[PATCH] dmaengine: mmp_tdma: add mmp tdma support

Zhangfei Gao — 2012-05-25T07:11:00

Add support for two-channel dma under dmaengine
support: mmp-adma and pxa910-squ

Signed-off-by: Zhangfei Gao <zhangfei.gao< at >marvell.com>
Signed-off-by: Leo Yan <leoy< at >marvell.com>
Signed-off-by: Qiao Zhou <zhouqiao< at >marvell.com>
---
 drivers/dma/Kconfig                   |   10 +
 drivers/dma/Makefile                  |    1 +
 drivers/dma/mmp_tdma.c                |  677 +++++++++++++++++++++++++++++++++
 include/linux/platform_data/mmp_dma.h |   20 +
 4 files changed, 708 insertions(+), 0 deletions(-)
 create mode 100644 drivers/dma/mmp_tdma.c
 create mode 100644 include/linux/platform_data/mmp_dma.h

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ef378b5..26d5b1b 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
< at >< at > -259,6 +259,16 < at >< at > config DMA_SA11X0
   SA-1110 SoCs.  This DMA engine can only be used with on-chip
   devices.
 
+config MMP_TDMA
+bool "MMP Two-Channel DMA support"
+default ARCH_MMP
+select DMA_ENGINE
+help
+  Support the MMP Two-Channel DMA engine.
+  This engine used for MMP Audio DMA and pxa910 SQU.
+
+  Say Y here if you enabled MMP ADMA, otherwise say N.
+
 config DMA_ENGINE
 bool
 
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 86b795b..37e9258 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
< at >< at > -28,3 +28,4 < at >< at > obj-$(CONFIG_PCH_DMA) += pch_dma.o
 obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o
 obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
 obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
+obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
new file mode 100644
index 0000000..043511b
--- /dev/null
+++ b/drivers/dma/mmp_tdma.c
< at >< at > -0,0 +1,677 < at >< at >
+/*
+ * Driver For Marvell Two-channel DMA Engine
+ *
+ * Copyright:Marvell International Ltd.
+ *Leo Yan <leoy< at >marvell.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/slab.h>
+#include <linux/dmaengine.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/platform_data/mmp_dma.h>
+#include <mach/regs-icu.h>
+#include <mach/sram.h>
+
+/*
+ * Two-Channel DMA registers
+ */
+#define TDBCR0x00/* Byte Count */
+#define TDSAR0x10/* Src Addr */
+#define TDDAR0x20/* Dst Addr */
+#define TDNDPR0x30/* Next Desc */
+#define TDCR0x40/* Control */
+#define TDCP0x60/* Priority*/
+#define TDCDPR0x70/* Current Desc */
+#define TDIMR0x80/* Int Mask */
+#define TDISR0xa0/* Int Status */
+
+/* Two-Channel DMA Control Register */
+#define TDCR_SSZ_8_BITS(0x0 << 22)/* Sample Size */
+#define TDCR_SSZ_12_BITS(0x1 << 22)
+#define TDCR_SSZ_16_BITS(0x2 << 22)
+#define TDCR_SSZ_20_BITS(0x3 << 22)
+#define TDCR_SSZ_24_BITS(0x4 << 22)
+#define TDCR_SSZ_32_BITS(0x5 << 22)
+#define TDCR_SSZ_SHIFT(0x1 << 22)
+#define TDCR_SSZ_MASK(0x7 << 22)
+#define TDCR_SSPMOD(0x1 << 21)/* SSP MOD */
+#define TDCR_ABR(0x1 << 20)/* Channel Abort */
+#define TDCR_CDE(0x1 << 17)/* Close Desc Enable */
+#define TDCR_PACKMOD(0x1 << 16)/* Pack Mode (ADMA Only) */
+#define TDCR_CHANACT(0x1 << 14)/* Channel Active */
+#define TDCR_FETCHND(0x1 << 13)/* Fetch Next Desc */
+#define TDCR_CHANEN(0x1 << 12)/* Channel Enable */
+#define TDCR_INTMODE(0x1 << 10)/* Interrupt Mode */
+#define TDCR_CHAINMOD(0x1 << 9)/* Chain Mode */
+#define TDCR_BURSTSZ_MSK(0x7 << 6)/* Burst Size */
+#define TDCR_BURSTSZ_4B(0x0 << 6)
+#define TDCR_BURSTSZ_8B(0x1 << 6)
+#define TDCR_BURSTSZ_16B(0x3 << 6)
+#define TDCR_BURSTSZ_32B(0x6 << 6)
+#define TDCR_BURSTSZ_64B(0x7 << 6)
+#define TDCR_BURSTSZ_SQU_32B(0x7 << 6)
+#define TDCR_BURSTSZ_128B(0x5 << 6)
+#define TDCR_DSTDIR_MSK(0x3 << 4)/* Dst Direction */
+#define TDCR_DSTDIR_ADDR_HOLD(0x2 << 4)/* Dst Addr Hold */
+#define TDCR_DSTDIR_ADDR_INC(0x0 << 4)/* Dst Addr Increment */
+#define TDCR_SRCDIR_MSK(0x3 << 2)/* Src Direction */
+#define TDCR_SRCDIR_ADDR_HOLD(0x2 << 2)/* Src Addr Hold */
+#define TDCR_SRCDIR_ADDR_INC(0x0 << 2)/* Src Addr Increment */
+#define TDCR_DSTDESCCONT(0x1 << 1)
+#define TDCR_SRCDESTCONT(0x1 << 0)
+
+/* Two-Channel DMA Int Mask Register */
+#define TDIMR_COMP(0x1 << 0)
+
+/* Two-Channel DMA Int Status Register */
+#define TDISR_COMP(0x1 << 0)
+
+/*
+ * Two-Channel DMA Descriptor Struct
+ * NOTE: desc's buf must be aligned to 16 bytes.
+ */
+struct mmp_tdma_desc {
+u32 byte_cnt;
+u32 src_addr;
+u32 dst_addr;
+u32 nxt_desc;
+};
+
+enum mmp_tdma_type {
+MMP_AUD_TDMA = 0,
+PXA910_SQU,
+};
+
+#define TDMA_ALIGNMENT3
+#define TDMA_MAX_XFER_BYTES    SZ_64K
+
+struct mmp_tdma_chan {
+struct device*dev;
+struct dma_chanchan;
+struct dma_async_tx_descriptordesc;
+struct tasklet_structtasklet;
+
+struct mmp_tdma_desc*desc_arr;
+phys_addr_tdesc_arr_phys;
+intdesc_num;
+enum dma_transfer_directiondir;
+dma_addr_tdev_addr;
+u32burst_sz;
+enum dma_statusstatus;
+
+intidx;
+enum mmp_tdma_typetype;
+intirq;
+unsigned longreg_base;
+};
+
+#define TDMA_CHANNEL_NUM 2
+struct mmp_tdma_device {
+struct device*dev;
+void __iomem*base;
+struct dma_devicedevice;
+struct mmp_tdma_chan*tdmac[TDMA_CHANNEL_NUM];
+intirq;
+};
+
+#define to_mmp_tdma_chan(dchan) container_of(dchan, struct mmp_tdma_chan, chan)
+
+static void mmp_tdma_chan_set_desc(struct mmp_tdma_chan *tdmac, dma_addr_t phys)
+{
+writel(phys, tdmac->reg_base + TDNDPR);
+writel(readl(tdmac->reg_base + TDCR) | TDCR_FETCHND,
+tdmac->reg_base + TDCR);
+}
+
+static void mmp_tdma_enable_chan(struct mmp_tdma_chan *tdmac)
+{
+/* enable irq */
+writel(TDIMR_COMP, tdmac->reg_base + TDIMR);
+/* enable dma chan */
+writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
+tdmac->reg_base + TDCR);
+tdmac->status = DMA_IN_PROGRESS;
+}
+
+static void mmp_tdma_disable_chan(struct mmp_tdma_chan *tdmac)
+{
+writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
+tdmac->reg_base + TDCR);
+tdmac->status = DMA_SUCCESS;
+}
+
+static void mmp_tdma_resume_chan(struct mmp_tdma_chan *tdmac)
+{
+writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
+tdmac->reg_base + TDCR);
+tdmac->status = DMA_IN_PROGRESS;
+}
+
+static void mmp_tdma_pause_chan(struct mmp_tdma_chan *tdmac)
+{
+writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
+tdmac->reg_base + TDCR);
+tdmac->status = DMA_PAUSED;
+}
+
+static int mmp_tdma_config_chan(struct mmp_tdma_chan *tdmac)
+{
+struct mmp_tdma_data *tdma_data = tdmac->chan.private;
+unsigned int tdcr;
+
+mmp_tdma_disable_chan(tdmac);
+
+if (tdmac->dir == DMA_MEM_TO_DEV)
+tdcr = TDCR_DSTDIR_ADDR_HOLD | TDCR_SRCDIR_ADDR_INC;
+else if (tdmac->dir == DMA_DEV_TO_MEM)
+tdcr = TDCR_SRCDIR_ADDR_HOLD | TDCR_DSTDIR_ADDR_INC;
+else if (tdmac->dir == DMA_MEM_TO_MEM)
+tdcr = TDCR_SRCDIR_ADDR_INC  | TDCR_DSTDIR_ADDR_INC;
+else
+tdcr = TDCR_SRCDIR_ADDR_HOLD | TDCR_DSTDIR_ADDR_HOLD;
+
+if (tdmac->type == MMP_AUD_TDMA) {
+switch (tdmac->burst_sz) {
+case 4:
+tdcr |= TDCR_BURSTSZ_4B;
+break;
+case 8:
+tdcr |= TDCR_BURSTSZ_8B;
+break;
+case 16:
+tdcr |= TDCR_BURSTSZ_16B;
+break;
+case 32:
+tdcr |= TDCR_BURSTSZ_32B;
+break;
+case 64:
+tdcr |= TDCR_BURSTSZ_64B;
+break;
+case 128:
+tdcr |= TDCR_BURSTSZ_128B;
+break;
+default:
+dev_err(tdmac->dev, "mmp_tdma: unknown burst size.\n");
+return -EINVAL;
+}
+
+if (tdma_data->pack_mod)
+tdcr |= TDCR_PACKMOD;
+
+switch (tdma_data->bus_size) {
+case 8:
+tdcr |= TDCR_SSZ_8_BITS;
+break;
+case 12:
+tdcr |= TDCR_SSZ_12_BITS;
+break;
+case 16:
+tdcr |= TDCR_SSZ_16_BITS;
+break;
+case 20:
+tdcr |= TDCR_SSZ_20_BITS;
+break;
+case 24:
+tdcr |= TDCR_SSZ_24_BITS;
+break;
+case 32:
+tdcr |= TDCR_SSZ_32_BITS;
+break;
+default:
+dev_err(tdmac->dev, "mmp_tdma: unknown bus size.\n");
+return -EINVAL;
+}
+} else if (tdmac->type == PXA910_SQU) {
+tdcr |= TDCR_BURSTSZ_SQU_32B;
+tdcr |= TDCR_SSPMOD;
+}
+
+writel(tdcr, tdmac->reg_base + TDCR);
+return 0;
+}
+
+static int mmp_tdma_clear_chan_irq(struct mmp_tdma_chan *tdmac)
+{
+u32 reg = readl(tdmac->reg_base + TDISR);
+
+if (reg & TDISR_COMP) {
+/* clear irq */
+reg &= ~TDISR_COMP;
+writel(reg, tdmac->reg_base + TDISR);
+
+return 1;
+}
+return 0;
+}
+
+static irqreturn_t mmp_tdma_chan_handler(int irq, void *dev_id)
+{
+struct mmp_tdma_chan *tdmac = dev_id;
+
+if (mmp_tdma_clear_chan_irq(tdmac)) {
+tasklet_schedule(&tdmac->tasklet);
+return IRQ_HANDLED;
+} else
+return IRQ_NONE;
+}
+
+static irqreturn_t mmp_tdma_int_handler(int irq, void *dev_id)
+{
+struct mmp_tdma_device *tdev = dev_id;
+int i, ret;
+int irq_num = 0;
+
+for (i = 0; i < TDMA_CHANNEL_NUM; i++) {
+struct mmp_tdma_chan *tdmac = tdev->tdmac[i];
+
+ret = mmp_tdma_chan_handler(irq, tdmac);
+if (ret == IRQ_HANDLED)
+irq_num++;
+}
+
+if (irq_num)
+return IRQ_HANDLED;
+else
+return IRQ_NONE;
+}
+
+static void dma_do_tasklet(unsigned long data)
+{
+struct mmp_tdma_chan *tdmac = (struct mmp_tdma_chan *)data;
+
+if (tdmac->desc.callback)
+tdmac->desc.callback(tdmac->desc.callback_param);
+
+}
+
+static void mmp_tdma_free_descriptor(struct mmp_tdma_chan *tdmac)
+{
+struct gen_pool *gpool;
+int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);
+
+gpool = sram_get_gpool("asram");
+gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
+size);
+
+return;
+}
+
+static dma_cookie_t mmp_tdma_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(tx->chan);
+
+mmp_tdma_chan_set_desc(tdmac, tdmac->desc_arr_phys);
+
+return 0;
+}
+
+static int mmp_tdma_alloc_chan_resources(struct dma_chan *chan)
+{
+struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+int ret;
+
+dev_dbg(tdmac->dev, "%s: enter\n", __func__);
+
+dma_async_tx_descriptor_init(&tdmac->desc, chan);
+tdmac->desc.tx_submit = mmp_tdma_tx_submit;
+
+if (tdmac->irq) {
+ret = devm_request_irq(tdmac->dev, tdmac->irq,
+mmp_tdma_chan_handler, IRQF_DISABLED, "tdma", tdmac);
+if (ret)
+goto err_request_irq;
+}
+
+return 0;
+
+err_request_irq:
+mmp_tdma_free_descriptor(tdmac);
+return ret;
+}
+
+static void mmp_tdma_free_chan_resources(struct dma_chan *chan)
+{
+struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+
+dev_dbg(tdmac->dev, "%s: enter\n", __func__);
+
+if (tdmac->irq)
+devm_free_irq(tdmac->dev, tdmac->irq, tdmac);
+mmp_tdma_disable_chan(tdmac);
+mmp_tdma_free_descriptor(tdmac);
+return;
+}
+
+
+static struct dma_async_tx_descriptor *mmp_tdma_prep_slave_sg(
+struct dma_chan *chan, struct scatterlist *sgl,
+unsigned int sg_len, enum dma_transfer_direction direction,
+unsigned long flags, void *context)
+{
+/*
+ * This operation is not supported on the TDMA controller
+ *
+ * However, we need to provide the function pointer to allow the
+ * device_control() method to work.
+ */
+return NULL;
+}
+
+static int mmp_tdma_alloc_descriptor(struct mmp_tdma_chan *tdmac)
+{
+struct gen_pool *gpool;
+int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);
+
+dev_dbg(tdmac->dev, "%s: enter\n", __func__);
+
+gpool = sram_get_gpool("asram");
+if (!gpool)
+return -ENOMEM;
+
+tdmac->desc_arr = (void *)gen_pool_alloc(gpool, size);
+if (!tdmac->desc_arr)
+return -ENOMEM;
+
+tdmac->desc_arr_phys = gen_pool_virt_to_phys(gpool,
+(unsigned long)tdmac->desc_arr);
+
+return 0;
+}
+
+static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic(
+struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len,
+size_t period_len, enum dma_transfer_direction direction,
+void *context)
+{
+struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+int num_periods = buf_len / period_len;
+int i = 0, buf = 0;
+int ret;
+
+if (tdmac->status != DMA_SUCCESS)
+return NULL;
+
+if (period_len > TDMA_MAX_XFER_BYTES) {
+dev_err(tdmac->dev,
+"maximum period size exceeded: %d > %d\n",
+period_len, TDMA_MAX_XFER_BYTES);
+goto err_out;
+}
+
+tdmac->status = DMA_IN_PROGRESS;
+tdmac->desc_num = num_periods;
+ret = mmp_tdma_alloc_descriptor(tdmac);
+if (ret < 0)
+goto err_out;
+
+while (buf < buf_len) {
+struct mmp_tdma_desc *desc = &tdmac->desc_arr[i];
+
+if (i + 1 == num_periods)
+desc->nxt_desc = tdmac->desc_arr_phys;
+else
+desc->nxt_desc = tdmac->desc_arr_phys +
+sizeof(*desc) * (i + 1);
+
+if (direction == DMA_MEM_TO_DEV) {
+desc->src_addr = dma_addr;
+desc->dst_addr = tdmac->dev_addr;
+} else {
+desc->src_addr = tdmac->dev_addr;
+desc->dst_addr = dma_addr;
+}
+desc->byte_cnt = period_len;
+dma_addr += period_len;
+buf += period_len;
+i++;
+}
+
+return &tdmac->desc;
+
+err_out:
+tdmac->status = DMA_ERROR;
+return NULL;
+}
+
+static int mmp_tdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+unsigned long arg)
+{
+struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+struct dma_slave_config *dmaengine_cfg = (void *)arg;
+int ret = 0;
+
+switch (cmd) {
+case DMA_TERMINATE_ALL:
+mmp_tdma_disable_chan(tdmac);
+break;
+case DMA_PAUSE:
+mmp_tdma_pause_chan(tdmac);
+break;
+case DMA_RESUME:
+mmp_tdma_resume_chan(tdmac);
+break;
+case DMA_SLAVE_CONFIG:
+if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) {
+tdmac->dev_addr = dmaengine_cfg->src_addr;
+tdmac->burst_sz = dmaengine_cfg->src_maxburst;
+} else {
+tdmac->dev_addr = dmaengine_cfg->dst_addr;
+tdmac->burst_sz = dmaengine_cfg->dst_maxburst;
+}
+tdmac->dir = dmaengine_cfg->direction;
+return mmp_tdma_config_chan(tdmac);
+default:
+ret = -ENOSYS;
+}
+
+return ret;
+}
+
+static enum dma_status mmp_tdma_tx_status(struct dma_chan *chan,
+dma_cookie_t cookie, struct dma_tx_state *txstate)
+{
+struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+
+return tdmac->status;
+}
+
+static void mmp_tdma_issue_pending(struct dma_chan *chan)
+{
+struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+
+mmp_tdma_enable_chan(tdmac);
+}
+
+static int __devexit mmp_tdma_remove(struct platform_device *pdev)
+{
+struct mmp_tdma_device *tdev = platform_get_drvdata(pdev);
+struct resource *iores;
+int chan_num = TDMA_CHANNEL_NUM;
+int i;
+
+dma_async_device_unregister(&tdev->device);
+
+if (tdev->irq)
+devm_free_irq(tdev->dev, tdev->irq, tdev);
+
+for (i = 0; i < chan_num; i++)
+devm_kfree(&pdev->dev, tdev->tdmac[i]);
+
+iounmap(tdev->base);
+iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+if (iores)
+release_mem_region(iores->start, resource_size(iores));
+
+devm_kfree(&pdev->dev, tdev);
+
+return 0;
+}
+
+static int __devinit mmp_tdma_chan_init(struct mmp_tdma_device *tdev,
+int idx, int irq, int type)
+{
+struct mmp_tdma_chan *tdmac;
+
+if (idx >= TDMA_CHANNEL_NUM) {
+dev_err(tdev->dev, "too many channels for device!\n");
+return -EINVAL;
+}
+
+/* alloc channel */
+tdmac = devm_kzalloc(tdev->dev, sizeof(*tdmac), GFP_KERNEL);
+if (!tdmac) {
+dev_err(tdev->dev, "no free memory for DMA channels!\n");
+return -ENOMEM;
+}
+if (irq)
+tdmac->irq = irq + idx;
+tdmac->dev   = tdev->dev;
+tdmac->chan.device = &tdev->device;
+tdmac->idx   = idx;
+tdmac->type   = type;
+tdmac->reg_base   = (unsigned long)tdev->base + idx * 4;
+tdmac->status = DMA_SUCCESS;
+tdev->tdmac[tdmac->idx] = tdmac;
+tasklet_init(&tdmac->tasklet, dma_do_tasklet, (unsigned long)tdmac);
+
+/* add the channel to tdma_chan list */
+list_add_tail(&tdmac->chan.device_node,
+&tdev->device.channels);
+
+return 0;
+}
+
+static int __devinit mmp_tdma_probe(struct platform_device *pdev)
+{
+const struct platform_device_id *id = platform_get_device_id(pdev);
+enum mmp_tdma_type type = id->driver_data;
+struct mmp_tdma_device *tdev;
+struct resource *iores;
+int i, ret;
+int irq = 0;
+int chan_num = TDMA_CHANNEL_NUM;
+
+/* always have couple channels */
+tdev = devm_kzalloc(&pdev->dev, sizeof(*tdev), GFP_KERNEL);
+if (!tdev)
+return -ENOMEM;
+
+tdev->dev = &pdev->dev;
+iores = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+if (!iores) {
+ret = -EINVAL;
+goto err_irq;
+}
+
+if (resource_size(iores) != chan_num)
+tdev->irq = iores->start;
+else
+irq = iores->start;
+
+iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+if (!iores) {
+ret = -EINVAL;
+goto err_irq;
+}
+
+if (!request_mem_region(iores->start, resource_size(iores),
+pdev->name)) {
+ret = -EBUSY;
+goto err_request_region;
+}
+
+tdev->base = ioremap(iores->start, resource_size(iores));
+if (!tdev->base) {
+ret = -ENOMEM;
+goto err_ioremap;
+}
+
+if (tdev->irq) {
+ret = devm_request_irq(&pdev->dev, tdev->irq,
+mmp_tdma_int_handler, IRQF_DISABLED, "tdma", tdev);
+if (ret)
+goto err_req_irq;
+}
+
+dma_cap_set(DMA_SLAVE, tdev->device.cap_mask);
+dma_cap_set(DMA_CYCLIC, tdev->device.cap_mask);
+
+INIT_LIST_HEAD(&tdev->device.channels);
+
+/* initialize channel parameters */
+for (i = 0; i < chan_num; i++) {
+ret = mmp_tdma_chan_init(tdev, i, irq, type);
+if (ret)
+goto err_init;
+}
+
+tdev->device.dev = &pdev->dev;
+tdev->device.device_alloc_chan_resources =
+mmp_tdma_alloc_chan_resources;
+tdev->device.device_free_chan_resources =
+mmp_tdma_free_chan_resources;
+tdev->device.device_prep_slave_sg = mmp_tdma_prep_slave_sg;
+tdev->device.device_prep_dma_cyclic = mmp_tdma_prep_dma_cyclic;
+tdev->device.device_tx_status = mmp_tdma_tx_status;
+tdev->device.device_issue_pending = mmp_tdma_issue_pending;
+tdev->device.device_control = mmp_tdma_control;
+tdev->device.copy_align = TDMA_ALIGNMENT;
+
+dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
+platform_set_drvdata(pdev, tdev);
+
+ret = dma_async_device_register(&tdev->device);
+if (ret) {
+dev_err(tdev->device.dev, "unable to register\n");
+goto err_init;
+}
+
+dev_info(tdev->device.dev, "initialized\n");
+return 0;
+
+err_init:
+for (i = 0; i < chan_num; i++)
+devm_kfree(&pdev->dev, tdev->tdmac[i]);
+if (tdev->irq)
+devm_free_irq(tdev->dev, tdev->irq, tdev);
+err_req_irq:
+iounmap(tdev->base);
+err_ioremap:
+release_mem_region(iores->start, resource_size(iores));
+err_request_region:
+err_irq:
+devm_kfree(&pdev->dev, tdev);
+return ret;
+}
+
+static const struct platform_device_id mmp_tdma_id_table[] = {
+{ "mmp-adma",MMP_AUD_TDMA },
+{ "pxa910-squ",PXA910_SQU },
+{ },
+};
+
+static struct platform_driver mmp_tdma_driver = {
+.driver= {
+.name= "mmp-tdma",
+.owner  = THIS_MODULE,
+},
+.id_table= mmp_tdma_id_table,
+.probe= mmp_tdma_probe,
+.remove= __devexit_p(mmp_tdma_remove),
+};
+
+module_platform_driver(mmp_tdma_driver);
+
+MODULE_DESCRIPTION("MMP Two-Channel DMA Driver");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/platform_data/mmp_dma.h b/include/linux/platform_data/mmp_dma.h
new file mode 100644
index 0000000..4e21cf9
--- /dev/null
+++ b/include/linux/platform_data/mmp_dma.h
< at >< at > -0,0 +1,20 < at >< at >
+/*
+ *  MMP Platform DMA Management
+ *
+ *  Copyright (c) 2011 Marvell Semiconductors Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ */
+
+#ifndef MMP_DMA_H
+#define MMP_DMA_H
+
+struct mmp_tdma_data {
+u32 bus_size;
+u32 pack_mod;
+};
+
+#endif /* MMP_DMA_H */

[PATCH 0/4] mmp audio support

Zhangfei Gao — 2012-05-25T07:10:59

These four patches provide mmp audio support under alsa via dmaengine
Support platfrom pxa688 and pxa910
mmp_tdma.c and mmp-pcm.c is shared for pxa688 and pxa910
pxa688 (mmp2) use mmp2-sspa.c
pxa910 directly use pxa-ssp.c
mmp_tdma.c is under dmaengine framework

Verified on brownstone (pxa688) and ttc-dkb

Zhangfei Gao (4):
  dmaengine: mmp_tdma: add mmp tdma support
  ASoC: mmp: add audio dma support
  ASOC: mmp: add sspa support
  ASoC: add mmp brownstone support

 drivers/dma/Kconfig                     |   10 +
 drivers/dma/Makefile                    |    1 +
 drivers/dma/mmp_tdma.c                  |  677 +++++++++++++++++++++++++++++++
 include/linux/platform_data/mmp_audio.h |   22 +
 include/linux/platform_data/mmp_dma.h   |   20 +
 sound/soc/pxa/Kconfig                   |   20 +
 sound/soc/pxa/Makefile                  |    6 +
 sound/soc/pxa/brownstone.c              |  303 ++++++++++++++
 sound/soc/pxa/mmp-pcm.c                 |  448 ++++++++++++++++++++
 sound/soc/pxa/mmp-sspa.c                |  536 ++++++++++++++++++++++++
 sound/soc/pxa/mmp-sspa.h                |   92 +++++
 11 files changed, 2135 insertions(+), 0 deletions(-)
 create mode 100644 drivers/dma/mmp_tdma.c
 create mode 100644 include/linux/platform_data/mmp_audio.h
 create mode 100644 include/linux/platform_data/mmp_dma.h
 create mode 100644 sound/soc/pxa/brownstone.c
 create mode 100644 sound/soc/pxa/mmp-pcm.c
 create mode 100644 sound/soc/pxa/mmp-sspa.c
 create mode 100644 sound/soc/pxa/mmp-sspa.h

Re: [PATCH 2/5] ARM: imx6q: add clock for apbh-dma

Sascha Hauer — 2012-05-25T06:47:53

Ok then, just wanted to make sure this is no patching accident.

Sascha

Re: [PATCH 4/5] ARM: imx6q: add DT node for gpmi-nand

Shawn Guo — 2012-05-25T02:50:58

Missing pinctrl setup?

Re: [PATCH 2/5] ARM: imx6q: add clock for apbh-dma

Shawn Guo — 2012-05-25T02:41:08

I guess it's a hardware bug.

Re: [PATCH 3/5] dma: mxs-dma: enable apbh-dma for imx6q

Shawn Guo — 2012-05-25T02:36:01

As I commented on dts change, you do not need to patch
drivers/dma/mxs-dma.c at all, since the IP block on imx6q is compatible
with imx28 with no need of any tweaking.  All you need to do is put
imx28 compatible string at the end of imx6q one, and the driver will
simply work for imx6q.  That's the whole point of DT compatible
property.

Regards,
Shawn

Re: [PATCH 1/5] ARM: imx6q: add DT node for apbh-dma

Shawn Guo — 2012-05-25T02:31:01

I guess imx6q-dma-apbh is compatible with imx28-dma-apbh.  In that
case, you need something like below.

compatible = "fsl,imx6q-dma-apbh", "imx28-dma-apbh";

Then you do not need to patch mxs-dma.c at all.

Regards,
Shawn