gmane.comp.cad.kicad.user

Re: Updates and layer stiching

russ95462 — 2013-05-22T07:45:27

If you have a SMPS it has a local ground that needs connecting to the ground plane, that needs a lot of punching through and if a line bisects a ground plane then the plane needs to be stitched together using the plane underneath, again just RMB or LMB click would be perfect for this. It is a really useful feature, honest!. My audio power amp PCB will be one or two layer so I shall stop whining about it as I will not need it.

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Re: Artifact on eeschema connecting wires

russ95462 — 2013-05-22T07:37:36

Yep thanks, that it. I had changed the grid size and changed it back, ao I now have to redo a lot of the schematic. Will not make that mistake again!

--- In kicad-users-hHKSG33TihhbjbujkaE4pw< at >public.gmane.org, Andy Eskelson <andyyahoo< at >...> wrote:




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Re: Updates and layer stiching

Robert — 2013-05-18T20:27:46

The track just follows your mouse movement, so it's not at all a 
hindrance.   Kicad needs to know what net the via is on so it knows 
which planes to connect it to.   If you really, really don't want a 
trailing track, create a module with a single, suitable through-hole 
pad, add as many as you need to the schematic, wire them to the relevant 
net, and the in PCBNew plonk them all down where you need them.   Of 
course you can do the same thing with "tiles" of through-hole pads, if 
that's relevant.

That all said, I see no point whatsoever in having an analog ground on 
one layer and a digital ground on another layer, and then connecting 
them all over the board with vias.   The usual arrangement for this sort 
of thing is to star-connect at the point where ground is connected to 
the outside world.

Robert.

On 18/05/2013 18:17, Russ Hughes wrote:

Re: Running KiCad on Windows Vista

Chris Elliott — 2013-05-21T22:34:07

Or better practice to keep the program distribution files separate from
your user files:
Let Windows install it into Program Files. Then create a working area in
My Documents (or any where, really, that is convenient within your user
area) for your projects, downloaded libraries, user created libraries,
etc. If you need to modify one of the components or footprints from the
distribution libraries, copy that component or footprint into a user
library and save your changes there. Then make sure your user library is
above the distribution libraries in your project's library list.

On 5/21/2013 5:38 PM, Ivica Kvasina wrote:

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Re: Running KiCad on Windows Vista

Ivica Kvasina — 2013-05-21T21:38:26

Vista and up (Win7, Win8) have UAC which prevents you from modifying files in certain folders including Program Files. So you get bunch of errors (or worse - silence) and your changes if applied are in copies of your files that are in something they call "virtual store". You can install KiCak in own folder so it does not fight with UAC ("C:\KiCad" for example) or at least move libraries to such 'unrestricted' folder.

IK

________________________________
 From: jeffrussell2 <jeffrussell2-/E1597aS9LQAvxtiuMwx3w< at >public.gmane.org>
To: kicad-users-hHKSG33TihhbjbujkaE4pw< at >public.gmane.org 
Sent: Tuesday, May 21, 2013 12:23:22 PM
Subject: [kicad-users] Running KiCad on Windows Vista

I downloaded and installed KiCad2013.05.16 BZR4016 and started working through a step by step tutorial from David Jahshan 2006 and updated 2011 by Phil Hutchinson. However, I notice that the folder which I created were not appearing in the directory and KiCad keeps given me a "cant locate path" error. Which I believe because when I search my drive I see

C:\program files\Kicad with bin, doc, share, and jeff (created folder), but the C:\program files\Kicad\jeff folder is empty. 

Now when I execute the KiCad program and open the files I see the following path 

C:\program files\Kicad with bin, doc, share, practice, jeff,and tute1

and each of these folders contain at least one file. However, when I try to view the files in jeff, practice or tute1 notepad does not see the path.

Running KiCad on Windows Vista

jeffrussell2 — 2013-05-21T16:23:22

I downloaded and installed KiCad2013.05.16 BZR4016 and started working through a step by step tutorial from David Jahshan 2006 and updated 2011 by Phil Hutchinson. However, I notice that the folder which I created were not appearing in the directory and KiCad keeps given me a "cant locate path" error. Which I believe because when I search my drive I see

C:\program files\Kicad with bin, doc, share, and jeff (created folder), but the C:\program files\Kicad\jeff folder is empty.

Now when I execute the KiCad program and open the files I see the following path

C:\program files\Kicad with bin, doc, share, practice, jeff,and tute1

and each of these folders contain at least one file. However, when I try to view the files in jeff, practice or tute1 notepad does not see the path.

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Re: Artifact on eeschema connecting wires

Andy Eskelson — 2013-05-21T18:15:15

That usually mkeans that the lines are NOT joined. The square is the
line end marker.

Zoom right in to check

Andy

On Tue, 21 May 2013 08:20:10 -0000 "russ95462"
<russel-97jfqw80gc6171pxa8y+qA< at >public.gmane.org> wrote:



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Re: Updates and layer stiching

e_e_lucchesi — 2013-05-21T12:22:29

Hello,
Just a note on that note.
Using KiCad build: (2013-mar-19) stable, Pcbnew lets you choose the module name source: from netlist / from separate .cmp file, so you don't get warnings about that.
Best regards,
Esteban



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Artifact on eeschema connecting wires

russ95462 — 2013-05-21T08:20:10

On ee scheema if two wires are joined, sometimes a very faint out line of  a square appears around them, they do not throw up a DRC error,does anyone not what they signify and how to get rid of them other than redrawing the whole line?



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Re: Re: Updates and layer stiching

Peter Bennett — 2013-05-21T00:42:46

Beware that if you do use cvpcb at any time, it creates a packaging file 
that PCBnew will use in preference to any conflicting information in the 
netlist!  Also, if you don't use CVpcb, PCBnew will complain that 
cvPCB's output file is missing (if I recall correctly) - you can ignore 
that warning, and PCBnew will use the footprint information in the netlist.

On 2013-05-19 10:06 PM, asp_digital wrote:

Re: Drawing tracks to offset pads

Romain — 2013-05-20T22:46:47

Hi,

I would suggest you to double route your board :)
First routing with minimum width as possible for your DRC (if you matters).
So all your pads will be connected (at this stage : DRC free of errors).
Then, disable the pad magnetism, choose the thickness you want (and a good
grid), and re-route all the tracks you want to be thicker (you do not need
to connect tracks to each pad, just pass over them).

Romain


On 20 May 2013 21:13, David <davelcohen2000-/E1597aS9LQAvxtiuMwx3w< at >public.gmane.org> wrote:

Drawing tracks to offset pads

David — 2013-05-20T20:13:28

Hi,

I'm designing an LED array where manufacturer calls for 2.5mm hole spacing between the LED leads but 3.9mm spacing between the pads. That's easy enough to do by the OffsetX parameter in the pad properties of the module editor.

The problem is that I want the track to end on the center of the pad, not the center of the hole. This will allow me to make traces as thick as possible (more for dissipating heat than ampacity). The thickness is more limited by the distance between the hole than the distance between the pads.

Is there a way to do this?

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CircuitHub supports Kicad

twistx77 — 2013-05-20T18:09:39

Hey everyone,

For those that don't know what it is, it is basically a universal collaborative library that will support many circuit design programs and makes it easier to obtain parts for your designs.

I just wanted to let you know they now support Kicad. It is still on beta but it works and they will be fixing problems that users have.

If you want to give it a try just go to their web. Look for it in google since I don't know if posting the link will be considered spam.

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Pin not connected error

rattus32 — 2013-05-20T16:38:10

Hi - I have a fairly complex schematic that *was* ERC clean until I added a final connector to interface the inputs to the outside world.

As soon as a, say, CONN-1 from the conn library is attached, I get "Pin not connected" errors on the pins to which I attached the CONN-1 component. The pin type on the component is Passive.

Any thoughts? I really like ERC clean designs ;^)

Thanks, 

Mike



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Re: DRC errors on schematic

russ95462 — 2013-05-20T12:18:08

OK got it thanks, next time I will RTFM-

Cheers

Russel

--- In kicad-users-hHKSG33TihhbjbujkaE4pw< at >public.gmane.org, Romain <romain145< at >...> wrote:




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Re: Puzzling

Tony Casey — 2013-05-20T11:40:44


--- In kicad-users-hHKSG33TihhbjbujkaE4pw< at >public.gmane.org, Ernie Hatt <erniehatt< at >...> wrote:
Hello Ernie,

This sounds like a Windows 7 problem. (I assume that's what OS you have.)

You have probably tried to save work files in the installation tree, which is a bad idea. Win7 won't allow you to do this, although it doesn't always tell you. Your files will be a place called the "virtual store".

It might not be exactly right, but start your search somewhere like:
C:\Users\<user>\AppData\Local\VirtualStore\Program Files\KiCad\.. (<user> is your name).

You will probably have to change the folder properties (in the control panel) so that system files are visible, which is not the default.

Next time, make a new folder under "Documents" for all your libraries and work files, and this won't happen again.

Regards,
Tony



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Re: Re: DRC errors on schematic

Romain — 2013-05-20T11:19:21

In eeschema you can access the manual in Help -> Content.
Have a look at the ERC section.

When you run ERC from the ERC window you have a list of all warning and
errors. What error a linked with those pins ?
You can also click on the green arrow and the error will be displayed in
the status bar, on the bottom of the screen. Please, quote this error.

Romain


On 20 May 2013 11:38, russ95462 <russel-97jfqw80gc6171pxa8y+qA< at >public.gmane.org> wrote:

Re: DRC errors on schematic

russ95462 — 2013-05-20T10:38:19

Hi,

   Thanks, I have uploaded a picture-

 http://groups.yahoo.com/group/kicad-users/photos/album/703468006/pic/list

BR

Russel



--- In kicad-users-hHKSG33TihhbjbujkaE4pw< at >public.gmane.org, "romain145" <romain145< at >...> wrote:



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Re: DRC errors on schematic

romain145 — 2013-05-20T08:27:19

Which DRC error do you get ? Is it related to power supplies ? Can you quote it ?
I had this king of error with a 5V not defined with a POWER_FLAG.

Romain


--- In kicad-users-hHKSG33TihhbjbujkaE4pw< at >public.gmane.org, "russ95462" <russel< at >...> wrote:




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DRC errors on schematic

russ95462 — 2013-05-20T07:59:26

Hi,

When I run the DRC check I keep getting a lot of DRC error arrows, even if I redraw them they are still there, despite no errors appearing on the same component type else where, sometimes they disappear if I put a junction on the component, sometimes adding a junction causes one to appear. Zooming in does does not seem to show a mismatch in the alignment of the component and wire. Any ideas anyone?

Cheers

Russ

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Re: Updates and layer stiching

asp_digital — 2013-05-20T05:06:52

Except that you don't need to use the cvpcb hack. Check this mailing lists' archives, this has been discussed.

You can embed the name of the footprint in the schematic symbol and when you generate the netlist that information is there. Import that netlist into the PCB and it's all there (assuming, of course, that you've included the proper module libraries in the PCB project). Create the symbol with the footprint mapping once and you don't have to worry about choosing the wrong footprint later.

-a

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