gmane.technology.electronics.signal-integrity

Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Loyer, Jeff — 2013-05-23T17:16:50

Crud!  I'm usually a little clearer than that.  Let's try this again...
Bidirectional SET2DIL presentation (as well as SET2DIL overview paper and presentation) available at:
https://www.filesanywhere.com/fs/v.aspx?v=8b6a648c5c6571af9ea6

Jeff Loyer


-----Original Message-----
From: si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org [mailto:si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org] On Behalf Of Loyer, Jeff
Sent: Thursday, May 23, 2013 10:12 AM
To: si-list (si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org)
Subject: [SI-LIST] Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

'bç-Š‰Ú•!Ø2
¦·¬z{Z¶*'ý«0zYZ±!Ø2
¢÷«¾'°¥ª^©Ý¦·¬z{Z¶*'ý«ÚŠV›•æþm¦Ïÿÿ
0ýø¥zÆ§Ë^ïÜ¢oß³ûÿjÊqþ
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org with 'unsubscribe' in the Subject field

or to administer your membership from a web page, g

Re: Causality Condition -why real and imaginary part of a Frequency response of causal system need to be even and odd respectively

2013-05-23T17:13:58

Hi Piyush,

Sorry I'm late to the party here, but maybe our white papers on this topic mentioned in my blog posting will help?

http://signal-integrity.tm.agilent.com/2009/kramers-kronig-in-pictures/

Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Loyer, Jeff — 2013-05-23T17:12:01

'bç-Ú!Ø2¦·¬z{Z¶*'ý«0zYZ±!Ø2¢÷«¾'°¥ª^©Ý¦·¬z{Z¶*'ý«ÚVæþm¦Ïÿÿ0ýø¥zÆ§Ë^ïÜ¢oß³ûÿjÊqþ
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org with 'help' in the Subject field


List forum  is accessible at:
               http://tech.groups.yahoo.com/group/si-list

List archives are viewable at:     
http://www.freelists.org/archives/si-list
 
Old (prior to June 6, 2001) list archives are viewable at:
 http://www.qsl.net/wb6tpu

Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Loyer, Jeff — 2013-05-23T14:19:17

Not a problem - I'll send a link to the presentation when it gets finalized.

Jeff Loyer


-----Original Message-----
From: Ken Cantrell [mailto:ken-MEyLjojI3JOiu113P13oHA< at >public.gmane.org] 
Sent: Thursday, May 23, 2013 6:43 AM
To: scott-3mpTjvN7S/72eFz/2MeuCQ< at >public.gmane.org; Loyer, Jeff
Cc: 'si-list'
Subject: RE: [SI-LIST] Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Ditto.

-----Original Message-----
From: si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org [mailto:si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org] On Behalf Of Scott McMorrow
Sent: Wednesday, May 22, 2013 5:01 PM
To: Loyer, Jeff
Cc: si-list (si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org)
Subject: [SI-LIST] Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Jeff
Don't know if I can make your presentation, but after you are done I would ask for a copy if you don't mind.

best regards,

Scott




On Wed, May 22, 2013 at 10:44 AM, Loyer, Jeff <jeff.loyer-ral2JQCrhuEAvxtiuMwx3w< at >public.

Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Ken Cantrell — 2013-05-23T13:43:07

Ditto.

-----Original Message-----
From: si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org [mailto:si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org] On
Behalf Of Scott McMorrow
Sent: Wednesday, May 22, 2013 5:01 PM
To: Loyer, Jeff
Cc: si-list (si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org)
Subject: [SI-LIST] Re: Presentation on bidirectional SET2DIL May 30 8:00AM
and 5:00PM PDT

Jeff
Don't know if I can make your presentation, but after you are done I would
ask for a copy if you don't mind.

best regards,

Scott

On Wed, May 22, 2013 at 10:44 AM, Loyer, Jeff <jeff.loyer-ral2JQCrhuEAvxtiuMwx3w< at >public.gmane.org> wrote:

回复： the relationship of tck(avg) and CL in DDR3 spec

John Lee — 2013-05-23T07:56:31

Hi Jackle,
CL means Column Latency, because after the cell has been selected, the data needs some time to 'go to outside', this duration is defined by tck*CL.
For example, for 1600-11-11-11, the actual time is 1.25ns * 11 = 13.75ns.
This 13.75ns is DRAM's characteristic, it's almost the minimum requirement during actual operation. If you downgrade the frequency, the system will set the CL=9, 1.5 * 9 = 13.5ns.
Â 
Best Regards!
John Lee

________________________________
 åä»¶äººï¼ jackle zheng <zheng.jackle-Re5JQEeQqe8< at >public.gmane.orgm>
æ¶ä»¶äººï¼ si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org 
åéæ¥æï¼ 2013å¹´5æ23æ¥, ææå, 11:18 ä¸å
ä¸»é¢: [SI-LIST] the relationship of tck(avg) and CL in DDR3 spec
 

hi, member,
I was testing my EP board on DDR3 compliance, myÂ  tck(avg) was smaller than
spec. So, i checked the DDR3 spec, i found tck(avg) is correlated with CL
value. my question is what is the relationship of th

the relationship of tck(avg) and CL in DDR3 spec

jackle zheng — 2013-05-23T03:18:05

hi, member,
I was testing my EP board on DDR3 compliance, my  tck(avg) was smaller than
spec. So, i checked the DDR3 spec, i found tck(avg) is correlated with CL
value. my question is what is the relationship of the two parameters???
any comment is appreciated.

Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Cristian Filip — 2013-05-23T02:33:43

Hi Jeff,
As Scott pointed out,
many of us wonât be able to attend, but we are interested to get a copy of your
presentation. Could you please upload it somewhere and share it for everybodyâs
benefit?
Thank you in advance,
Cristian
Â  
________________________________
 From: Scott McMorrow <scott-3mpTjvN7S/72eFz/2MeuCQ< at >public.gmane.org>
To: "Loyer, Jeff" <jeff.loyer-ral2JQCrhuEAvxtiuMwx3w< at >public.gmane.org> 
Cc: "si-list (si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org)" <si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org> 
Sent: Wednesday, May 22, 2013 7:00:56 PM
Subject: [SI-LIST] Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT
  

Jeff
Don't know if I can make your presentation, but after you are done I would
ask for a copy if you don't mind.

best regards,

Scott




On Wed, May 22, 2013 at 10:44 AM, Loyer, Jeff <jeff.loyer-ral2JQCrhuEAvxtiuMwx3w< at >public.gmane.org> wrote:

Re: Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Scott McMorrow — 2013-05-22T23:00:56

Jeff
Don't know if I can make your presentation, but after you are done I would
ask for a copy if you don't mind.

best regards,

Scott




On Wed, May 22, 2013 at 10:44 AM, Loyer, Jeff <jeff.loyer-ral2JQCrhuEAvxtiuMwx3w< at >public.gmane.org> wrote:

Presentation on bidirectional SET2DIL May 30 8:00AM and 5:00PM PDT

Loyer, Jeff — 2013-05-22T14:44:56

For those who are using SET2DIL (Single Ended TDR to Differential Insertion Loss),
I will be offering a 1 hour on-line presentation (and audio bridge) on a forthcoming improvement to the technique Thursday, May 30 at 8:00AM and 5:00PM PDT.
In short, we have found that due to the asymmetric nature of soldermask on microstrip traces, SET2DIL should excite the DUT from both directions and sum all terms for best results.

We haven't studied stripline traces enough to know if they are similarly affected by asymmetric factor(s).

If you would like to attend but haven't yet received an invitation to the presentation, please e-mail me and I will send you the logistics.

Thank you,
Jeff Loyer


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request-uGLqWuYN4q

Re: DDR2 length matching address and clock

steve weir — 2013-05-22T06:52:56

K if you have doubts about your models it is best to talk to the silicon 
vendor who supplied them.  There are enough reference designs around for 
DDR2 that you should not have a problem running the model in your 
environment against a known result.

Steve.

On 5/21/2013 11:38 PM, Balamanikandan K wrote:

DDR2 length matching address and clock

Balamanikandan K — 2013-05-22T06:38:16

Dear Experts,

This is regarding the trace length matching between DDR2 address and clock
signals.

*As per my understanding, **the CLK should be centered within** **address
eye to measure and match the trace length.  i.e. signals should like as
shown in figure.*


**
*[image: Inline image 1]*
**

**

I am using Hyperlynx tool for simulation.


Address line is connected from a processor to only one DDR2 DRAM(Not DIMM).

I am using a separate PLL clock driver which drives the clock to only one
DRAM.

No transmission lines are used (direct connection between driver and
memory). Terminations are provided.

*Under direct connections and equal load ( only one DRAM) :*

*
*

If the length adjustment measurement is to be right, then there should not
be any time difference (skew) between the clock signal and address signal
when the signal rises at the output of the drivers.


We have probed signals at the die as well as the pin of the driver output.


But the simulation results show the time difference. Clock signal

Employment opportunity at Qualcomm for High-Speed Digital Hardware Characterization Engineer

Jagadeesh Gownipalli — 2013-05-21T20:49:37

We have immediate openings in our High-Speed SERDES design
validation/Characterization team. We are looking for people with 3-10 years
experience in High Speed SERDES validation/characterization, signal
integrity, PCB design
Below is the description of the Job . If you are intrested please apply at
the link High-Speed Digital Hardware Test
Engineer<http://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1886271>

  Posting Title

High-Speed Digital Hardware Characterization Engineer





  Job Function

As part of the HSWP (High-Speed Wired Peripheral) organization within QCT,
you will be responsible for bench characterization of Digital High-Speed
Physical Layer SERDES (USB, SATA, PCIe,SGMII/QSGMII, MIPI PHY ,
HDMI,LVDS,eDP). Our goal/mission is to ensure that our products are
manufacturable, and exceed the performance expectations of our global
customers.







  Skills/Experience

Candidate must be proficient in test/characterization of High-Speed SERDES
(USB, SATA, PCIe,SGMII/QSGMII, MIPI PHY , H

Re: Single Point Grounding - Not Achievable at High Frequencies (greater than a few MHz)

Bill Owsley — 2013-05-21T03:02:14

Dr. Tom Van Doren demonstrates that single point grounding is not possible above the audio frequencies.  
Thus the lower cutoff in the "regulations" of 9 kHz.  And that is really old school...




    office in Boulder City, NV! Here it is:
Single Point Grounding - Not Achievable at High Frequencies (greater than a few MHz)
    work to do on the house move so the next few weeks will be very busy
    and the May Technical Tidbit may be a little late as well. Once the move is complete, I expect to do morning 5 to 10 minute podcasts on technical topics every morning I am in the office. These podcasts will appear on the home page of http://CircuitAdvisor.com by late morning each day except for days when I am not in the office.
------------------------------------------------------- ___          _       Doug Smith \          / )      P.O. Box 60941 =========          Boulder City, NV 89006-0941 _ / \     / \ _       TEL/FAX: 702-570-6108/570-6013 /  /\  \ ] /  /\  \     Mobile:  408-858-4528
|  q-----( )  |  o

Re: mlcc capacitors with silver-palladium termination

Jan Vercammen — 2013-05-21T10:59:04

Steve
what you propose is to find an epoxy conductive glue that will work with 
the standard
MLCC terminal finish (NI+Sn), that is another perspective. Thank you!

I do find Ag+Pd terminals in Murata's GCG15, GCG18, GCC21,  and GCG31 
series, but there
are no 0201 sizes., 

Kind Regards,

Jan Vercammen | Agfa HealthCare
Hardware/RF/EMC/Analog Designer | HE/Architecture & Design Mortsel
T  +32 3444 6233 | F  +32 3 444 6268

Agfa HealthCare NV, Septestraat 27, 2640 Mortsel, Belgium
http://www.agfahealthcare.com
http://blog.agfahealthcare.com
R.O.: Septestraat 27, B-2640 Mortsel, Belgium | RLE Antwerp | VAT BE 
0403.003.524 | IBAN Operational Account BE81363012356224 | IBAN Customer 
Account BE20375104592856 | ING Belgium NV, B-1000 Brussels
Click on link to read important disclaimer: 
http://www.agfahealthcare.com/maildisclaimer 



From:   steve weir <weirsi-xOG+iHAZQhzQT0dZR+AlfA< at >public.gmane.org>
To:     si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org
Date:   21/05/2013 11:58
Subject:        [SI-LIST] Re: m

Re: mlcc capacitors with silver-palladium termination

steve weir — 2013-05-21T09:56:41

Jan for such high energy densities it is pretty much all base metal.  
You should be able to find a compatible product from Ellsworth.

Steve.
On 5/21/2013 1:37 AM, Jan Vercammen wrote:

mlcc capacitors with silver-palladium termination

Jan Vercammen — 2013-05-21T08:37:19

Hi,
can anyone point me to a vendor who can supply 0201 size capacitors with
a 6.3V rating (capacitance values 47nF, 68nF, 100nF and 1uf (or 470nf)
but with a silver-palladium termination for conductive epoxy assembly

I have checked DigiKey, Farnell and several large manufacturers of
passive components  but without success

Kind Regards,

Jan Vercammen | Agfa HealthCare
Hardware/RF/EMC/Analog Designer | HE/Architecture & Design Mortsel
T  +32 3444 6233 | F  +32 3 444 6268

Agfa HealthCare NV, Septestraat 27, 2640 Mortsel, Belgium
http://www.agfahealthcare.com
http://blog.agfahealthcare.com
R.O.: Septestraat 27, B-2640 Mortsel, Belgium | RLE Antwerp | VAT BE 
0403.003.524 | IBAN Operational Account BE81363012356224 | IBAN Customer 
Account BE20375104592856 | ING Belgium NV, B-1000 Brussels
Click on link to read important disclaimer: 
http://www.agfahealthcare.com/maildisclaimer 



------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request-uGLqWuYN4qMgsBAK

Re: Causality Condition -why real and imaginary part of a Frequency response of causal system need to be even and odd respectively

Ken Cantrell — 2013-05-20T14:45:57

Piyush,
This is first semester Communications theory material.  Ziemer and Tranter,
Principles of Communications: Systems, Modulation, and Noise, 6th edition,
Wiley is the publisher.  Chapter 2 covers the material of interest.  I'm
sure there are numerous texts and publishers.

Hope this helps,
Ken

-----Original Message-----
From: si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org [mailto:si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org] On
Behalf Of Orin Laney
Sent: Saturday, May 18, 2013 9:33 AM
To: piyush.nithmr-Re5JQEeQqe8AvxtiuMwx3w< at >public.gmane.org; si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org
Subject: [SI-LIST] Re: Causality Condition -why real and imaginary part of a
Frequency response of causal system need to be even and odd respectively

This is not an SI question.  The electrical engineering, mathematics, or
mathematical physics forums at http://www.researchgate.net/ are better tuned
for this sort of question.

Regards,
Orin Laney 

-----Original Message-----
From: si-list-bounce-uGL

Re: Causality Condition -why real and imaginary part of a Frequency response of causal system need to be even and odd respectively

Yuriy Shlepnev — 2013-05-18T15:54:54

Piyush,

Time-domain response must be a real function of time. If it is computed with
the inversed Fourier transform of the complex frequency domain response, the
TD response is be always real if the imaginary part of FD response is odd
and real part is even. It is the TD response realness condition. We do not
use negative frequency in analysis of interconnects, but the condition at DC
is useful to control quality of S-parameters: imaginary part  and derivative
of real part of FD response must be zero at DC. 

Best regards,
Yuriy

Yuriy Shlepnev, Ph.D.
President, Simberian Inc.
3030 S Torrey Pines Dr. Las Vegas, NV 89146, USA
Office +1-702-876-2882; Fax +1-702-482-7903
Cell +1-206-409-2368
Skype: Shlepnev

www.simberian.com 
Simbeor - Accurate, Fast, Easy and Affordable Electromagnetic Signal
Integrity Software
2010 and 2011 DesignVision Award Winner


-----Original Message-----
From: si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org [mailto:si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org] On
Beh

Re: Causality Condition -why real and imaginary part of a Frequency response of causal system need to be even and odd respectively

Orin Laney — 2013-05-18T15:32:34

This is not an SI question.  The electrical engineering, mathematics, or
mathematical physics forums at http://www.researchgate.net/ are better tuned
for this sort of question.

Regards,
Orin Laney 

-----Original Message-----
From: si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org [mailto:si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org] On
Behalf Of piyush bhatt
Sent: Saturday, May 18, 2013 3:47 AM
To: si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org
Subject: [SI-LIST] Causality Condition -why real and imaginary part of a
Frequency response of causal system need to be even and odd respectively

Hi All
An LTI system is causal if and only if h(t)=0 for t<0.

As derivation goes h(t)=h(t)sgn(t).Taking Freq transform both side and doing
some manipulations.We get to point that H(jw) = Hilbert transform of itself.

Then they say we can divide H(jw) into real and imaginary part.And real part
will be even function and imaginary part will be odd function.

Can you tell me why real part will be even functio

Re: POE Circuitry

Stefan Milnor — 2013-05-18T15:08:32

Is simulation appropriate or feasible here? I think what you want is an
evaluation board, to do physical tests on. All the major vendors of POE
silicon have evaluation boards available.

-----Original Message-----
From: si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org [mailto:si-list-bounce-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org]
On Behalf Of steve weir
Sent: Saturday, May 18, 2013 2:58 AM
To: si-list-uGLqWuYN4qMgsBAKwltoeQ< at >public.gmane.org
Subject: [SI-LIST] Re: POE Circuitry

Sunil your question is very broad.  If you are interested in using
particular ICs then the obvious next step is to obtain models from those
manufacturers.  Many of the magnetics have models available from their
respective manufacturers as well.

Steve.
On 5/18/2013 2:45 AM, sunil bharadwaz wrote:
available .

--
Steve Weir
IPBLOX, LLC
1580 Grand Point Way
MS 34689
Reno, NV  89523-9998
www.ipblox.com

(775) 299-4236 Business
(866) 675-4630 Toll-free
(707) 780-1951 Fax

All contents Copyright (c)2013 IPBLOX, LLC.  All Rights Res