http://permalink.gmane.org/gmane.linux.kernel.samsung-soc hourly 1 1901-01-01T00:00+00:00 http://gmane.org/img/gmane-25t.png http://gmane.org http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19776 <pre>Hi all, I'd like to discuss Exynos DRM TODO work. There are features we have to solve and implement. The purpose of this email is to share what we have to do so that other guys can be involved without duplicated work. 1. gscaler based on KMS interfaces - exynos5250 and later use the gscaler device instead of VP device. And now exynos drm driver has gscaler module as a sub module of IPP framework. However, this gscaler module is very specific to IPP framework so it's not easy to reuse this module. So maybe we need so many works for it. Video play back path using post process (AS IS): MFC--------IPP--------KMS---------FIMD or HDMI Ideal video play back path using post process (TO BE): MFC--------KMS--------FIMD or HDMI The above scenario is to send decoded image data (YUV format) to display device via post process. However, we don't really need to use IPP framework in case of using gscaler as VP. All we have to do is to call kms interface (setplane) for it like we did before. 2. More features for HDMI</pre> Inki Dae 2013-06-18T06:33:25 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19772 <pre>The Exynos5420 clocks are statically listed and registered using the Samsung specific common clock helper functions. Signed-off-by: Chander Kashyap &lt;chander.kashyap&lt; at &gt;linaro.org&gt; Signed-off-by: Thomas Abraham &lt;thomas.abraham&lt; at &gt;linaro.org&gt; Reviewed-by: Tomasz Figa &lt;t.figa&lt; at &gt;samsung.com&gt; --- .../devicetree/bindings/clock/exynos5420-clock.txt | 201 ++++++ drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-exynos5420.c | 762 ++++++++++++++++++++ 3 files changed, 964 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/exynos5420-clock.txt create mode 100644 drivers/clk/samsung/clk-exynos5420.c diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt new file mode 100644 index 0000000..9bcc4b1 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt &lt; at &gt;&lt; at &gt; -0,0 +1,201 &lt; at &gt;&lt; at &gt; +* Samsung Exynos5420 Clock Controller + +The Exynos5420 clock controller g</pre> Chander Kashyap 2013-06-18T06:29:18 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19771 <pre>Add initial device tree nodes for Exynos5420 SoC and SMDK5420 board. Signed-off-by: Chander Kashyap &lt;chander.kashyap&lt; at &gt;linaro.org&gt; --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5420-smdk5420.dts | 33 +++++++++ arch/arm/boot/dts/exynos5420.dtsi | 103 +++++++++++++++++++++++++++++ 3 files changed, 137 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts create mode 100644 arch/arm/boot/dts/exynos5420.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f0895c5..5efa7e0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile &lt; at &gt;&lt; at &gt; -57,6 +57,7 &lt; at &gt;&lt; at &gt; dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos5440-sd5v1.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ +exynos5420-smdk5420.dtb \ exynos5440-ssdk5440.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ ecx-2000.dtb diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts new file mode 10</pre> Chander Kashyap 2013-06-18T06:29:19 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19768 <pre>Exynos5420 is new SoC in Samsung's Exynos5 SoC series. Add initial support for this new SoC. Signed-off-by: Chander Kashyap &lt;chander.kashyap&lt; at &gt;linaro.org&gt; Signed-off-by: Thomas Abraham &lt;thomas.abraham&lt; at &gt;linaro.org&gt; Reviewed-by: Tomasz Figa &lt;t.figa&lt; at &gt;samsung.com&gt; --- arch/arm/mach-exynos/Kconfig | 10 ++++++++++ arch/arm/mach-exynos/common.c | 7 +++++++ arch/arm/mach-exynos/mach-exynos5-dt.c | 1 + arch/arm/plat-samsung/include/plat/cpu.h | 8 ++++++++ 4 files changed, 26 insertions(+) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index ff18fc2..5ae41ec 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig &lt; at &gt;&lt; at &gt; -71,6 +71,16 &lt; at &gt;&lt; at &gt; config SOC_EXYNOS5250 help Enable EXYNOS5250 SoC support +config SOC_EXYNOS5420 +bool "SAMSUNG EXYNOS5420" +default y +depends on ARCH_EXYNOS5 +select PM_GENERIC_DOMAINS if PM +select S5P_PM if PM +select S5P_SLEEP if PM +help + Enable EXYNOS5420 SoC support + config SOC_EXYNOS5440 bool</pre> Chander Kashyap 2013-06-18T06:29:15 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19766 <pre>In preparation of adding support for Exynos5420, which has many peripherals similar to Exynos5250, a new common Exynos5 device tree source file is created out of the exising Exynos5250 device tree source file. Only the common nodes required for basic boot up on Exynos5420 based boards are moved into this new file and the rest of the common nodes would be moved subsequently. Exynos5440 SoC is quite different from Exynos5250 and Exynos5420 SoCs. Hence it is not possible to reuse "exynos5.dtsi" for Exynos5440. Signed-off-by: Chander Kashyap &lt;chander.kashyap&lt; at &gt;linaro.org&gt; Reviewed-by: Tomasz Figa &lt;t.figa&lt; at &gt;samsung.com&gt; --- arch/arm/boot/dts/exynos5.dtsi | 111 +++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5250.dtsi | 66 +--------------------- 2 files changed, 112 insertions(+), 65 deletions(-) create mode 100644 arch/arm/boot/dts/exynos5.dtsi diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi new file mode 100644 index 0000000..f65e124 --- /dev/null +++ b/arch/ar</pre> Chander Kashyap 2013-06-18T06:29:13 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19765 <pre>Exynos5420 is new SoC in Samsung's Exynos5 SoC series. This series adds initial support for this SoC. Changes since v3: 1. Updated the max cpu clock frequency in dt node. 2. Sorted DT nodes alphabetically as suggested by Kukjin. 3. Removed the duplicate commit log comment in: "clocksource: exynos_mct: use (request/free)_irq calls for local timer registration" 4. Added comment for Exynos5440 in commit log of the patch: "ARM: dts: fork out common Exynos5 nodes" Changes since v2: 1. Renamed oscclk to fin_pll, in order to keep it consistent with Exynos4/Exynos5 2. Pass memory as single bank rather than splitting in 256MB size banks. Changes since v1: 1. As not-dt platforms will not be supported from 3.11 onwards, following patches from previous patch series are dropped: "irqchip: exynos-combiner: set irq base as 256 for Exynos5420" "ARM: Exynos: initialize l2x0 cache controller only for cortex-a9 based SoCs" 2. Added device type property in cpu node in the following patch: "ARM: dts:</pre> Chander Kashyap 2013-06-18T06:29:12 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19763 <pre> Thanks. But did not find this in your for-next yet. Not pushed out yet? Also, please add the following series too. http://comments.gmane.org/gmane.linux.kernel.samsung-soc/17942 </pre> Sachin Kamat 2013-06-18T05:15:33 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19762 <pre>Hi Mr. Kukjin, Kindly consider the following patches for review and integration. regards, Rahul Sharma. On Fri, Jun 14, 2013 at 3:39 PM, Arun Kumar K &lt;arunkk.samsung&lt; at &gt;gmail.com&gt; wrote: </pre> Rahul Sharma 2013-06-18T05:09:09 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19761 <pre>Thanks Kukjin. I will address the comments and resend. -- with warm regards, Chander Kashyap </pre> Chander Kashyap 2013-06-18T04:28:08 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19759 <pre>This is the max cpu frequency. This property is used in "parse_dt_topology" in arch/arm/kernel/topology.c" to calculate cpu capacity. -- with warm regards, Chander Kashyap </pre> Chander Kashyap 2013-06-18T04:21:14 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19758 <pre>I have listed the parent clock first, then the child clocks, to maintain readability. I didn't get your point? Thanks. -- with warm regards, Chander Kashyap </pre> Chander Kashyap 2013-06-18T04:09:00 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19757 <pre>Thanks for pointing out. I will fix it and resend. -- with warm regards, Chander Kashyap </pre> Chander Kashyap 2013-06-18T04:11:33 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19756 <pre>I am not adding new hard-coded address. I have simply removed the unnecessary previously existing check. Thanks. -- with warm regards, Chander Kashyap </pre> Chander Kashyap 2013-06-18T04:10:51 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19754 <pre> Looks good. You want it to get via samsung tree or cpufreq? I think all cpufreq related patches should go through cpufreq unless there is a real dependency on samsung tree. </pre> Viresh Kumar 2013-06-18T03:18:41 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19752 <pre> Loan Syndicacion Am AFG Guaranty Trust Bank, zu strukturieren wir Kreditlinien treffen Sie unsere Kunden spezifischen geschäftlichen Anforderungen und einen deutlichen Mehrwert für unsere Kunden Unternehmen. eine Division der AFG Finance und Private Bank plc. Wenn Sie erwägen, eine große Akquisition oder ein Großprojekt sind, können Sie brauchen eine erhebliche Menge an Kredit. AFG Guaranty Trust Bank setzen können zusammen das Syndikat, das die gesamte Kredit schnürt für Sie. Als Bank mit internationaler Reichweite, sind wir gekommen, um Darlehen zu identifizieren Syndizierungen als Teil unseres Kerngeschäfts und durch spitzte diese Zeile aggressiv sind wir an einem Punkt, wo wir kommen, um als erkannt haben Hauptakteur in diesem Bereich. öffnen Sie ein Girokonto heute mit einem Minimum Bankguthaben von 500 £ und Getup zu £ 10.000 als Darlehen und auch den Hauch einer Chance und gewann die Sterne Preis von £ 500.000 in die sparen und gewinnen promo in may.aply jetzt. mit dem Folowin</pre> AFG GTBANK LOAN 2013-06-17T19:28:00 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19751 <pre>Applied, thanks. - Kukjin </pre> Kukjin Kim 2013-06-17T21:59:22 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19750 <pre>Hi Thierry, On Monday 17 of June 2013 22:29:11 Thierry Reding wrote: OK. OK. OK, this should be better indeed. OK. There are few registers shared with samsung_pwm_timer clocksource driver and so normally the spinlock is exported from it. However on on some platforms (namely Exynos &gt;=4x12) kernel can be compiled without that driver, so the lock must be defined locally, just to synchronize multiple PWM channels, as they share registers as well. OK. Nope. Fixed in v2 that I'm going to send soon. OK. I have almost completely reworked this function in v2 and it needs just 5 variables here. Sure. OK. polarity) Hmm, might make sense to put this into a function indeed. Basically this is a trick to work around broken bit layout in TCON register. OK. val) samsung,pwm-outputs __func__); Let me see what I can do about it. OK. specified\n"); Generally output_mask is board-dependent and is passed inside a variant struct using platform_data pointer. Same platform data is used in samsun</pre> Tomasz Figa 2013-06-17T20:50:40 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19749 <pre> Sorry for jumping in so late, I've been busy with other things lately. Nit: this line can be dropped. It serves no purpose. Nit: the */ should align with the * above. The new driver for Renesas did something similar, but I want to discourage storing per-channel data within the chip structure. The PWM framework provides a way to store this information along with the PWM device (see pwm_{set,get}_chip_data()). Can you turn this into a static inline function please? Why is this lock global? Shouldn't it more correctly be part of samsung_pwm_chip? Nit: please align arguments on subsequent lines with the first argument of the first line. There's many more of these but I haven't mentioned them all explicitly. Any particular reason for making this inline? Many of these unsigned long variable could be declared on a single line to make the function shorter. Can you turn these into proper block-style comments? Like so: /* * We currently... * ... * by 32 bits. */ Note that technically yo</pre> Thierry Reding 2013-06-17T20:29:11 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19748 <pre> I believe the UM says that 64 &lt;= m &lt;= 511. Although the above seems to work on 5250 and 5420, it might be better to use a table that conforms to the constraint on m: PLL_36XX_RATE(192000000, 64, 2, 2, 0), PLL_36XX_RATE(180633600, 90, 3, 2, 20762), PLL_36XX_RATE(180000000, 90, 3, 2, 0), PLL_36XX_RATE(73728000, 98, 2, 4, 19923), PLL_36XX_RATE(67737600, 90, 2, 4, 20762), PLL_36XX_RATE(49152000, 98, 3, 4, 19923), PLL_36XX_RATE(45158400, 90, 3, 4, 20762), PLL_36XX_RATE(32768000, 131, 3, 5, 4719) Thanks, Andrew </pre> Andrew Bresticker 2013-06-17T20:08:13 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19746 <pre> The patch is correct, but generally speaking I think we should get away from having the drivers get configured per SoC on such a fine-grained level. Better make this driver (and others) always work on all exynos variants. Arnd </pre> Arnd Bergmann 2013-06-17T19:59:15 http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/19742 <pre> OK. Let me do it this way and see how it turns out. However keep in mind that next patch adds further dependencies on access to vendor_data struct, so there is nothing sure. Best regards, Tomasz </pre> Tomasz Figa 2013-06-17T19:02:26 Search the mailing list at Gmane query http://search.gmane.org/?group=$group=gmane.linux.kernel.samsung-soc