gmane.linux.bios

Re: qemu dts fixes

Myles Watson — 2008-12-02T03:45:09

I guess the other thing is that you might want to throw an error if something that's soldered on doesn't respond (and it won't change addresses), but you won't even know if someone moves a card from slot to slot or plugs in a new one. It's carried over from v2, but now is the time to change things that don't make sense. Thanks, Myles -- coreboot mailing list: coreboot< at >coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: Baremetal bootloader project

ron minnich — 2008-12-02T03:37:36

In a sense baremetal was a first cut at what we have now in libpayload. ron -- coreboot mailing list: coreboot< at >coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: Baremetal bootloader project

Steven James — 2008-12-02T03:17:10

Greetings, I'm still lurking about, just very quiet lately. I think the best part of it that would still be relevant got absorbed into FILO for USB support. Since the library itself pulled in includes from the main tree, it's unlikely to even compile anymore without a fair bit of work. G'day, sjames On Sun, 30 Nov 2008, Gregg Levine wrote: ||||| |||| ||||||||||||| ||| by Linux Labs International, Inc. Steven James, CTO 866 824 9737 support -- coreboot mailing list: coreboot< at >coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

r3788 build service

coreboot information — 2008-12-02T03:14:50

Dear coreboot readers! This is the automated build check service of coreboot. The developer "mjones" checked in revision 3788 to the coreboot source repository and caused the following changes: Change Log: I missed the svn add on r3787. These are the additional files. Add AMD dbm690t ACPI support. The following ACPI features are supported. 1. S1, S5 sleep and wake up (by power button or PS/2 keyboard/mouse). 2. AMD powernow-k8 driver. 3. Thermal configuration based on ADT7461. 4. IDE timing settings. 5. HPET timer. 6. Interrupt routing based on ACPI table. Signed-off-by: Joe Bao amd.com> Reviewed-by: Maggie Li amd.com> Acked-by: Ronald G. Minnich gmail.com> Acked-by: Marc Jones gmail.com> Build Log: Compilation of amd:dbm690t has been fixed If something broke during this checkin please be a pain in mjones's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automat

r3788 - in trunk/coreboot-v2/src/mainboard/amd/dbm690t:. acpi

2008-12-02T02:56:38

Author: mjones Date: 2008-12-02 03:56:38 +0100 (Tue, 02 Dec 2008) New Revision: 3788 Added: trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/ trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/cpstate.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/debug.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/doit.sh trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/dsdt.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/globutil.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/ide.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/routing.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/sata.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/statdef.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/usb.asl trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c Log: I missed the svn add on r3787. These are the additional files. Add AMD dbm690t ACPI support. The following ACPI features are supported. 1. S1, S5 sleep and wake up (by power button or PS/2

Re: Patches for ACPI support on dbm690t (RS600 and SB600)

Marc Jones — 2008-12-02T02:57:22

Sorry, I missed the svn add on this. r3788 -- coreboot mailing list: coreboot< at >coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: r3787 build service

Bao, Zheng — 2008-12-02T01:30:49

Hi, all, The dbm690t_acpi.patch we sent has a created directory "acpi" in src/mainboard/amd/dbm690t. It is lost in the most updated revision. That is why the error comes up. Do we need send a new patch based on current revision? Joe -----Original Message----- From: coreboot-bounces< at >coreboot.org [mailto:coreboot-bounces< at >coreboot.org] On Behalf Of coreboot information Sent: Tuesday, December 02, 2008 6:01 AM To: coreboot mailinglist Subject: [coreboot] r3787 build service Dear coreboot readers! This is the automated build check service of coreboot. The developer "mjones" checked in revision 3787 to the coreboot source repository and caused the following changes: Change Log: Add AMD dbm690t ACPI support. The following ACPI features are supported. 1. S1, S5 sleep and wake up (by power button or PS/2 keyboard/mouse). 2. AMD powernow-k8 driver. 3. Thermal configuration based on ADT7461. 4. IDE timing settings. 5. HPET timer. 6. Interrupt routing based on ACPI table. Signed-off-by: Joe Bao amd.

Re: qemu dts fixes

Jordan Crouse — 2008-12-01T23:29:06

So the defining criteria isn't "onboard or cards", its "need a ROM or not" - because not all onboard GPUs require an option ROM in the main system ROM - some can use an attached EEPROM (as do soldered down NICs and other such devices). Its not a huge deal, since I see where you are doing with it - but it might relieve some confusion if we called it "need_optionrom" instead of "on_mainboard". Jordan -- coreboot mailing list: coreboot< at >coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: Free chips, not required by me, and a question

Carl-Daniel Hailfinger — 2008-12-01T22:57:00

Ah, that's an old trap. Your chips have a PLCC32 housing, but the housing is unrelated to the protocol used by the chips. The protocol for recent chips can be LPC, FWH and SPI. To make matters more complicated, FWH is a special case variant of LPC with one bit set differently. That means some data sheets mention the chips speak LPC although they will not respond to regular LPC read/write cycles. I've tried to create a marketing language -> chip type mapping below: - FWH -> FWH - Firmware Hub -> FWH - LPC Firmware -> FWH - Firmware Memory -> FWH - Low Pin Count (if Firmware/FWH is not mentioned) -> LPC - LPC (if Firmware is not mentioned) -> LPC SST data sheets have the following conventions: "LPC Memory Read" -> LPC "Firmware Memory Read" -> FWH If both are mentioned, the chip supports both. Regards, Carl-Daniel

r3787 build service

coreboot information — 2008-12-01T22:01:04

Dear coreboot readers! This is the automated build check service of coreboot. The developer "mjones" checked in revision 3787 to the coreboot source repository and caused the following changes: Change Log: Add AMD dbm690t ACPI support. The following ACPI features are supported. 1. S1, S5 sleep and wake up (by power button or PS/2 keyboard/mouse). 2. AMD powernow-k8 driver. 3. Thermal configuration based on ADT7461. 4. IDE timing settings. 5. HPET timer. 6. Interrupt routing based on ACPI table. Signed-off-by: Joe Bao amd.com> Reviewed-by: Maggie Li amd.com> Acked-by: Ronald G. Minnich gmail.com> Acked-by: Marc Jones gmail.com> Build Log: Compilation of amd:dbm690t has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3787&device=dbm690t&vendor=amd If something broke during this checkin please be a pain in mjones's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out.

Resource Allocation discussion

Myles Watson — 2008-12-01T21:37:12