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    <link>http://gmane.org</link>
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  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6252">
    <title>[PATCH] Seabios: allow mapping of multiple PCI optionROMs to one</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6252</link>
    <description>&lt;pre&gt;All, 
This is a patch that reproduces the vendor ID mapping that is done in 
coreboot in the various AMD northbridge's. The coreboot mapping is only 
useful if coreboot is used to run the vga bios. If seabios is the payload 
then most coreboot configs leave the vga bios init for it. 



From 5b7f2ba9f43fbc67a81a2449d8bbd3d2f6e530aa Mon Sep 17 00:00:00 2001 
From: Dave Frodin &amp;lt;dave.frodin&amp;lt; at &amp;gt;se-eng.com&amp;gt; 
Date: Tue, 7 May 2013 13:51:56 -0600 
Subject: [PATCH] Seabios: allow mapping of multiple PCI option ROMs to one 

This feature was added to allow mapping multiple different 
PCI graphics vendor/device IDs to a single ID. The intent is 
to have the coreboot mainboard define its VGA_BIOS_ID as the 
ID that is present in the actual VGA BIOS. The PCI ID of the 
graphics device would then be mapped to that ID. 

Change-Id: Id06a1c9730546070146932a4dc8ab8229c4a59b9 
Signed-off-by: Dave Frodin &amp;lt;dave.frodin&amp;lt; at &amp;gt;se-eng.com&amp;gt; 
--- 
src/optionroms.c | 69 +++++++++++++++++++++++++++++++++++++++++++++++++++++- 
1 files changed, &lt;/pre&gt;</description>
    <dc:creator>Dave Frodin</dc:creator>
    <dc:date>2013-05-21T19:47:18</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6249">
    <title>Re: [Qemu-devel] KVM call agenda for 2013-05-21</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6249</link>
    <description>&lt;pre&gt;
Agree, I think mail works better for notifications.

&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-21T17:52:51</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6245">
    <title>Re: KVM call agenda for 2013-05-21</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6245</link>
    <description>&lt;pre&gt;
Unfortunate.
Let's talk about this on the next slot: next Tuesday, June 4 then.
Could you keep your agenda clear on that day please?


We don't work on Fridays in Israel so that means we'll only be able to
respond Sunday, and you'll only see it Monday anyway.
Setting agenda Thursday is probably too aggressive?

&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-21T12:33:41</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6243">
    <title>DMI based quirks?</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6243</link>
    <description>&lt;pre&gt;Hi all.

Would it be possible to add some DMI based quirks? I have a device and
in coreboot I have
some detection code for it:

http://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/mainboard/bachmann/ot200/mainboard.c;h=0ea053aad0c9e085bbd8ea36f14210404881edb7;hb=HEAD

Now it takes quite some time to load Grub in PIO mode even the device
could use DMA.

For the linux kernel I have added this patch:

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=abf8f2b877846573f0e6498883fe43f08be5696d


What would be the best solution in seabios to use PIO for broken devices and DMA
for the others? The biggest problem is that the device supports DMA
but due a missing
resister I breaks in DMA.

thanks
--
Christian Gmeiner, MSc
&lt;/pre&gt;</description>
    <dc:creator>Christian Gmeiner</dc:creator>
    <dc:date>2013-05-21T09:02:50</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6242">
    <title>seabios-1.7.2 stable changes</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6242</link>
    <description>&lt;pre&gt;Hi Gerd,

I just pulled your git branch at "git://git.kraxel.org/seabios
1.7.2-kraxel" into the seabios 1.7.2-stable branch.  (I know my timing
isn't great.)

I did not pull the pvpanic changes as I'm reluctant to put a new
feature and change the acpi tables in a stable release.

If there are no other pressing changes, I'll tag 1.7.2.2.

-Kevin
&lt;/pre&gt;</description>
    <dc:creator>Kevin O'Connor</dc:creator>
    <dc:date>2013-05-21T01:59:27</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6241">
    <title>Re: KVM call agenda for 2013-05-21</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6241</link>
    <description>&lt;pre&gt;
Generating acpi tables.

Cc'd a bunch of people who might be interested in this topic.

Kevin - could you join on Tuesday? There appears a disconnect
between the seabios and qemu that a conf call
might help resolve.

&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-20T13:25:48</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6232">
    <title>Re: [Qemu-devel]  [PATCH v17] Add pvpanic device driver</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6232</link>
    <description>&lt;pre&gt;
Oh no, that's not what I meant! I'm just rounding up backport candidates :)

Thanks!
Laszlo
&lt;/pre&gt;</description>
    <dc:creator>Laszlo Ersek</dc:creator>
    <dc:date>2013-05-15T07:36:32</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6222">
    <title>Re: [Qemu-devel] [PATCH RFC 00/13] qemu: generate acpi tables for the guest</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6222</link>
    <description>&lt;pre&gt;  Hi,


Of course.  On archs which don't use device trees in the first place it
doesn't make sense.


pseries does (thats why the hard libfdt dependency if you want pseries
support).  arm wants move into that direction too.


Sure.


I don't think Peter intended to imply *that* ...

cheers,
  Gerd
&lt;/pre&gt;</description>
    <dc:creator>Gerd Hoffmann</dc:creator>
    <dc:date>2013-05-14T13:53:29</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6215">
    <title>Re: [Qemu-devel] [PATCH RFC 10/13] i386: generate pcguest info</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6215</link>
    <description>&lt;pre&gt;
I went over it again and found one:
+    if (ram_size &amp;lt;= 0x80000000)
+        guest_info-&amp;gt;pci_info.w32.begin = 0x80000000;
+    else if (ram_size &amp;lt;= 0xc0000000)
+        guest_info-&amp;gt;pci_info.w32.begin = 0xc0000000;
+    else
+        guest_info-&amp;gt;pci_info.w32.begin = 0xe0000000;

should use {}.

One is not a bunch so I obviously missed some - it might be helpful if
you pointed them out.

Thanks,

&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-14T08:06:22</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6210">
    <title>Re: [Qemu-devel] [PATCH RFC 12/13] i386: ACPI table generation code from seabios</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6210</link>
    <description>&lt;pre&gt;
I'm sitting here hoping nobody ever asks me to add ACPI
support for ARM QEMU :-) [not totally impossible one
day in the future...]

&lt;/pre&gt;</description>
    <dc:creator>Peter Maydell</dc:creator>
    <dc:date>2013-05-13T20:27:57</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6207">
    <title>Re: [Qemu-devel] [PATCH RFC 01/13] apic: rename apicspecific bitopts</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6207</link>
    <description>&lt;pre&gt;
Wouldn't it be better to consolidate so we only have
one set of bitops rather than a local set in this file?

thanks
&lt;/pre&gt;</description>
    <dc:creator>Peter Maydell</dc:creator>
    <dc:date>2013-05-13T20:22:20</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6204">
    <title>[PATCH RFC 11/13] pc: pass PCI hole ranges to Guests</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6204</link>
    <description>&lt;pre&gt;Guest currently has to jump through lots of hoops to guess the PCI hole
ranges.  It's fragile, and makes us change BIOS each time we add a new
chipset.  Let's report the window in a ROM file, to make BIOS do exactly
what QEMU intends.

Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
---
 hw/i386/pc.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 203c683..68d2610 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -997,6 +997,26 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt; static void pc_set_cpu_guest_info(CPUState *cpu, void *arg)
     }
 }
 
+/* pci-info ROM file. Little endian format */
+typedef struct PcRomPciInfo {
+    uint64_t w32_min;
+    uint64_t w32_max;
+    uint64_t w64_min;
+    uint64_t w64_max;
+} PcRomPciInfo;
+
+static void pc_fw_cfg_guest_info(PcGuestInfo *guest_info)
+{
+    PcRomPciInfo *info = g_malloc(sizeof *info);
+    info-&amp;gt;w32_min = cpu_to_le64(guest_info-&amp;gt;pci_info.w32.begin);
+    info-&amp;gt;w32_max = cpu_to_le64(guest_info-&amp;gt;pci_info.w32.end);
+    info-&amp;gt;w64_min = cp&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:01:34</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6203">
    <title>[PATCH RFC 12/13] i386: ACPI table generation code fromseabios</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6203</link>
    <description>&lt;pre&gt;This adds C code for generating ACPI tables at runtime,
imported from seabios git tree
    commit 51684b7ced75fb76776e8ee84833fcfb6ecf12dd

Although ACPI tables come from a system BIOS on real hw,
it makes sense that the ACPI tables are coupled with the
virtual machine, since they have to abstract the x86 machine to
the OS's.

Several future developments that this will enable:
- describe a complex configuration
  e.g. a bridged PCI topology to enable
  acpi hotplug of devices behind a bridge,
  or multi-root.
- make it easier to use alternative firmware:
  any firmware can just load the ACPI tables from QEMU.
  case in point OVMF.
- make it easier to add more chipsets without bumping
  into fw_cfg boundaries.

Notes:
The code structure was intentionally kept as close
to the seabios original as possible, to simplify
comparison and making sure we didn't lose anything
in translation.

Will be cleaned up and made closer to qemu style
in follow-up patches.

ACPI tables are exposed to guest as FW_CFG entries.
This&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:01:30</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6202">
    <title>[PATCH RFC 10/13] i386: generate pc guest info</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6202</link>
    <description>&lt;pre&gt;This fills in guest info table with misc
information of interest to the guest.
Will be used by ACPI table generation code.

Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
---
 hw/acpi/ich9.c            |  7 ++++-
 hw/acpi/piix4.c           | 44 +++++++++++++++++++++++++-
 hw/i386/Makefile.objs     |  2 ++
 hw/i386/pc.c              | 80 +++++++++++++++++++++++++++++++++++++++++++++--
 hw/i386/pc_piix.c         | 26 +++++++++++++--
 hw/i386/pc_q35.c          | 14 +++++++--
 hw/isa/lpc_ich9.c         | 11 +++++--
 hw/mips/mips_malta.c      |  2 +-
 hw/pci-host/q35.c         |  5 +++
 include/hw/acpi/ich9.h    |  2 +-
 include/hw/i386/ich9.h    |  3 +-
 include/hw/i386/pc.h      | 53 +++++++++++++++++++++++++++++--
 include/hw/pci-host/q35.h |  2 ++
 include/qemu/typedefs.h   |  1 +
 14 files changed, 233 insertions(+), 19 deletions(-)

diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 4a17f32..764e27f 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -203,7 +203,7 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt; static void pm_powerdown_req(Notifie&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:01:25</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6201">
    <title>[PATCH RFC 07/13] acpi: pre-compiled ASL files</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6201</link>
    <description>&lt;pre&gt;Add pre-compiled ASL files. Useful for systems that
do not have IASL.

Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
---
 hw/i386/acpi-dsdt.hex.generated     | 4409 +++++++++++++++++++++
 hw/i386/q35-acpi-dsdt.hex.generated | 7346 +++++++++++++++++++++++++++++++++++
 hw/i386/ssdt-misc.hex.generated     |  190 +
 hw/i386/ssdt-pcihp.hex.generated    |  108 +
 hw/i386/ssdt-proc.hex.generated     |  134 +
 5 files changed, 12187 insertions(+)
 create mode 100644 hw/i386/acpi-dsdt.hex.generated
 create mode 100644 hw/i386/q35-acpi-dsdt.hex.generated
 create mode 100644 hw/i386/ssdt-misc.hex.generated
 create mode 100644 hw/i386/ssdt-pcihp.hex.generated
 create mode 100644 hw/i386/ssdt-proc.hex.generated

diff --git a/hw/i386/acpi-dsdt.hex.generated b/hw/i386/acpi-dsdt.hex.generated
new file mode 100644
index 0000000..68cab3e
--- /dev/null
+++ b/hw/i386/acpi-dsdt.hex.generated
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -0,0 +1,4409 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt;
+static unsigned char AcpiDsdtAmlCode[] = {
+0x44,
+0x53,
+0x44,
+0x54,
+0x37,
+0x11,
+0x0,
+0x0,
+0x1,
+0xe1,
+0x4&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:01:04</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6200">
    <title>[PATCH RFC 13/13] pc: reuse guest info for legacy fw cfg</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6200</link>
    <description>&lt;pre&gt;Reduce code duplication by getting legacy
fw cfg data from guest info structure.

Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
---
 hw/i386/pc.c | 34 ++++++++++++++--------------------
 1 file changed, 14 insertions(+), 20 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index af414a4..41bfb5b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -594,14 +594,13 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt; static unsigned int pc_apic_id_limit(unsigned int max_cpus)
     return x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
 }
 
-static FWCfgState *bochs_bios_init(void)
+static FWCfgState *bochs_bios_init(PcGuestInfo *guest_info)
 {
     FWCfgState *fw_cfg;
     uint8_t *smbios_table;
     size_t smbios_len;
     uint64_t *numa_fw_cfg;
-    int i, j;
-    unsigned int apic_id_limit = pc_apic_id_limit(max_cpus);
+    int i;
 
     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
     /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -618,7 +617,7 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt; static FWCfgState *bochs_bios_init(void)
      * [1] The only kind of &lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:01:20</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6199">
    <title>[PATCH RFC 09/13] i386: add bios linker/loader</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6199</link>
    <description>&lt;pre&gt;This add a dynamic bios linker/loader.
This will be used by acpi table generation
code to:
    - load each table in the appropriate memory egment
    - link tables to each other
    - fix up checksums after said linking

Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
---
 hw/i386/Makefile.objs                |   1 +
 hw/i386/bios-linker-loader.c         | 155 +++++++++++++++++++++++++++++++++++
 include/hw/i386/bios-linker-loader.h |  26 ++++++
 3 files changed, 182 insertions(+)
 create mode 100644 hw/i386/bios-linker-loader.c
 create mode 100644 include/hw/i386/bios-linker-loader.h

diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index 013d250..71be2da 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -4,6 +4,7 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt; obj-y += pc.o pc_piix.o pc_q35.o
 obj-$(CONFIG_XEN) += xen_domainbuild.o xen_machine_pv.o
 
 obj-y += kvmvapic.o
+obj-y += bios-linker-loader.o
 
 iasl-option=$(shell if test -z "`$(1) $(2) 2&amp;gt;&amp;amp;1 &amp;gt; /dev/null`" \
     ; then echo "$(2)"; else echo "$(3)"; fi ;)
diff -&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:01:15</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6198">
    <title>[PATCH RFC 05/13] i386: add ACPI table files from seabios</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6198</link>
    <description>&lt;pre&gt;This adds ASL code as well as scripts for processing it,
imported from seabios git tree
commit 51684b7ced75fb76776e8ee84833fcfb6ecf12dd

Will be used for runtime acpi table generation.

Note:
This patch reuses some code from SeaBIOS, which was originally under
LGPLv2 and then relicensed to GPLv3 or LGPLv3, in QEMU under GPLv2+. This
relicensing has been acked by all contributors that had contributed to the
code since the v2-&amp;gt;v3 relicense. ACKs approving the v2+ relicensing are
listed below. The list might include ACKs from people not holding
copyright on any parts of the reused code, but it's better to err on the
side of caution and include them.

Affected SeaBIOS files (GPLv2+ license headers added)
&amp;lt;http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/5949&amp;gt;:

 src/acpi-dsdt-cpu-hotplug.dsl    |   15 +++++++++++++++
 src/acpi-dsdt-dbug.dsl           |   15 +++++++++++++++
 src/acpi-dsdt-hpet.dsl           |   15 +++++++++++++++
 src/acpi-dsdt-isa.dsl            |   15 +++++++++++++++
 src/acpi-dsdt-pci-&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:00:54</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6196">
    <title>[PATCH RFC 01/13] apic: rename apic specific bitopts</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6196</link>
    <description>&lt;pre&gt;apic has its own version of bitops, with the
difference that it works on u32 and not long.
Add apic_ prefix to avoid namespace clashes.

Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
---
 hw/intc/apic.c | 42 +++++++++++++++++++++---------------------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 756dff0..46cb097 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -40,18 +40,18 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt; static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
                                       uint8_t dest, uint8_t dest_mode);
 
 /* Find first bit starting from msb */
-static int fls_bit(uint32_t value)
+static int apic_fls_bit(uint32_t value)
 {
     return 31 - clz32(value);
 }
 
 /* Find first bit starting from lsb */
-static int ffs_bit(uint32_t value)
+static int apic_ffs_bit(uint32_t value)
 {
     return ctz32(value);
 }
 
-static inline void set_bit(uint32_t *tab, int index)
+static inline void apic_set_bit(uint32_t *tab, int index)
 {
     int i, mas&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:00:46</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6193">
    <title>[PATCH RFC 02/13] hw/i386/pc.c: move IO_APIC_DEFAULT_ADDRESS to include/hw/i386/apic.h</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6193</link>
    <description>&lt;pre&gt;Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
Signed-off-by: Laszlo Ersek &amp;lt;lersek&amp;lt; at &amp;gt;redhat.com&amp;gt;
Signed-off-by: Michael S. Tsirkin &amp;lt;mst&amp;lt; at &amp;gt;redhat.com&amp;gt;
---
 hw/i386/pc.c           | 2 --
 include/hw/i386/apic.h | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 197d218..f13dde5 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -75,8 +75,6 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt;
 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
 
-#define IO_APIC_DEFAULT_ADDRESS 0xfec00000
-
 #define E820_NR_ENTRIES16
 
 struct e820_entry {
diff --git a/include/hw/i386/apic.h b/include/hw/i386/apic.h
index 1d48e02..edbb37f 100644
--- a/include/hw/i386/apic.h
+++ b/include/hw/i386/apic.h
&amp;lt; at &amp;gt;&amp;lt; at &amp;gt; -26,6 +26,8 &amp;lt; at &amp;gt;&amp;lt; at &amp;gt; void apic_designate_bsp(DeviceState *d);
 /* pc.c */
 DeviceState *cpu_get_current_apic(void);
 
+#define IO_APIC_DEFAULT_ADDRESS 0xfec00000
+
 /* cpu.c */
 bool cpu_is_bsp(X86CPU *cpu);
 
&lt;/pre&gt;</description>
    <dc:creator>Michael S. Tsirkin</dc:creator>
    <dc:date>2013-05-13T20:00:39</dc:date>
  </item>
  <item rdf:about="http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6191">
    <title>Re: another iasl update breaks seabios compilation again</title>
    <link>http://permalink.gmane.org/gmane.comp.bios.coreboot.seabios/6191</link>
    <description>&lt;pre&gt;
Looks like what's needed, but now seabios build system
needs to handle yet another (now major) difference in
iasl output and options.  Oh well.

/mjt
&lt;/pre&gt;</description>
    <dc:creator>Michael Tokarev</dc:creator>
    <dc:date>2013-05-13T12:55:19</dc:date>
  </item>
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